Home
last modified time | relevance | path

Searched refs:CLK_TOP_APLL12_DIV5 (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8516-clk.h157 #define CLK_TOP_APLL12_DIV5 125 macro
H A Dmt6779-clk.h144 #define CLK_TOP_APLL12_DIV5 134 macro
H A Dmt8192-clk.h160 #define CLK_TOP_APLL12_DIV5 148 macro
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.h212 CLK_TOP_APLL12_DIV5, enumerator
H A Dmt8192-afe-clk.c55 [CLK_TOP_APLL12_DIV5] = "top_apll12_div5",
497 .div_clk_id = CLK_TOP_APLL12_DIV5,
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8516.c638 GATE_TOP5(CLK_TOP_APLL12_DIV5, "apll12_div5", "apll12_ck_div5", 6),
H A Dclk-mt8167.c856 GATE_TOP5(CLK_TOP_APLL12_DIV5, "apll12_div5", "apll12_ck_div5", 6),
H A Dclk-mt8192.c706 DIV_GATE(CLK_TOP_APLL12_DIV5, "apll12_div5", "apll_i2s5_m_sel", 0x320, 6, 0x334, 8, 16),
H A Dclk-mt6779.c839 DIV_GATE(CLK_TOP_APLL12_DIV5, "apll12_div5", "i2s5_m_ck_sel",
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi1001 <&topckgen CLK_TOP_APLL12_DIV5>,
H A Dmt8183.dtsi1500 /*<&topckgen CLK_TOP_APLL12_DIV5>,*/