/openbmc/linux/sound/soc/mediatek/mt8183/ |
H A D | mt8183-afe-clk.c | 47 CLK_TOP_APLL12_DIV3, enumerator 86 [CLK_TOP_APLL12_DIV3] = "top_apll12_div3", 526 .div_clk_id = CLK_TOP_APLL12_DIV3,
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 154 #define CLK_TOP_APLL12_DIV3 122 macro
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H A D | mt6765-clk.h | 116 #define CLK_TOP_APLL12_DIV3 81 macro
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H A D | mt6779-clk.h | 141 #define CLK_TOP_APLL12_DIV3 131 macro
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H A D | mt8183-clk.h | 161 #define CLK_TOP_APLL12_DIV3 125 macro
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H A D | mt8192-clk.h | 157 #define CLK_TOP_APLL12_DIV3 145 macro
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H A D | mt8195-clk.h | 233 #define CLK_TOP_APLL12_DIV3 221 macro
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/openbmc/linux/sound/soc/mediatek/mt8192/ |
H A D | mt8192-afe-clk.h | 209 CLK_TOP_APLL12_DIV3, enumerator
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H A D | mt8192-afe-clk.c | 52 [CLK_TOP_APLL12_DIV3] = "top_apll12_div3", 461 .div_clk_id = CLK_TOP_APLL12_DIV3,
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | mt8195-afe-pcm.yaml | 166 <&topckgen 236>, //CLK_TOP_APLL12_DIV3
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt8516.c | 635 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
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H A D | clk-mt8167.c | 853 GATE_TOP5(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll12_ck_div3", 3),
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H A D | clk-mt8183.c | 628 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll_i2s3_sel", 0x320, 5, 0x324, 8, 24),
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H A D | clk-mt8192.c | 703 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "apll_i2s3_m_sel", 0x320, 3, 0x328, 8, 24),
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H A D | clk-mt8195-topckgen.c | 1169 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "top_i2so2_mck", 0x0320, 3, 0x0328, 8, 24),
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H A D | clk-mt6779.c | 833 DIV_GATE(CLK_TOP_APLL12_DIV3, "apll12_div3", "i2s3_m_ck_sel",
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H A D | clk-mt6765.c | 519 GATE_TOP2(CLK_TOP_APLL12_DIV3, "apll12_div3", "aud_1_ck", 5),
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8192.dtsi | 998 <&topckgen CLK_TOP_APLL12_DIV3>,
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H A D | mt8183.dtsi | 1497 <&topckgen CLK_TOP_APLL12_DIV3>,
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H A D | mt8195.dtsi | 995 <&topckgen CLK_TOP_APLL12_DIV3>,
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