Searched refs:CLK_TOP_APLL12_CK_DIV5 (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 202 #define CLK_TOP_APLL12_CK_DIV5 170 macro
|
| H A D | mediatek,mt8365-clk.h | 128 #define CLK_TOP_APLL12_CK_DIV5 118 macro
|
| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 491 DIV_ADJ(CLK_TOP_APLL12_CK_DIV5, "apll12_ck_div5", "aud_i2s5_m_sel",
|
| H A D | clk-mt8167.c | 680 DIV_ADJ(CLK_TOP_APLL12_CK_DIV5, "apll12_ck_div5", "aud_i2s5_m_sel",
|
| H A D | clk-mt8365.c | 565 DIV_ADJ_F(CLK_TOP_APLL12_CK_DIV5, "apll12_ck_div5", "apll_tdmin_sel",
|