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Searched refs:CLK_PWM0 (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-sprd.txt27 clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
31 assigned-clocks = <&aon_clk CLK_PWM0>,
/openbmc/linux/include/dt-bindings/clock/
H A Dpxa-clock.h47 #define CLK_PWM0 37 macro
H A Dactions,s500-cmu.h43 #define CLK_PWM0 23 macro
H A Dactions,s700-cmu.h66 #define CLK_PWM0 43 macro
H A Dactions,s900-cmu.h68 #define CLK_PWM0 50 macro
H A Dsprd,sc9863a-clk.h120 #define CLK_PWM0 15 macro
H A Dsprd,ums512-clk.h134 #define CLK_PWM0 6 macro
H A Dsprd,sc9860-clk.h124 #define CLK_PWM0 18 macro
H A Drockchip,rv1126-cru.h29 #define CLK_PWM0 15 macro
H A Drk3568-cru.h26 #define CLK_PWM0 13 macro
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa27x.dtsi53 clocks = <&clks CLK_PWM0>;
67 clocks = <&clks CLK_PWM0>;
H A Dpxa25x.dtsi71 clocks = <&clks CLK_PWM0>;
H A Dpxa3xx.dtsi228 clocks = <&clks CLK_PWM0>;
244 clocks = <&clks CLK_PWM0>;
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk356x.dtsi461 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
472 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
483 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
494 clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
/openbmc/linux/drivers/clk/actions/
H A Dowl-s500.c496 [CLK_PWM0] = &pwm0_clk.common.hw,
H A Dowl-s700.c535 [CLK_PWM0] = &clk_pwm0.common.hw,
H A Dowl-s900.c663 [CLK_PWM0] = &pwm0_clk.common.hw,
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rv1126.c320 COMPOSITE(CLK_PWM0, "clk_pwm0", mux_xin24m_gpll_p, 0,
H A Dclk-rk3568.c1509 COMPOSITE(CLK_PWM0, "clk_pwm0", clk_pwm0_p, 0,
/openbmc/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c789 [CLK_PWM0] = &pwm0_clk.common.hw,
H A Dsc9860-clk.c721 [CLK_PWM0] = &pwm0_clk.common.hw,
H A Dums512-clk.c1084 [CLK_PWM0] = &pwm0_clk.common.hw,