xref: /openbmc/linux/arch/arm/boot/dts/intel/pxa/pxa27x.dtsi (revision 724ba675)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/* The pxa3xx skeleton simply augments the 2xx version */
3*724ba675SRob Herring#include "pxa2xx.dtsi"
4*724ba675SRob Herring#include "dt-bindings/clock/pxa-clock.h"
5*724ba675SRob Herring
6*724ba675SRob Herring/ {
7*724ba675SRob Herring	model = "Marvell PXA27x familiy SoC";
8*724ba675SRob Herring	compatible = "marvell,pxa27x";
9*724ba675SRob Herring
10*724ba675SRob Herring	pxabus {
11*724ba675SRob Herring		pdma: dma-controller@40000000 {
12*724ba675SRob Herring			compatible = "marvell,pdma-1.0";
13*724ba675SRob Herring			reg = <0x40000000 0x10000>;
14*724ba675SRob Herring			interrupts = <25>;
15*724ba675SRob Herring			#dma-cells = <2>;
16*724ba675SRob Herring			/* For backwards compatibility: */
17*724ba675SRob Herring			#dma-channels = <32>;
18*724ba675SRob Herring			dma-channels = <32>;
19*724ba675SRob Herring			#dma-requests = <75>;
20*724ba675SRob Herring			dma-requests = <75>;
21*724ba675SRob Herring			status = "okay";
22*724ba675SRob Herring		};
23*724ba675SRob Herring
24*724ba675SRob Herring		pxairq: interrupt-controller@40d00000 {
25*724ba675SRob Herring			marvell,intc-priority;
26*724ba675SRob Herring			marvell,intc-nr-irqs = <34>;
27*724ba675SRob Herring		};
28*724ba675SRob Herring
29*724ba675SRob Herring		pinctrl: pinctrl@40e00000 {
30*724ba675SRob Herring			reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
31*724ba675SRob Herring			       0x40f00020 0x10>;
32*724ba675SRob Herring			compatible = "marvell,pxa27x-pinctrl";
33*724ba675SRob Herring		};
34*724ba675SRob Herring
35*724ba675SRob Herring		gpio: gpio@40e00000 {
36*724ba675SRob Herring			compatible = "intel,pxa27x-gpio";
37*724ba675SRob Herring			gpio-ranges = <&pinctrl 0 0 128>;
38*724ba675SRob Herring			clocks = <&clks CLK_NONE>;
39*724ba675SRob Herring		};
40*724ba675SRob Herring
41*724ba675SRob Herring		usb0: usb@4c000000 {
42*724ba675SRob Herring			compatible = "marvell,pxa-ohci";
43*724ba675SRob Herring			reg = <0x4c000000 0x10000>;
44*724ba675SRob Herring			interrupts = <3>;
45*724ba675SRob Herring			clocks = <&clks CLK_USBHOST>;
46*724ba675SRob Herring			status = "disabled";
47*724ba675SRob Herring		};
48*724ba675SRob Herring
49*724ba675SRob Herring		pwm0: pwm@40b00000 {
50*724ba675SRob Herring			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
51*724ba675SRob Herring			reg = <0x40b00000 0x10>;
52*724ba675SRob Herring			#pwm-cells = <1>;
53*724ba675SRob Herring			clocks = <&clks CLK_PWM0>;
54*724ba675SRob Herring		};
55*724ba675SRob Herring
56*724ba675SRob Herring		pwm1: pwm@40b00010 {
57*724ba675SRob Herring			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
58*724ba675SRob Herring			reg = <0x40b00010 0x10>;
59*724ba675SRob Herring			#pwm-cells = <1>;
60*724ba675SRob Herring			clocks = <&clks CLK_PWM1>;
61*724ba675SRob Herring		};
62*724ba675SRob Herring
63*724ba675SRob Herring		pwm2: pwm@40c00000 {
64*724ba675SRob Herring			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
65*724ba675SRob Herring			reg = <0x40c00000 0x10>;
66*724ba675SRob Herring			#pwm-cells = <1>;
67*724ba675SRob Herring			clocks = <&clks CLK_PWM0>;
68*724ba675SRob Herring		};
69*724ba675SRob Herring
70*724ba675SRob Herring		pwm3: pwm@40c00010 {
71*724ba675SRob Herring			compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
72*724ba675SRob Herring			reg = <0x40c00010 0x10>;
73*724ba675SRob Herring			#pwm-cells = <1>;
74*724ba675SRob Herring			clocks = <&clks CLK_PWM1>;
75*724ba675SRob Herring		};
76*724ba675SRob Herring
77*724ba675SRob Herring		pwri2c: i2c@40f00180 {
78*724ba675SRob Herring			compatible = "mrvl,pxa-i2c";
79*724ba675SRob Herring			reg = <0x40f00180 0x24>;
80*724ba675SRob Herring			interrupts = <6>;
81*724ba675SRob Herring			clocks = <&clks CLK_PWRI2C>;
82*724ba675SRob Herring			#address-cells = <0x1>;
83*724ba675SRob Herring			#size-cells = <0>;
84*724ba675SRob Herring			status = "disabled";
85*724ba675SRob Herring		};
86*724ba675SRob Herring
87*724ba675SRob Herring		pxa27x_udc: udc@40600000 {
88*724ba675SRob Herring			compatible = "marvell,pxa270-udc";
89*724ba675SRob Herring			reg = <0x40600000 0x10000>;
90*724ba675SRob Herring			interrupts = <11>;
91*724ba675SRob Herring			clocks = <&clks CLK_USB>;
92*724ba675SRob Herring			status = "disabled";
93*724ba675SRob Herring		};
94*724ba675SRob Herring
95*724ba675SRob Herring		keypad: keypad@41500000 {
96*724ba675SRob Herring			compatible = "marvell,pxa27x-keypad";
97*724ba675SRob Herring			reg = <0x41500000 0x4c>;
98*724ba675SRob Herring			interrupts = <4>;
99*724ba675SRob Herring			clocks = <&clks CLK_KEYPAD>;
100*724ba675SRob Herring			status = "disabled";
101*724ba675SRob Herring		};
102*724ba675SRob Herring
103*724ba675SRob Herring		pxa_camera: imaging@50000000 {
104*724ba675SRob Herring			compatible = "marvell,pxa270-qci";
105*724ba675SRob Herring			reg = <0x50000000 0x1000>;
106*724ba675SRob Herring			interrupts = <33>;
107*724ba675SRob Herring			dmas = <&pdma 68 0	/* Y channel */
108*724ba675SRob Herring				&pdma 69 0	/* U channel */
109*724ba675SRob Herring				&pdma 70 0>;	/* V channel */
110*724ba675SRob Herring			dma-names = "CI_Y", "CI_U", "CI_V";
111*724ba675SRob Herring
112*724ba675SRob Herring			clocks = <&clks CLK_CAMERA>;
113*724ba675SRob Herring			clock-names = "ciclk";
114*724ba675SRob Herring			clock-frequency = <5000000>;
115*724ba675SRob Herring			clock-output-names = "qci_mclk";
116*724ba675SRob Herring
117*724ba675SRob Herring			status = "disabled";
118*724ba675SRob Herring		};
119*724ba675SRob Herring
120*724ba675SRob Herring		rtc@40900000 {
121*724ba675SRob Herring			clocks = <&clks CLK_OSC32k768>;
122*724ba675SRob Herring		};
123*724ba675SRob Herring	};
124*724ba675SRob Herring
125*724ba675SRob Herring	clocks {
126*724ba675SRob Herring	       /*
127*724ba675SRob Herring		* The muxing of external clocks/internal dividers for osc* clock
128*724ba675SRob Herring		* sources has been hidden under the carpet by now.
129*724ba675SRob Herring		*/
130*724ba675SRob Herring		#address-cells = <1>;
131*724ba675SRob Herring		#size-cells = <1>;
132*724ba675SRob Herring		ranges;
133*724ba675SRob Herring
134*724ba675SRob Herring		clks: pxa2xx_clks@41300004 {
135*724ba675SRob Herring			compatible = "marvell,pxa270-clocks";
136*724ba675SRob Herring			#clock-cells = <1>;
137*724ba675SRob Herring			status = "okay";
138*724ba675SRob Herring		};
139*724ba675SRob Herring	};
140*724ba675SRob Herring
141*724ba675SRob Herring	timer@40a00000 {
142*724ba675SRob Herring		compatible = "marvell,pxa-timer";
143*724ba675SRob Herring		reg = <0x40a00000 0x20>;
144*724ba675SRob Herring		interrupts = <26>;
145*724ba675SRob Herring		clocks = <&clks CLK_OSTIMER>;
146*724ba675SRob Herring		status = "okay";
147*724ba675SRob Herring	};
148*724ba675SRob Herring
149*724ba675SRob Herring	pxa270_opp_table: opp_table0 {
150*724ba675SRob Herring		compatible = "operating-points-v2";
151*724ba675SRob Herring
152*724ba675SRob Herring		opp-104000000 {
153*724ba675SRob Herring			opp-hz = /bits/ 64 <104000000>;
154*724ba675SRob Herring			opp-microvolt = <900000 900000 1705000>;
155*724ba675SRob Herring			clock-latency-ns = <20>;
156*724ba675SRob Herring		};
157*724ba675SRob Herring		opp-156000000 {
158*724ba675SRob Herring			opp-hz = /bits/ 64 <156000000>;
159*724ba675SRob Herring			opp-microvolt = <1000000 1000000 1705000>;
160*724ba675SRob Herring			clock-latency-ns = <20>;
161*724ba675SRob Herring		};
162*724ba675SRob Herring		opp-208000000 {
163*724ba675SRob Herring			opp-hz = /bits/ 64 <208000000>;
164*724ba675SRob Herring			opp-microvolt = <1180000 1180000 1705000>;
165*724ba675SRob Herring			clock-latency-ns = <20>;
166*724ba675SRob Herring		};
167*724ba675SRob Herring		opp-312000000 {
168*724ba675SRob Herring			opp-hz = /bits/ 64 <312000000>;
169*724ba675SRob Herring			opp-microvolt = <1250000 1250000 1705000>;
170*724ba675SRob Herring			clock-latency-ns = <20>;
171*724ba675SRob Herring		};
172*724ba675SRob Herring		opp-416000000 {
173*724ba675SRob Herring			opp-hz = /bits/ 64 <416000000>;
174*724ba675SRob Herring			opp-microvolt = <1350000 1350000 1705000>;
175*724ba675SRob Herring			clock-latency-ns = <20>;
176*724ba675SRob Herring		};
177*724ba675SRob Herring		opp-520000000 {
178*724ba675SRob Herring			opp-hz = /bits/ 64 <520000000>;
179*724ba675SRob Herring			opp-microvolt = <1450000 1450000 1705000>;
180*724ba675SRob Herring			clock-latency-ns = <20>;
181*724ba675SRob Herring		};
182*724ba675SRob Herring		opp-624000000 {
183*724ba675SRob Herring			opp-hz = /bits/ 64 <624000000>;
184*724ba675SRob Herring			opp-microvolt = <1550000 1550000 1705000>;
185*724ba675SRob Herring			clock-latency-ns = <20>;
186*724ba675SRob Herring		};
187*724ba675SRob Herring	};
188*724ba675SRob Herring};
189