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Searched refs:CLK_OPS_PARENT_ENABLE (Results 1 – 25 of 35) sorted by relevance

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/openbmc/linux/drivers/clk/stm32/
H A Dclk-stm32mp13.c946 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
954 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
962 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
970 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
978 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
986 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
994 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
1002 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
1010 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
1018 CLK_OPS_PARENT_ENABLE | CLK_SET_RATE_NO_REPARENT),
[all …]
/openbmc/linux/drivers/clk/qcom/
H A Dlpass-gfm-sm8250.c75 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
95 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
115 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
135 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
155 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
175 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Ddispcc-qcm2290.c136 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
229 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dgcc-sm6115.c726 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
749 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
764 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
779 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
801 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
816 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
831 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
846 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
1035 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
1057 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
[all …]
H A Ddispcc-sm6115.c162 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE | CLK_GET_RATE_NOCACHE,
255 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE | CLK_GET_RATE_NOCACHE,
H A Ddispcc-sm6375.c153 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
210 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Ddispcc-sm6350.c300 .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE | CLK_OPS_PARENT_ENABLE,
379 .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE | CLK_OPS_PARENT_ENABLE,
H A Dgpucc-sdm660.c116 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dgpucc-msm8998.c147 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dgpucc-sm6125.c166 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dgcc-qcm2290.c766 .flags = CLK_OPS_PARENT_ENABLE,
781 .flags = CLK_OPS_PARENT_ENABLE,
796 .flags = CLK_OPS_PARENT_ENABLE,
811 .flags = CLK_OPS_PARENT_ENABLE,
965 .flags = CLK_OPS_PARENT_ENABLE,
1247 .flags = CLK_OPS_PARENT_ENABLE,
H A Dgpucc-sm6375.c181 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dgpucc-sm6115.c232 .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
H A Dlpassaudiocc-sc7280.c252 .flags = CLK_OPS_PARENT_ENABLE,
/openbmc/linux/drivers/clk/imx/
H A Dclk.h185 __imx_clk_hw_gate2(name, parent, reg, shift, 0x3, CLK_OPS_PARENT_ENABLE, shared_count)
191 __imx_clk_hw_gate(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE, 0)
197 imx_clk_hw_gate2_flags(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE)
212 __imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags | CLK_OPS_PARENT_ENABLE, 0)
219 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE)
410 (CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
471 CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
H A Dclk-imx7d.c709 …root_clk", "ahb_root_clk", base + 0x9080, 0, 2, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE | CLK_SET_… in imx7d_clocks_init()
773 …= imx_clk_hw_gate2_flags("arm_a7_root_clk", "arm_a7_div", base + 0x4000, 0, CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
775 …gs("main_axi_root_clk", "axi_post_div", base + 0x4040, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
780 …flags("dram_root_clk", "dram_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
781 …s("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
782 …lt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
783 …ram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0, CLK_IS_CRITICAL | CLK_OPS_PARENT_ENABLE); in imx7d_clocks_init()
H A Dclk-imx8mq.c576 …_flags("vpu_g1_root_clk", "vpu_g1", base + 0x4560, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); in imx8mq_clocks_probe()
578 …_flags("vpu_g2_root_clk", "vpu_g2", base + 0x45a0, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); in imx8mq_clocks_probe()
584 …lags("vpu_dec_root_clk", "vpu_bus", base + 0x4630, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); in imx8mq_clocks_probe()
H A Dclk-gate-93.c180 init.flags = flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE; in imx93_clk_gate()
H A Dclk-imx7ulp.c108 …, base + 0x30, 24, 2, ddr_sels, ARRAY_SIZE(ddr_sels), CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); in imx7ulp_clk_scg1_init()
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8195-imp_iic_wrap.c21 &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
H A Dclk-mt8188-imp_iic_wrap.c24 &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
H A Dclk-mt8192-imp_iic_wrap.c23 &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
/openbmc/linux/drivers/clk/
H A Dclk-stm32mp1.c1386 COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE |\
1830 MUX(CK_PER, "ck_per", per_src, CLK_OPS_PARENT_ENABLE,
1833 MUX(CK_MPU, "ck_mpu", cpu_src, CLK_OPS_PARENT_ENABLE |
1837 CLK_OPS_PARENT_ENABLE,
1843 CLK_OPS_PARENT_ENABLE,
2047 COMPOSITE(NO_ID, "ck_ker_eth", eth_src, CLK_OPS_PARENT_ENABLE |
2055 DIV(ETHPTP_K, "ethptp_k", "ck_ker_eth", CLK_OPS_PARENT_ENABLE |
2059 COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE,
2065 COMPOSITE(CK_MCO1, "ck_mco1", mco1_src, CLK_OPS_PARENT_ENABLE |
2071 COMPOSITE(CK_MCO2, "ck_mco2", mco2_src, CLK_OPS_PARENT_ENABLE |
[all …]
H A Dclk.c340 if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent) in clk_core_is_enabled()
1473 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_disable_unused_subtree()
1500 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_disable_unused_subtree()
2124 if (core->flags & CLK_OPS_PARENT_ENABLE) { in __clk_set_parent_before()
2157 if (core->flags & CLK_OPS_PARENT_ENABLE) { in __clk_set_parent_after()
2433 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_change_rate()
2450 if (core->flags & CLK_OPS_PARENT_ENABLE) in clk_change_rate()
3504 ENTRY(CLK_OPS_PARENT_ENABLE),
/openbmc/linux/drivers/clk/xilinx/
H A Dxlnx_vcu.c540 CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE); in xvcu_register_clock_provider()

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