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Searched refs:CLKID_FCLK_DIV7 (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Damlogic,a1-pll-clkc.h22 #define CLKID_FCLK_DIV7 9 macro
H A Daxg-clkc.h17 #define CLKID_FCLK_DIV7 6 macro
H A Dgxbb-clkc.h16 #define CLKID_FCLK_DIV7 8 macro
H A Dmeson8b-clkc.h16 #define CLKID_FCLK_DIV7 9 macro
H A Dg12a-clkc.h17 #define CLKID_FCLK_DIV7 6 macro
/openbmc/u-boot/drivers/clk/
H A Dclk_meson.c177 MESON_GATE(CLKID_FCLK_DIV7, HHI_MPLL_CNTL6, 31),
417 CLKID_FCLK_DIV7,
441 CLKID_FCLK_DIV7,
575 CLKID_FCLK_DIV7, in meson_clk81_get_rate()
744 case CLKID_FCLK_DIV7: in meson_clk_get_rate_by_id()
821 case CLKID_FCLK_DIV7: in meson_clk_set_rate_by_id()
H A Dclk_meson_axg.c88 CLKID_FCLK_DIV7, in meson_clk81_get_rate()
256 case CLKID_FCLK_DIV7: in meson_clk_get_rate_by_id()
/openbmc/u-boot/include/dt-bindings/clock/
H A Daxg-clkc.h17 #define CLKID_FCLK_DIV7 6 macro
H A Dgxbb-clkc.h16 #define CLKID_FCLK_DIV7 8 macro
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Damlogic,a1-peripherals-clkc.yaml66 <&clkc_pll CLKID_FCLK_DIV7>,
/openbmc/linux/drivers/clk/meson/
H A Da1-pll.c284 [CLKID_FCLK_DIV7] = &fclk_div7.hw,
H A Dmeson8b.c2787 [CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
2991 [CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
3206 [CLKID_FCLK_DIV7] = &meson8b_fclk_div7.hw,
H A Dgxbb.c2741 [CLKID_FCLK_DIV7] = &gxbb_fclk_div7.hw,
2949 [CLKID_FCLK_DIV7] = &gxbb_fclk_div7.hw,
H A Dg12a.c4256 [CLKID_FCLK_DIV7] = &g12a_fclk_div7.hw,
4481 [CLKID_FCLK_DIV7] = &g12a_fclk_div7.hw,
4741 [CLKID_FCLK_DIV7] = &g12a_fclk_div7.hw,
H A Daxg.c1902 [CLKID_FCLK_DIV7] = &axg_fclk_div7.hw,