| /openbmc/linux/Documentation/arch/arc/ |
| H A D | arc.rst | 3 Linux kernel for ARC processors
10 ARC processors and relevant open source projects.
12 - `<https://embarc.org>`_ - Community portal for open source on ARC.
18 ARC processors. Some of the projects are forks of various upstream projects,
21 as open source for use on ARC Processors.
23 - `Official Synopsys ARC Processors website
26 Manual, AKA PRM for ARC HS processors
27 <https://www.synopsys.com/dw/doc.php/ds/cc/programmers-reference-manual-ARC-HS.pdf>`_)
34 Important note on ARC processors configurability
37 ARC processors are highly configurable and several configurable options
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| H A D | index.rst | 2 ARC architecture
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| /openbmc/u-boot/arch/arc/ |
| H A D | Kconfig | 1 menu "ARC architecture"
2 depends on ARC
12 prompt "ARC Instruction Set"
18 The original ARC ISA of ARC600/700 cores
21 bool "ARC ISA v2"
23 ISA for the Next Generation ARC-HS cores
33 bool "ARC 750D"
40 bool "ARC 770D"
47 bool "ARC EM6"
51 Next Generation ARC Core based on ISA-v2 ISA without MMU.
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| /openbmc/u-boot/doc/ |
| H A D | README.ARC | 1 Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs
5 More information on ARC cores avaialble here:
9 technology to tailor each ARC processor instance to meet specific performance,
12 The DesignWare ARC processors are also extendable, allowing designers to add
15 Synopsys' ARC processors have been used by over 170 customers worldwide who
16 collectively ship more than 1 billion ARC-based chips annually.
18 All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent
24 The ARC GNU toolchain with support for all ARC Processors can be downloaded
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| /openbmc/linux/drivers/net/ethernet/arc/ |
| H A D | Kconfig | 3 # ARC EMAC network device configuration
7 bool "ARC devices"
14 the questions about ARC cards. If you say Y, you will be asked for
21 depends on ARC || ARCH_ROCKCHIP || COMPILE_TEST
27 tristate "ARC EMAC support"
30 depends on ARC || COMPILE_TEST
32 On some legacy ARC (Synopsys) FPGA boards such as ARCAngel4/ML50x
33 non-standard on-chip ethernet device ARC EMAC 10/100 is used.
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| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | snps,arc-timer.txt | 1 Synopsys ARC Local Timer with Interrupt Capabilities
2 - Found on all ARC CPUs (ARC700/ARCHS)
4 - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically
5 TIMER0 used as clockevent provider (true for all ARC cores)
6 TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)
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| H A D | snps,archs-gfrc.txt | 1 Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
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| H A D | snps,archs-rtc.txt | 1 Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
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| /openbmc/linux/arch/arc/plat-axs10x/ |
| H A D | Kconfig | 7 bool "Synopsys ARC AXS10x Software Development Platforms"
17 Support for the ARC AXS10x Software Development Platforms.
27 bool "AXS101 with AXC001 CPU Card (ARC 770D/EM6/AS221)"
29 This adds support for the 770D/EM6/AS221 CPU Card. Only the ARC
37 bool "AXS103 with AXC003 CPU Card (ARC HS38x)"
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| /openbmc/linux/Documentation/devicetree/bindings/arc/ |
| H A D | hsdk.txt | 1 Synopsys DesignWare ARC HS Development Kit Device Tree Bindings
4 ARC HSDK Board with quad-core ARC HS38x4 in silicon.
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| H A D | archs-pct.txt | 1 * ARC HS Performance Counters
3 The ARC HS can be configured with a pipeline performance monitor for counting
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| H A D | pct.txt | 1 * ARC Performance Counters
8 * The ARC 700 PCT does not support interrupts; although HW events may be
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| H A D | axs101.txt | 1 Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
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| H A D | axs103.txt | 1 Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
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| /openbmc/linux/arch/arc/ |
| H A D | Kconfig | 6 config ARC config
84 menu "ARC Architecture Configuration"
86 menu "ARC Platform/SoC/Board"
95 prompt "ARC Instruction Set"
102 The original ARC ISA of ARC600/700 cores
105 bool "ARC ISA v2"
108 ISA for the Next Generation ARC-HS cores
112 menu "ARC CPU Configuration"
115 prompt "ARC Core"
132 bool "ARC-HS"
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| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | snps,arcpgu.txt | 1 ARC PGU
4 by Synopsys. The ARC PGU is an RGB streamer that reads the data from a
12 - clock-names: A list of clock names. For ARC PGU it should contain:
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| /openbmc/u-boot/board/synopsys/emsdp/ |
| H A D | README | 3 ARC EM Software Development Platform (AKA EMSDP)
8 The DesignWare ARC EM Software Development Platform is FPGA-bases platform
9 for rapid software development on the ARC EM family of processors.
12 versions of ARC EM CPUs. U-Boot is built to be run on the simplest
25 That means no extra hardware is required to access ARC core from a
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| /openbmc/linux/Documentation/devicetree/bindings/serio/ |
| H A D | snps-arc_ps2.txt | 1 * ARC PS/2 driver: PS/2 block used in some ARC FPGA's & nSIM OSCI model
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| /openbmc/u-boot/board/synopsys/iot_devkit/ |
| H A D | README | 3 ARC IoT Development Kit (AKA IoTDK)
8 The DesignWare ARC IoT Development Kit is a versatile platform that includes
12 The ARC IoT Development Kit includes a silicon implementation of the
13 ARC Data Fusion IP Subsystem running at 144 MHz on SMIC's
31 That means no extra hardware is required to access ARC core from a
57 A non-volatile memory from which ARC core may execute code directly.
70 ARC core cannot execute code from DCCM. So this is very special RAM
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| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | snps,archs-intc.txt | 1 * ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)
12 intc accessed via the special ARC AUX register interface, hence "reg" property
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| H A D | snps,archs-idu-intc.txt | 1 * ARC-HS Interrupt Distribution Unit
26 The interrupt controller is accessed via the special ARC AUX register
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | arc-uart.txt | 1 * Synopsys ARC UART : Non standard UART used in some of the ARC FPGA boards
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| /openbmc/u-boot/board/synopsys/hsdk/ |
| H A D | README | 2 Useful notes on bulding and using of U-Boot on ARC HS Development Kit (AKA HSDK)
7 The DesignWare ARC HS Development Kit is a ready-to-use platform for rapid
8 software development on the ARC HS3x family of processors.
14 …https://github.com/foss-for-synopsys-dwc-arc-processors/ARC-Development-Systems-Forum/wiki/docs/AR…
25 That means no extra hardware is required to access ARC core from a
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| /openbmc/u-boot/drivers/timer/ |
| H A D | Kconfig | 57 bool "ARC timer support"
58 depends on TIMER && ARC && CLK
60 Select this to enable built-in ARC timers.
61 ARC cores may have up to 2 built-in timers: timer0 and timer1,
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| /openbmc/linux/arch/arc/plat-hsdk/ |
| H A D | Kconfig | 6 bool "ARC HS Development Kit SOC"
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