Searched refs:x7 (Results 176 – 200 of 499) sorted by relevance
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623 reg = <0x7>;689 reg = <0x7>;755 reg = <0x7>;768 reg = <0x7>;
208 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */230 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */
247 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;355 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2356 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
182 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */204 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */
113 0xff 0xff 0x7 0x0 0x7 0xa 0xa 0x2 0x2 0x5
125 # bit2-0: 0x7 required127 # bit6-4: 0x7 required
206 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */333 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
199 interrupts = <0x7 0x4>;273 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
132 interrupts = <0x7 0x4>;200 interrupts = <0x7 0x4>;
130 interrupts = <0x7 0x4>;236 interrupts = <0x7 0x4>;
576 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;582 0x0 0x0 0x0 0x4 &mpic 0x7 0x1613 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
578 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;584 0x0 0x0 0x0 0x4 &mpic 0x7 0x1615 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
337 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;359 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
276 MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x7277 MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x7
43 fsl,mux_mask = <0x7>;
65 + ldp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS]81 + stp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS]
33 A_l .req x7
36 #define data3 x7
39 A_l .req x7
109 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
124 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
67 reg = <0x7>;
115 # bit2-0: 0x7 required117 # bit6-4: 0x7 required
634 interrupt-map-mask = <0x0 0x0 0x0 0x7>;660 interrupt-map-mask = <0x0 0x0 0x0 0x7>;686 interrupt-map-mask = <0x0 0x0 0x0 0x7>;712 interrupt-map-mask = <0x0 0x0 0x0 0x7>;738 interrupt-map-mask = <0x0 0x0 0x0 0x7>;759 <0x0 0x7 0x4>;