/openbmc/linux/Documentation/locking/ |
H A D | futex-requeue-pi.rst | 121 the lock can be acquired at this stage as well, if so, the next
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/openbmc/openbmc/meta-arm/meta-arm-bsp/documentation/corstone1000/ |
H A D | change-log.rst | 92 - Use TF-M BL1 code as the ROM code instead of MCUboot (the next stage bootloader BL2 remains to be…
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H A D | software-architecture.rst | 188 block to get the information on the boot bank. In the successful trial stage, 190 regular. Any failure in the trial stage or system hangs leads to a system
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/openbmc/openbmc/poky/meta/classes-recipe/ |
H A D | overlayfs.bbclass | 121 # we need to generate file names early during parsing stage
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/openbmc/linux/Documentation/admin-guide/media/ |
H A D | visl.rst | 14 been upstreamed yet. This can reveal bugs at an early stage.
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/openbmc/linux/Documentation/process/ |
H A D | 3.Early-stage.rst | 3 Early-stage planning 176 One discouraging thing which can happen at this stage is not a hostile
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/openbmc/linux/lib/zstd/compress/ |
H A D | zstd_compress.c | 1851 zc->stage = ZSTDcs_init; in ZSTD_resetCCtx_internal() 2136 RETURN_ERROR_IF(srcCCtx->stage!=ZSTDcs_init, stage_wrong, in ZSTD_copyCCtx_internal() 3916 if (lastFrameChunk && (op>ostart)) cctx->stage = ZSTDcs_ending; in ZSTD_compress_frameChunk() 4006 RETURN_ERROR_IF(cctx->stage != ZSTDcs_init, stage_wrong, in ZSTD_referenceExternalSequences() 4029 cctx->stage, (unsigned)srcSize); in ZSTD_compressContinue_internal() 4030 RETURN_ERROR_IF(cctx->stage==ZSTDcs_created, stage_wrong, in ZSTD_compressContinue_internal() 4033 if (frame && (cctx->stage==ZSTDcs_init)) { in ZSTD_compressContinue_internal() 4040 cctx->stage = ZSTDcs_ongoing; in ZSTD_compressContinue_internal() 4505 if (cctx->stage == ZSTDcs_init) { in ZSTD_writeEpilogue() 4510 cctx->stage = ZSTDcs_ongoing; in ZSTD_writeEpilogue() [all …]
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/openbmc/linux/Documentation/bpf/ |
H A D | s390.rst | 150 /debootstrap/debootstrap --second-stage
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/openbmc/u-boot/board/buffalo/lsxl/ |
H A D | kwbimage-lschl.cfg | 129 # bit8: 1, add writepath sample stage, must be 1 for DDR freq >= 300MHz
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H A D | kwbimage-lsxhl.cfg | 129 # bit8: 1, add writepath sample stage, must be 1 for DDR freq >= 300MHz
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/openbmc/qemu/docs/system/riscv/ |
H A D | microchip-icicle-kit.rst | 34 HSS loads the second stage bootloader U-Boot from an SD card. Then a kernel
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/openbmc/qemu/docs/system/arm/ |
H A D | emulation.rst | 107 - FEAT_XNX (Translation table stage 2 Unprivileged Execute-never)
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | cs35l36.txt | 74 Configures the signal threshold at which the PWM output stage enters
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/ostree/ |
H A D | ostree_2024.5.bb | 114 # do_configure stage so we do depend on it
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/openbmc/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training_leveling.c | 1293 wr_supp_res[if_id][bus_id].stage = PHASE_SHIFT; in ddr3_tip_wl_supp_align_phase_shift() 1421 wr_supp_res[if_id][bus_id].stage = edge_offset; in ddr3_tip_xsb_compare_test() 1634 [bus_id].stage)); in ddr3_tip_print_wl_supp_result()
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/openbmc/linux/Documentation/livepatch/ |
H A D | livepatch.rst | 316 implementation of the patched functions at this stage. 327 ftrace handler is registered\ [#]_. This stage is indicated by a value of '1' 371 the previously enabled patch or even the original one. This stage is
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/openbmc/linux/Documentation/accel/qaic/ |
H A D | aic100.rst | 145 the SBL stage. SBL performs a number of operations: 157 The QSM uses MHI to notify the host that the device has entered the QSM stage 484 multi-stage recovery process is then used to cleanup both sides, and get the
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/openbmc/linux/drivers/dma/sh/ |
H A D | rcar-dmac.c | 1495 unsigned int stage; in rcar_dmac_isr_desc_stage_end() local 1507 stage = (rcar_dmac_chan_read(chan, RCAR_DMACHCRB) & in rcar_dmac_isr_desc_stage_end() 1509 rcar_dmac_chan_write(chan, RCAR_DMADPCR, RCAR_DMADPCR_DIPT(stage)); in rcar_dmac_isr_desc_stage_end()
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/openbmc/linux/fs/f2fs/ |
H A D | gc.c | 607 int stage = 0; in atssr_lookup_victim() local 617 if (stage++ == 0) in atssr_lookup_victim() 647 ve = rb_entry(stage == 0 ? rb_prev(&ve->rb_node) : in atssr_lookup_victim() 653 if (stage++ == 0) in atssr_lookup_victim()
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/openbmc/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
H A D | hclge_main.c | 5432 struct hclge_fd_key_cfg *stage; in hclge_set_fd_key_config() local 5439 stage = &hdev->fd_cfg.key_cfg[stage_num]; in hclge_set_fd_key_config() 5440 req->stage = stage_num; in hclge_set_fd_key_config() 5441 req->key_select = stage->key_sel; in hclge_set_fd_key_config() 5442 req->inner_sipv6_word_en = stage->inner_sipv6_word_en; in hclge_set_fd_key_config() 5443 req->inner_dipv6_word_en = stage->inner_dipv6_word_en; in hclge_set_fd_key_config() 5444 req->outer_sipv6_word_en = stage->outer_sipv6_word_en; in hclge_set_fd_key_config() 5445 req->outer_dipv6_word_en = stage->outer_dipv6_word_en; in hclge_set_fd_key_config() 5446 req->tuple_mask = cpu_to_le32(~stage->tuple_active); in hclge_set_fd_key_config() 5549 req1->stage = stage; in hclge_fd_tcam_config() [all …]
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/openbmc/linux/fs/btrfs/ |
H A D | tree-log.c | 300 int stage; member 2419 wc->stage == LOG_WALK_REPLAY_INODES) { in replay_one_buffer() 2503 wc->stage == LOG_WALK_REPLAY_DIR_INDEX) { in replay_one_buffer() 2510 if (wc->stage < LOG_WALK_REPLAY_ALL) in replay_one_buffer() 7141 .stage = LOG_WALK_PIN_ONLY, in btrfs_recover_log_trees() 7231 if (!ret && wc.stage == LOG_WALK_REPLAY_ALL) { in btrfs_recover_log_trees() 7238 if (!ret && wc.stage == LOG_WALK_REPLAY_ALL) { in btrfs_recover_log_trees() 7273 wc.stage = LOG_WALK_REPLAY_INODES; in btrfs_recover_log_trees() 7277 if (wc.stage < LOG_WALK_REPLAY_ALL) { in btrfs_recover_log_trees() 7278 wc.stage++; in btrfs_recover_log_trees()
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/openbmc/u-boot/board/d-link/dns325/ |
H A D | kwbimage.cfg | 119 # bit8: 1, add writepath sample stage, must be 1 for DDR freq >= 300MHz
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/openbmc/openbmc/poky/meta/classes/ |
H A D | go-vendor.bbclass | 8 # a network (proxy) connection ahead of the compile stage. This contradicts
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/openbmc/linux/drivers/iommu/arm/arm-smmu/ |
H A D | arm-smmu-qcom.c | 225 (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) && in qcom_adreno_smmu_init_context()
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/openbmc/linux/drivers/iommu/arm/arm-smmu-v3/ |
H A D | arm-smmu-v3.h | 725 enum arm_smmu_domain_stage stage; member
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