| /openbmc/linux/drivers/edac/ |
| H A D | Kconfig | 60 Not all machines support hardware-driven error report. Some of those
61 provide a BIOS-driven error report mechanism via ACPI, using the
65 When this option is enabled, it will disable the hardware-driven
69 It should be noticed that keeping both GHES and a hardware-driven
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| /openbmc/linux/Documentation/scsi/ |
| H A D | lpfc.rst | 43 The community supporting kernel.org has driven an effort to remove
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-controller.yaml | 52 driven (not considering potential gpio inversions by pinmux):
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| /openbmc/linux/drivers/leds/ |
| H A D | Kconfig | 547 This option enables support for LEDs driven by the Wolfson
575 tristate "PWM driven LED Support"
579 This option enables support for pwm driven LEDs
582 tristate "REGULATOR driven LED support"
586 This option enables support for regulator driven LEDs.
626 This option enables support for LEDs driven by a Linear Technology
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| /openbmc/openpower-hw-diags/analyzer/ras-data/ |
| H A D | ras-data-definition.md | 6 signature. The RAS Data files are used to define, in a data driven fashion, the
224 the goal is to make the user applications as data driven as possible to avoid
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| /openbmc/linux/arch/powerpc/platforms/ |
| H A D | Kconfig | 218 bool "Interrupt driven TAU driver (EXPERIMENTAL)"
221 The TAU supports an interrupt driven mode which causes an interrupt
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| /openbmc/linux/Documentation/devicetree/bindings/input/touchscreen/ |
| H A D | ads7846.txt | 2 SPI driven touch screen controllers.
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| /openbmc/u-boot/drivers/reset/ |
| H A D | Kconfig | 8 modules are equipped with a reset signal, typically driven by some
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| /openbmc/u-boot/board/Seagate/nas220/ |
| H A D | kwbimage.cfg | 37 # bit 5: 0=clk is driven during self refresh, we don't care for APX
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| /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | analogix,anx7625.yaml | 66 compensation manual, increase it can enhance IO driven strength
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| /openbmc/linux/drivers/fsi/ |
| H A D | Kconfig | 53 lines driven by the internal ColdFire coprocessor. This requires
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| /openbmc/u-boot/board/Marvell/dreamplug/ |
| H A D | kwbimage.cfg | 33 # bit 5: 0=clk is driven during self refresh, we don't care for APX
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| /openbmc/u-boot/board/Marvell/sheevaplug/ |
| H A D | kwbimage.cfg | 32 # bit 5: 0=clk is driven during self refresh, we don't care for APX
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| /openbmc/u-boot/board/Seagate/dockstar/ |
| H A D | kwbimage.cfg | 35 # bit 5: 0=clk is driven during self refresh, we don't care for APX
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| /openbmc/u-boot/board/Marvell/guruplug/ |
| H A D | kwbimage.cfg | 32 # bit 5: 0=clk is driven during self refresh, we don't care for APX
|
| /openbmc/u-boot/board/Seagate/goflexhome/ |
| H A D | kwbimage.cfg | 38 # bit 5: 0=clk is driven during self refresh, we don't care for APX
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| /openbmc/u-boot/board/Synology/ds109/ |
| H A D | kwbimage.cfg | 36 # bit 5: 0=clk is driven during self refresh, we don't care for APX
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| /openbmc/linux/Documentation/devicetree/bindings/iio/dac/ |
| H A D | adi,ad3552r.yaml | 45 description: Vref I/O driven by internal vref to 2.5V. If not set, Vref pin
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | idt,versaclock5.yaml | 88 shut down if the SD/OE pin is driven high. If 0, this disables the
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| /openbmc/linux/Documentation/devicetree/bindings/mtd/ |
| H A D | jedec,spi-nor.yaml | 80 the SRWD bit is set to 1, and the WP# signal is either driven LOW or hard
|
| /openbmc/linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-cp11x.dtsi | 29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
|
| /openbmc/u-boot/board/LaCie/netspace_v2/ |
| H A D | kwbimage-ns2l.cfg | 33 # bit 5: 0=clk is driven during self refresh, we don't care for APX
|
| H A D | kwbimage.cfg | 33 # bit 5: 0=clk is driven during self refresh, we don't care for APX
|
| /openbmc/u-boot/board/keymile/km_arm/ |
| H A D | kwbimage.cfg | 53 # bit 5: 0=clk is driven during self refresh, we don't care for APX
|
| /openbmc/u-boot/board/LaCie/net2big_v2/ |
| H A D | kwbimage.cfg | 33 # bit 5: 0=clk is driven during self refresh, we don't care for APX
|