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Searched refs:clocking (Results 51 – 75 of 106) sorted by relevance

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/openbmc/linux/Documentation/ABI/testing/
H A Ddebugfs-driver-genwqe59 version. Used bitstream and bitstream clocking information.
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,stb-pcie.yaml62 description: Indicates usage of spread-spectrum clocking.
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxbb.dtsi246 * Mali clocking is provided by two identical clock paths
679 * VPU clocking is provided by two identical clock paths
H A Dfsl-ls1046a.dtsi40 clockgen: clocking@1ee1000 {
H A Dfsl-ls1043a.dtsi40 clockgen: clocking@1ee1000 {
H A Dls1021a.dtsi107 clockgen: clocking@1ee1000 {
H A Dmeson-gxl.dtsi680 * VPU clocking is provided by two identical clock paths
/openbmc/linux/Documentation/driver-api/thermal/
H A Dintel_dptf.rst231 Set the FIVR spread spectrum clocking percentage
234 Enable/disable of the FIVR spread spectrum clocking feature
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt49 - spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dbaikal,bt1-ccu-pll.yaml15 responsible for the chip subsystems clocking and resetting. The CCU is
H A Dbaikal,bt1-ccu-div.yaml15 responsible for the chip subsystems clocking and resetting. The CCU is
H A Dnvidia,tegra124-dfll.txt6 The DFLL IP block on Tegra is a root clocksource designed for clocking
H A Dqoriq-clock.txt3 Freescale QorIQ chips take primary clocking input from the external
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-peripheral-props.yaml45 Maximum SPI clocking speed of the device in Hz.
/openbmc/linux/drivers/clk/
H A DKconfig40 Supports the clocking subsystem of the WM831x/2x series of
197 clocking support and five output dividers. The driver only supports
325 This driver supports the clocking features of the Cirrus Logic
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dintegratorcp.dts44 * The Integrator/CP overall clocking architecture can be found in
/openbmc/u-boot/board/freescale/t1040qds/
H A DREADME50 - Single source clocking implementation
/openbmc/u-boot/board/sbc8349/
H A DREADME115 The third option builds PCI support in, and leaves the clocking at the
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dcirrus,lochnagar.yaml17 platform. Audio system topology, clocking and power can all be
/openbmc/linux/arch/arm64/boot/dts/apple/
H A Dt600x-die0.dtsi173 * TODO: figure out the clocking properly, there may
/openbmc/u-boot/doc/device-tree-bindings/net/
H A Dsnps,dwc-qos-ethernet.txt4 IP block. The IP supports multiple options for bus type, clocking and reset
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dsnps,dwc-qos-ethernet.txt7 IP block. The IP supports multiple options for bus type, clocking and reset
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,lochnagar.yaml17 Audio system topology, clocking and power can all be controlled through
/openbmc/linux/Documentation/core-api/
H A Dkernel-api.rst391 codecs, and devices with strict requirements for interface clocking.
/openbmc/linux/drivers/net/wan/
H A Dfarsync.c228 u8 clocking; member
1636 FST_WRB(card, suConfig.clocking, info->clockSource); in set_conf_from_info()
1752 info->clockSource = FST_RDB(card, suConfig.clocking); in gather_conf_info()

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