Searched hist:"17 e708ba" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/net/dsa/mv88e6xxx/ |
| H A D | global1.c | 17e708ba Mon Dec 05 16:30:27 CST 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com> net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips moved this bit in a Global control register. Chips with
controllable PPU should reset the PPU when resetting the switch.
Add a new reset operation to implement these differences and introduce a
mv88e6xxx_software_reset() helper to wrap it conveniently.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
17e708ba Mon Dec 05 16:30:27 CST 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com> net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips moved this bit in a Global control register. Chips with
controllable PPU should reset the PPU when resetting the switch.
Add a new reset operation to implement these differences and introduce a
mv88e6xxx_software_reset() helper to wrap it conveniently.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
| H A D | global1.h | 17e708ba Mon Dec 05 16:30:27 CST 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com> net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips moved this bit in a Global control register. Chips with
controllable PPU should reset the PPU when resetting the switch.
Add a new reset operation to implement these differences and introduce a
mv88e6xxx_software_reset() helper to wrap it conveniently.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
17e708ba Mon Dec 05 16:30:27 CST 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com> net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips moved this bit in a Global control register. Chips with
controllable PPU should reset the PPU when resetting the switch.
Add a new reset operation to implement these differences and introduce a
mv88e6xxx_software_reset() helper to wrap it conveniently.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
| H A D | chip.c | 17e708ba Mon Dec 05 16:30:27 CST 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com> net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips moved this bit in a Global control register. Chips with
controllable PPU should reset the PPU when resetting the switch.
Add a new reset operation to implement these differences and introduce a
mv88e6xxx_software_reset() helper to wrap it conveniently.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
17e708ba Mon Dec 05 16:30:27 CST 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com> net: dsa: mv88e6xxx: add a soft reset operation
Marvell chips have different way to issue a software reset.
Old chips (such as 88E6060) have a reset bit in an ATU control register.
Newer chips moved this bit in a Global control register. Chips with
controllable PPU should reset the PPU when resetting the switch.
Add a new reset operation to implement these differences and introduce a
mv88e6xxx_software_reset() helper to wrap it conveniently.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
|