/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | ti,adc12138.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments ADC12138 and similar self-calibrating ADCs 10 - Akinobu Mita <akinobu.mita@gmail.com> 19 - ti,adc12130 20 - ti,adc12132 21 - ti,adc12138 34 vref-p-supply: 37 vref-n-supply: [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/iio/dac/ |
H A D | adi,ad3552r.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Nuno Sá <nuno.sa@analog.com> 16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3542r.pdf 17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad3552r.pdf 22 - adi,ad3542r 23 - adi,ad3552r 28 spi-max-frequency: 31 reset-gpios: [all …]
|
H A D | dpot-dac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/dac/dpot-dac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Rosin <peda@axentia.se> 15 divided voltage is provided by a vref regulator. 17 .------. 18 .-----------. | | 19 | vref |--' .---. 20 | regulator |--. | | [all …]
|
/openbmc/linux/drivers/iio/dac/ |
H A D | ad3552r.c | 1 // SPDX-License-Identifier: GPL-2.0-only 103 #define AD3552R_REG_ADDR_CH_DAC_16B(ch) (0x2C - (1 - ch) * 2) 108 #define AD3552R_REG_ADDR_CH_INPUT_16B(ch) (0x36 - (1 - ch) * 2) 112 #define AD3552R_REG_ADDR_CH_DAC_24B(ch) (0x3D - (1 - ch) * 3) 117 #define AD3552R_REG_ADDR_CH_INPUT_24B(ch) (0x4B - (1 - ch) * 3) 134 /* Internal source with Vref I/O floating */ 136 /* Internal source with Vref I/O at 2.5V */ 138 /* External source with Vref I/O as input */ 154 /* Range from -5 V to 5 V. Requires Rfb2x connection */ 156 /* Range from -10 V to 10 V. Requires Rfb4x connection */ [all …]
|
H A D | dpot-dac.c | 1 // SPDX-License-Identifier: GPL-2.0 13 * divided voltage is provided by a vref regulator. 15 * .------. 16 * .-----------. | | 17 * | vref |--' .---. 18 * | regulator |--. | | 19 * '-----------' | | d | 20 * | | p | 22 * | | t |<---------+ 24 * | '---' dac output voltage [all …]
|
/openbmc/linux/drivers/iio/adc/ |
H A D | ti-tlc4541.c | 1 // SPDX-License-Identifier: GPL-2.0-only 91 static irqreturn_t tlc4541_trigger_handler(int irq, void *p) in tlc4541_trigger_handler() argument 93 struct iio_poll_func *pf = p; in tlc4541_trigger_handler() 94 struct iio_dev *indio_dev = pf->indio_dev; in tlc4541_trigger_handler() 98 ret = spi_sync(st->spi, &st->scan_single_msg); in tlc4541_trigger_handler() 102 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf, in tlc4541_trigger_handler() 106 iio_trigger_notify_done(indio_dev->trig); in tlc4541_trigger_handler() 112 int vref; in tlc4541_get_range() local 114 vref = regulator_get_voltage(st->reg); in tlc4541_get_range() 115 if (vref < 0) in tlc4541_get_range() [all …]
|
H A D | mcp3911.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Driver for Microchip MCP3911, Two-channel Analog Front End 73 struct regulator *vref; member 91 reg = MCP3911_REG_READ(reg, adc->dev_addr); in mcp3911_read() 92 ret = spi_write_then_read(adc->spi, ®, 1, val, len); in mcp3911_read() 97 *val >>= ((4 - len) * 8); in mcp3911_read() 98 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%lx\n", *val, in mcp3911_read() 105 dev_dbg(&adc->spi->dev, "writing 0x%x to register 0x%x\n", val, reg); in mcp3911_write() 107 val <<= (3 - len) * 8; in mcp3911_write() 109 val |= MCP3911_REG_WRITE(reg, adc->dev_addr); in mcp3911_write() [all …]
|
H A D | rockchip_saradc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 73 struct regulator *vref; member 89 writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); in rockchip_saradc_start_v1() 92 SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); in rockchip_saradc_start_v1() 99 if (info->reset) in rockchip_saradc_start_v2() 100 rockchip_saradc_reset_controller(info->reset); in rockchip_saradc_start_v2() 102 writel_relaxed(0xc, info->regs + SARADC_T_DAS_SOC); in rockchip_saradc_start_v2() 103 writel_relaxed(0x20, info->regs + SARADC_T_PD_SOC); in rockchip_saradc_start_v2() 106 writel_relaxed(val, info->regs + SARADC2_END_INT_EN); in rockchip_saradc_start_v2() 111 writel(val, info->regs + SARADC2_CONV_CON); in rockchip_saradc_start_v2() [all …]
|
H A D | ad799x.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc. 7 * Copyright (C) 2008-2010 Jonathan Cameron 10 * Copyright (C) 2002-2004 Stefan Eletzhofer 101 * struct ad799x_chip_config - chip specific information 113 * struct ad799x_chip_info - chip specific information 128 struct regulator *vref; member 140 switch (st->id) { in ad799x_write_config() 143 return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG, in ad799x_write_config() 148 return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG, in ad799x_write_config() [all …]
|
H A D | ad7923.c | 1 // SPDX-License-Identifier: GPL-2.0-only 47 #define EXTRACT(val, dec, bits) (((val) >> (dec)) & ((1 << (bits)) - 1)) 97 .shift = 12 - (bits), \ 172 for_each_set_bit(i, active_scan_mask, indio_dev->num_channels - 1) { in ad7923_update_scan_mode() 175 st->settings; in ad7923_update_scan_mode() 177 st->tx_buf[len++] = cpu_to_be16(cmd); in ad7923_update_scan_mode() 180 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; in ad7923_update_scan_mode() 181 st->ring_xfer[0].len = len; in ad7923_update_scan_mode() 182 st->ring_xfer[0].cs_change = 1; in ad7923_update_scan_mode() 184 spi_message_init(&st->ring_msg); in ad7923_update_scan_mode() [all …]
|
H A D | ad7298.c | 1 // SPDX-License-Identifier: GPL-2.0-only 29 #define AD7298_CH(x) BIT(13 - (x)) /* channel select */ 82 .scan_index = -1, 112 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength); in ad7298_update_scan_mode() 114 command = AD7298_WRITE | st->ext_ref; in ad7298_update_scan_mode() 120 st->tx_buf[0] = cpu_to_be16(command); in ad7298_update_scan_mode() 123 st->ring_xfer[0].tx_buf = &st->tx_buf[0]; in ad7298_update_scan_mode() 124 st->ring_xfer[0].len = 2; in ad7298_update_scan_mode() 125 st->ring_xfer[0].cs_change = 1; in ad7298_update_scan_mode() 126 st->ring_xfer[1].tx_buf = &st->tx_buf[1]; in ad7298_update_scan_mode() [all …]
|
H A D | ti-ads8688.c | 1 // SPDX-License-Identifier: GPL-2.0-only 44 * enum ads8688_range - ADS8688 reference voltage range 45 * @ADS8688_PLUSMINUS25VREF: Device is configured for input range ±2.5 * VREF 46 * @ADS8688_PLUSMINUS125VREF: Device is configured for input range ±1.25 * VREF 47 * @ADS8688_PLUSMINUS0625VREF: Device is configured for input range ±0.625 * VREF 48 * @ADS8688_PLUS25VREF: Device is configured for input range 0 - 2.5 * VREF 49 * @ADS8688_PLUS125VREF: Device is configured for input range 0 - 1.25 * VREF 93 .offset = -(1 << (ADS8688_REALBITS - 1)), 98 .offset = -(1 << (ADS8688_REALBITS - 1)), 103 .offset = -(1 << (ADS8688_REALBITS - 1)), [all …]
|
H A D | ti-ads7950.c | 1 // SPDX-License-Identifier: GPL-2.0 12 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 36 * Device tree users encode that via the vref-supply regulator. 54 (((val) >> (dec)) & ((1 << (bits)) - 1)) 61 (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask)) 64 (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask)) 84 * [0-3] GPIO signal 87 * [6] Sets Vref range1(2.5v) or range2(5v) 95 * [0-3] GPIO direction 96 * [4-6] Different GPIO alarm mode configurations [all …]
|
H A D | ad7768-1.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Analog Devices AD7768-1 SPI ADC driver 156 struct regulator *vref; member 185 shift = 32 - (8 * len); in ad7768_spi_reg_read() 186 st->data.d8[0] = AD7768_RD_FLAG_MSK(addr); in ad7768_spi_reg_read() 188 ret = spi_write_then_read(st->spi, st->data.d8, 1, in ad7768_spi_reg_read() 189 &st->data.d32, len); in ad7768_spi_reg_read() 193 return (be32_to_cpu(st->data.d32) >> shift); in ad7768_spi_reg_read() 200 st->data.d8[0] = AD7768_WR_FLAG_MSK(addr); in ad7768_spi_reg_write() 201 st->data.d8[1] = val & 0xFF; in ad7768_spi_reg_write() [all …]
|
H A D | ti-adc108s102.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (c) 2013-2015 Intel Corporation. 29 * In case of ACPI, we use the hard-wired 5000 mV of the Galileo and IOT2000 31 * via the vref-supply regulator. 38 * chips. The ADC108S102 effectively returns a 12-bit result with the 2 39 * least-significant bits unset. 45 * 16-bit SPI command format: 47 * [13:11] 3-bit channel address 53 * 16-bit SPI response format: 55 * [11:0] 12-bit ADC sample (for ADC108S102, [1:0] will always be 0). [all …]
|
H A D | ad7766.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 66 static irqreturn_t ad7766_trigger_handler(int irq, void *p) in ad7766_trigger_handler() argument 68 struct iio_poll_func *pf = p; in ad7766_trigger_handler() 69 struct iio_dev *indio_dev = pf->indio_dev; in ad7766_trigger_handler() 73 ret = spi_sync(ad7766->spi, &ad7766->msg); in ad7766_trigger_handler() 77 iio_push_to_buffers_with_timestamp(indio_dev, ad7766->data, in ad7766_trigger_handler() 78 pf->timestamp); in ad7766_trigger_handler() 80 iio_trigger_notify_done(indio_dev->trig); in ad7766_trigger_handler() 90 ret = regulator_bulk_enable(ARRAY_SIZE(ad7766->reg), ad7766->reg); in ad7766_preenable() 92 dev_err(&ad7766->spi->dev, "Failed to enable supplies: %d\n", in ad7766_preenable() [all …]
|
H A D | ad7476.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * TI ADC081S/ADC101S/ADC121S 8/10/12-bit SPI ADC driver 80 if (!st->convst_gpio) in ad7091_convst() 83 gpiod_set_value(st->convst_gpio, 0); in ad7091_convst() 85 gpiod_set_value(st->convst_gpio, 1); in ad7091_convst() 89 static irqreturn_t ad7476_trigger_handler(int irq, void *p) in ad7476_trigger_handler() argument 91 struct iio_poll_func *pf = p; in ad7476_trigger_handler() 92 struct iio_dev *indio_dev = pf->indio_dev; in ad7476_trigger_handler() 98 b_sent = spi_sync(st->spi, &st->msg); in ad7476_trigger_handler() 102 iio_push_to_buffers_with_timestamp(indio_dev, st->data, in ad7476_trigger_handler() [all …]
|
H A D | max1118.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * MAX1117/MAX1118/MAX1119 8-bit, dual-channel ADCs driver 7 * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1117-MAX1119.pdf 13 * ------ --------- ----------- 14 * nCS --> CNVST 15 * SCK --> SCLK 16 * MISO <-- DOUT 17 * ------ --------- ----------- 98 .rx_buf = &adc->data, in max1118_read() 105 ret = spi_sync_transfer(adc->spi, xfers + 1, 2); in max1118_read() [all …]
|
H A D | ti-adc12138.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver 132 .tx_buf = adc->tx_buf, in adc12138_mode_programming() 133 .rx_buf = adc->rx_buf, in adc12138_mode_programming() 139 if (adc->id != adc12138) in adc12138_mode_programming() 142 adc->tx_buf[0] = mode; in adc12138_mode_programming() 144 ret = spi_sync_transfer(adc->spi, &xfer, 1); in adc12138_mode_programming() 148 memcpy(rx_buf, adc->rx_buf, len); in adc12138_mode_programming() 172 u8 mode = (ch_to_mux[channel->channel] << 4) | in __adc12138_start_conv() 173 (channel->differential ? 0 : 0x80); in __adc12138_start_conv() [all …]
|
H A D | max11410.c | 1 // SPDX-License-Identifier: GPL-2.0-only 175 /* This driver only needs to write 8-bit registers */ in max11410_write_reg() 177 return -EINVAL; in max11410_write_reg() 179 return regmap_write(st->regmap, reg, val); in max11410_write_reg() 188 ret = regmap_bulk_read(st->regmap, reg, &st->scan.data, 3); in max11410_read_reg() 192 *val = get_unaligned_be24(&st->scan.data); in max11410_read_reg() 196 return regmap_read(st->regmap, reg, val); in max11410_read_reg() 204 return st->avdd; in max11410_get_vrefp() 206 return st->vrefp[refsel]; in max11410_get_vrefp() 215 return st->vrefn[refsel]; in max11410_get_vrefn() [all …]
|
H A D | max1363.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2008-2010 Jonathan Cameron 7 * Copyright (C) 2002-2004 Stefan Eletzhofer 51 /* think about including max11600 etc - more settings */ 58 /* max1363 only - though don't care on others. 79 /* max123{6-9} only */ 82 /* max1363 only - merely part of channel selects or don't care for others */ 87 /* max1363 strictly 0x06 - but doesn't matter */ 94 * struct max1363_mode - scan mode information 122 * struct max1363_chip_info - chip specifc information [all …]
|
/openbmc/linux/drivers/input/touchscreen/ |
H A D | ads7846.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 * - corgi_ts.c 11 * Copyright (C) 2004-2005 Richard Purdie 12 * - omap_ts.[hc], ads7846.h, ts_osk.c 39 * Support for ads7843 tested on Atmel at91sam926x-EK. 53 * note. The strength of filtering can be set in the board-* specific 76 * driver is used with DMA-based SPI controllers (like atmel_spi) on 77 * systems where main memory is not DMA-coherent (most non-x86 boards). 133 bool stopped; /* P: lock */ 134 bool disabled; /* P: lock */ [all …]
|
/openbmc/u-boot/drivers/adc/ |
H A D | adc-uclass.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Przemyslaw Marczak <p.marczak@samsung.com> 12 #include <dm/device-internal.h> 13 #include <dm/uclass-internal.h> 36 * 1-st and 3-rd are valid, then channel mask is: 0b1010, so request in check_channel() 39 if ((uc_pdata->channel_mask >= mask) && (uc_pdata->channel_mask & mask)) in check_channel() 43 __FILE__, caller_function, dev->name); in check_channel() 45 return -EINVAL; in check_channel() 54 if (uc_pdata->vdd_supply) { in adc_supply_enable() 56 ret = regulator_set_enable(uc_pdata->vdd_supply, true); in adc_supply_enable() [all …]
|
/openbmc/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-bmc-ufispace-ncplite.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/i2c/i2c.h> 7 #include <dt-bindings/gpio/aspeed-gpio.h> 11 compatible = "ufispace,ncplite-bmc", "aspeed,ast2600"; 18 stdout-path = &uart5; 27 iio-hwmon { 28 compatible = "iio-hwmon"; 29 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, [all …]
|
/openbmc/linux/sound/soc/codecs/ |
H A D | rt298.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * rt298.c -- RT298 ALSA SoC audio codec driver 23 #include <sound/soc-dapm.h> 200 snd_soc_component_write(component, rt298->index_cache[i].reg, in rt298_index_sync() 201 rt298->index_cache[i].def); in rt298_index_sync() 227 if (!rt298->component) in rt298_jack_detect() 228 return -EINVAL; in rt298_jack_detect() 230 dapm = snd_soc_component_get_dapm(rt298->component); in rt298_jack_detect() 232 if (rt298->pdata.cbj_en) { in rt298_jack_detect() 233 regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf); in rt298_jack_detect() [all …]
|