17d7209f0SDavid Lechner // SPDX-License-Identifier: GPL-2.0
2902c4b24SDavid Lechner /*
3902c4b24SDavid Lechner * Texas Instruments ADS7950 SPI ADC driver
4902c4b24SDavid Lechner *
5902c4b24SDavid Lechner * Copyright 2016 David Lechner <david@lechnology.com>
6902c4b24SDavid Lechner *
7902c4b24SDavid Lechner * Based on iio/ad7923.c:
8902c4b24SDavid Lechner * Copyright 2011 Analog Devices Inc
9902c4b24SDavid Lechner * Copyright 2012 CS Systemes d'Information
10902c4b24SDavid Lechner *
11902c4b24SDavid Lechner * And also on hwmon/ads79xx.c
123593cd53SAlexander A. Klimov * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
13902c4b24SDavid Lechner * Nishanth Menon
14902c4b24SDavid Lechner */
15902c4b24SDavid Lechner
168cfa26a7SAndy Shevchenko #include <linux/acpi.h>
17902c4b24SDavid Lechner #include <linux/bitops.h>
18902c4b24SDavid Lechner #include <linux/device.h>
19902c4b24SDavid Lechner #include <linux/err.h>
20c97dce79SJustin Chen #include <linux/gpio/driver.h>
21902c4b24SDavid Lechner #include <linux/interrupt.h>
22902c4b24SDavid Lechner #include <linux/kernel.h>
23902c4b24SDavid Lechner #include <linux/module.h>
24902c4b24SDavid Lechner #include <linux/regulator/consumer.h>
25902c4b24SDavid Lechner #include <linux/slab.h>
26902c4b24SDavid Lechner #include <linux/spi/spi.h>
27902c4b24SDavid Lechner
28902c4b24SDavid Lechner #include <linux/iio/buffer.h>
29902c4b24SDavid Lechner #include <linux/iio/iio.h>
30902c4b24SDavid Lechner #include <linux/iio/sysfs.h>
31902c4b24SDavid Lechner #include <linux/iio/trigger_consumer.h>
32902c4b24SDavid Lechner #include <linux/iio/triggered_buffer.h>
33902c4b24SDavid Lechner
348cfa26a7SAndy Shevchenko /*
358cfa26a7SAndy Shevchenko * In case of ACPI, we use the 5000 mV as default for the reference pin.
368cfa26a7SAndy Shevchenko * Device tree users encode that via the vref-supply regulator.
378cfa26a7SAndy Shevchenko */
388cfa26a7SAndy Shevchenko #define TI_ADS7950_VA_MV_ACPI_DEFAULT 5000
398cfa26a7SAndy Shevchenko
40c97dce79SJustin Chen #define TI_ADS7950_CR_GPIO BIT(14)
41902c4b24SDavid Lechner #define TI_ADS7950_CR_MANUAL BIT(12)
42902c4b24SDavid Lechner #define TI_ADS7950_CR_WRITE BIT(11)
43902c4b24SDavid Lechner #define TI_ADS7950_CR_CHAN(ch) ((ch) << 7)
44902c4b24SDavid Lechner #define TI_ADS7950_CR_RANGE_5V BIT(6)
45c97dce79SJustin Chen #define TI_ADS7950_CR_GPIO_DATA BIT(4)
46902c4b24SDavid Lechner
47902c4b24SDavid Lechner #define TI_ADS7950_MAX_CHAN 16
48c97dce79SJustin Chen #define TI_ADS7950_NUM_GPIOS 4
49902c4b24SDavid Lechner
50902c4b24SDavid Lechner #define TI_ADS7950_TIMESTAMP_SIZE (sizeof(int64_t) / sizeof(__be16))
51902c4b24SDavid Lechner
52902c4b24SDavid Lechner /* val = value, dec = left shift, bits = number of bits of the mask */
53902c4b24SDavid Lechner #define TI_ADS7950_EXTRACT(val, dec, bits) \
54902c4b24SDavid Lechner (((val) >> (dec)) & ((1 << (bits)) - 1))
55902c4b24SDavid Lechner
56c97dce79SJustin Chen #define TI_ADS7950_MAN_CMD(cmd) (TI_ADS7950_CR_MANUAL | (cmd))
57c97dce79SJustin Chen #define TI_ADS7950_GPIO_CMD(cmd) (TI_ADS7950_CR_GPIO | (cmd))
58c97dce79SJustin Chen
59c97dce79SJustin Chen /* Manual mode configuration */
60c97dce79SJustin Chen #define TI_ADS7950_MAN_CMD_SETTINGS(st) \
61c97dce79SJustin Chen (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
62c97dce79SJustin Chen /* GPIO mode configuration */
63c97dce79SJustin Chen #define TI_ADS7950_GPIO_CMD_SETTINGS(st) \
64c97dce79SJustin Chen (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
65c97dce79SJustin Chen
66902c4b24SDavid Lechner struct ti_ads7950_state {
67902c4b24SDavid Lechner struct spi_device *spi;
68e2540da8SDavid Lechner struct spi_transfer ring_xfer;
69902c4b24SDavid Lechner struct spi_transfer scan_single_xfer[3];
70902c4b24SDavid Lechner struct spi_message ring_msg;
71902c4b24SDavid Lechner struct spi_message scan_single_msg;
72902c4b24SDavid Lechner
73abbde279SJustin Chen /* Lock to protect the spi xfer buffers */
74abbde279SJustin Chen struct mutex slock;
75c97dce79SJustin Chen struct gpio_chip chip;
76abbde279SJustin Chen
77902c4b24SDavid Lechner struct regulator *reg;
788cfa26a7SAndy Shevchenko unsigned int vref_mv;
79902c4b24SDavid Lechner
80c97dce79SJustin Chen /*
81c97dce79SJustin Chen * Bitmask of lower 7 bits used for configuration
82c97dce79SJustin Chen * These bits only can be written when TI_ADS7950_CR_WRITE
83c97dce79SJustin Chen * is set, otherwise it retains its original state.
84c97dce79SJustin Chen * [0-3] GPIO signal
85c97dce79SJustin Chen * [4] Set following frame to return GPIO signal values
86c97dce79SJustin Chen * [5] Powers down device
87c97dce79SJustin Chen * [6] Sets Vref range1(2.5v) or range2(5v)
88c97dce79SJustin Chen *
89c97dce79SJustin Chen * Bits present on Manual/Auto1/Auto2 commands
90c97dce79SJustin Chen */
91c97dce79SJustin Chen unsigned int cmd_settings_bitmask;
92c97dce79SJustin Chen
93c97dce79SJustin Chen /*
94c97dce79SJustin Chen * Bitmask of GPIO command
95c97dce79SJustin Chen * [0-3] GPIO direction
96c97dce79SJustin Chen * [4-6] Different GPIO alarm mode configurations
97c97dce79SJustin Chen * [7] GPIO 2 as device range input
98c97dce79SJustin Chen * [8] GPIO 3 as device power down input
99c97dce79SJustin Chen * [9] Reset all registers
100c97dce79SJustin Chen * [10-11] N/A
101c97dce79SJustin Chen */
102c97dce79SJustin Chen unsigned int gpio_cmd_settings_bitmask;
103902c4b24SDavid Lechner
104902c4b24SDavid Lechner /*
105dd54ba8bSJonathan Cameron * DMA (thus cache coherency maintenance) may require the
106902c4b24SDavid Lechner * transfer buffers to live in their own cache lines.
107902c4b24SDavid Lechner */
108e2540da8SDavid Lechner u16 rx_buf[TI_ADS7950_MAX_CHAN + 2 + TI_ADS7950_TIMESTAMP_SIZE]
109dd54ba8bSJonathan Cameron __aligned(IIO_DMA_MINALIGN);
110e2540da8SDavid Lechner u16 tx_buf[TI_ADS7950_MAX_CHAN + 2];
111e2540da8SDavid Lechner u16 single_tx;
112e2540da8SDavid Lechner u16 single_rx;
1138134b613SDavid Lechner
114902c4b24SDavid Lechner };
115902c4b24SDavid Lechner
116902c4b24SDavid Lechner struct ti_ads7950_chip_info {
117902c4b24SDavid Lechner const struct iio_chan_spec *channels;
118902c4b24SDavid Lechner unsigned int num_channels;
119902c4b24SDavid Lechner };
120902c4b24SDavid Lechner
121902c4b24SDavid Lechner enum ti_ads7950_id {
122902c4b24SDavid Lechner TI_ADS7950,
123902c4b24SDavid Lechner TI_ADS7951,
124902c4b24SDavid Lechner TI_ADS7952,
125902c4b24SDavid Lechner TI_ADS7953,
126902c4b24SDavid Lechner TI_ADS7954,
127902c4b24SDavid Lechner TI_ADS7955,
128902c4b24SDavid Lechner TI_ADS7956,
129902c4b24SDavid Lechner TI_ADS7957,
130902c4b24SDavid Lechner TI_ADS7958,
131902c4b24SDavid Lechner TI_ADS7959,
132902c4b24SDavid Lechner TI_ADS7960,
133902c4b24SDavid Lechner TI_ADS7961,
134902c4b24SDavid Lechner };
135902c4b24SDavid Lechner
136902c4b24SDavid Lechner #define TI_ADS7950_V_CHAN(index, bits) \
137902c4b24SDavid Lechner { \
138902c4b24SDavid Lechner .type = IIO_VOLTAGE, \
139902c4b24SDavid Lechner .indexed = 1, \
140902c4b24SDavid Lechner .channel = index, \
141902c4b24SDavid Lechner .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
142902c4b24SDavid Lechner .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
143902c4b24SDavid Lechner .address = index, \
144902c4b24SDavid Lechner .datasheet_name = "CH##index", \
145902c4b24SDavid Lechner .scan_index = index, \
146902c4b24SDavid Lechner .scan_type = { \
147902c4b24SDavid Lechner .sign = 'u', \
148902c4b24SDavid Lechner .realbits = bits, \
149902c4b24SDavid Lechner .storagebits = 16, \
150902c4b24SDavid Lechner .shift = 12 - (bits), \
151e2540da8SDavid Lechner .endianness = IIO_CPU, \
152902c4b24SDavid Lechner }, \
153902c4b24SDavid Lechner }
154902c4b24SDavid Lechner
155902c4b24SDavid Lechner #define DECLARE_TI_ADS7950_4_CHANNELS(name, bits) \
156902c4b24SDavid Lechner const struct iio_chan_spec name ## _channels[] = { \
157902c4b24SDavid Lechner TI_ADS7950_V_CHAN(0, bits), \
158902c4b24SDavid Lechner TI_ADS7950_V_CHAN(1, bits), \
159902c4b24SDavid Lechner TI_ADS7950_V_CHAN(2, bits), \
160902c4b24SDavid Lechner TI_ADS7950_V_CHAN(3, bits), \
161902c4b24SDavid Lechner IIO_CHAN_SOFT_TIMESTAMP(4), \
162902c4b24SDavid Lechner }
163902c4b24SDavid Lechner
164902c4b24SDavid Lechner #define DECLARE_TI_ADS7950_8_CHANNELS(name, bits) \
165902c4b24SDavid Lechner const struct iio_chan_spec name ## _channels[] = { \
166902c4b24SDavid Lechner TI_ADS7950_V_CHAN(0, bits), \
167902c4b24SDavid Lechner TI_ADS7950_V_CHAN(1, bits), \
168902c4b24SDavid Lechner TI_ADS7950_V_CHAN(2, bits), \
169902c4b24SDavid Lechner TI_ADS7950_V_CHAN(3, bits), \
170902c4b24SDavid Lechner TI_ADS7950_V_CHAN(4, bits), \
171902c4b24SDavid Lechner TI_ADS7950_V_CHAN(5, bits), \
172902c4b24SDavid Lechner TI_ADS7950_V_CHAN(6, bits), \
173902c4b24SDavid Lechner TI_ADS7950_V_CHAN(7, bits), \
174902c4b24SDavid Lechner IIO_CHAN_SOFT_TIMESTAMP(8), \
175902c4b24SDavid Lechner }
176902c4b24SDavid Lechner
177902c4b24SDavid Lechner #define DECLARE_TI_ADS7950_12_CHANNELS(name, bits) \
178902c4b24SDavid Lechner const struct iio_chan_spec name ## _channels[] = { \
179902c4b24SDavid Lechner TI_ADS7950_V_CHAN(0, bits), \
180902c4b24SDavid Lechner TI_ADS7950_V_CHAN(1, bits), \
181902c4b24SDavid Lechner TI_ADS7950_V_CHAN(2, bits), \
182902c4b24SDavid Lechner TI_ADS7950_V_CHAN(3, bits), \
183902c4b24SDavid Lechner TI_ADS7950_V_CHAN(4, bits), \
184902c4b24SDavid Lechner TI_ADS7950_V_CHAN(5, bits), \
185902c4b24SDavid Lechner TI_ADS7950_V_CHAN(6, bits), \
186902c4b24SDavid Lechner TI_ADS7950_V_CHAN(7, bits), \
187902c4b24SDavid Lechner TI_ADS7950_V_CHAN(8, bits), \
188902c4b24SDavid Lechner TI_ADS7950_V_CHAN(9, bits), \
189902c4b24SDavid Lechner TI_ADS7950_V_CHAN(10, bits), \
190902c4b24SDavid Lechner TI_ADS7950_V_CHAN(11, bits), \
191902c4b24SDavid Lechner IIO_CHAN_SOFT_TIMESTAMP(12), \
192902c4b24SDavid Lechner }
193902c4b24SDavid Lechner
194902c4b24SDavid Lechner #define DECLARE_TI_ADS7950_16_CHANNELS(name, bits) \
195902c4b24SDavid Lechner const struct iio_chan_spec name ## _channels[] = { \
196902c4b24SDavid Lechner TI_ADS7950_V_CHAN(0, bits), \
197902c4b24SDavid Lechner TI_ADS7950_V_CHAN(1, bits), \
198902c4b24SDavid Lechner TI_ADS7950_V_CHAN(2, bits), \
199902c4b24SDavid Lechner TI_ADS7950_V_CHAN(3, bits), \
200902c4b24SDavid Lechner TI_ADS7950_V_CHAN(4, bits), \
201902c4b24SDavid Lechner TI_ADS7950_V_CHAN(5, bits), \
202902c4b24SDavid Lechner TI_ADS7950_V_CHAN(6, bits), \
203902c4b24SDavid Lechner TI_ADS7950_V_CHAN(7, bits), \
204902c4b24SDavid Lechner TI_ADS7950_V_CHAN(8, bits), \
205902c4b24SDavid Lechner TI_ADS7950_V_CHAN(9, bits), \
206902c4b24SDavid Lechner TI_ADS7950_V_CHAN(10, bits), \
207902c4b24SDavid Lechner TI_ADS7950_V_CHAN(11, bits), \
208902c4b24SDavid Lechner TI_ADS7950_V_CHAN(12, bits), \
209902c4b24SDavid Lechner TI_ADS7950_V_CHAN(13, bits), \
210902c4b24SDavid Lechner TI_ADS7950_V_CHAN(14, bits), \
211902c4b24SDavid Lechner TI_ADS7950_V_CHAN(15, bits), \
212902c4b24SDavid Lechner IIO_CHAN_SOFT_TIMESTAMP(16), \
213902c4b24SDavid Lechner }
214902c4b24SDavid Lechner
215902c4b24SDavid Lechner static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7950, 12);
216902c4b24SDavid Lechner static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7951, 12);
217902c4b24SDavid Lechner static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7952, 12);
218902c4b24SDavid Lechner static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7953, 12);
219902c4b24SDavid Lechner static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7954, 10);
220902c4b24SDavid Lechner static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7955, 10);
221902c4b24SDavid Lechner static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7956, 10);
222902c4b24SDavid Lechner static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7957, 10);
223902c4b24SDavid Lechner static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7958, 8);
224902c4b24SDavid Lechner static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7959, 8);
225902c4b24SDavid Lechner static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7960, 8);
226902c4b24SDavid Lechner static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7961, 8);
227902c4b24SDavid Lechner
228902c4b24SDavid Lechner static const struct ti_ads7950_chip_info ti_ads7950_chip_info[] = {
229902c4b24SDavid Lechner [TI_ADS7950] = {
230902c4b24SDavid Lechner .channels = ti_ads7950_channels,
231902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7950_channels),
232902c4b24SDavid Lechner },
233902c4b24SDavid Lechner [TI_ADS7951] = {
234902c4b24SDavid Lechner .channels = ti_ads7951_channels,
235902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7951_channels),
236902c4b24SDavid Lechner },
237902c4b24SDavid Lechner [TI_ADS7952] = {
238902c4b24SDavid Lechner .channels = ti_ads7952_channels,
239902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7952_channels),
240902c4b24SDavid Lechner },
241902c4b24SDavid Lechner [TI_ADS7953] = {
242902c4b24SDavid Lechner .channels = ti_ads7953_channels,
243902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7953_channels),
244902c4b24SDavid Lechner },
245902c4b24SDavid Lechner [TI_ADS7954] = {
246902c4b24SDavid Lechner .channels = ti_ads7954_channels,
247902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7954_channels),
248902c4b24SDavid Lechner },
249902c4b24SDavid Lechner [TI_ADS7955] = {
250902c4b24SDavid Lechner .channels = ti_ads7955_channels,
251902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7955_channels),
252902c4b24SDavid Lechner },
253902c4b24SDavid Lechner [TI_ADS7956] = {
254902c4b24SDavid Lechner .channels = ti_ads7956_channels,
255902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7956_channels),
256902c4b24SDavid Lechner },
257902c4b24SDavid Lechner [TI_ADS7957] = {
258902c4b24SDavid Lechner .channels = ti_ads7957_channels,
259902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7957_channels),
260902c4b24SDavid Lechner },
261902c4b24SDavid Lechner [TI_ADS7958] = {
262902c4b24SDavid Lechner .channels = ti_ads7958_channels,
263902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7958_channels),
264902c4b24SDavid Lechner },
265902c4b24SDavid Lechner [TI_ADS7959] = {
266902c4b24SDavid Lechner .channels = ti_ads7959_channels,
267902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7959_channels),
268902c4b24SDavid Lechner },
269902c4b24SDavid Lechner [TI_ADS7960] = {
270902c4b24SDavid Lechner .channels = ti_ads7960_channels,
271902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7960_channels),
272902c4b24SDavid Lechner },
273902c4b24SDavid Lechner [TI_ADS7961] = {
274902c4b24SDavid Lechner .channels = ti_ads7961_channels,
275902c4b24SDavid Lechner .num_channels = ARRAY_SIZE(ti_ads7961_channels),
276902c4b24SDavid Lechner },
277902c4b24SDavid Lechner };
278902c4b24SDavid Lechner
279902c4b24SDavid Lechner /*
280902c4b24SDavid Lechner * ti_ads7950_update_scan_mode() setup the spi transfer buffer for the new
281902c4b24SDavid Lechner * scan mask
282902c4b24SDavid Lechner */
ti_ads7950_update_scan_mode(struct iio_dev * indio_dev,const unsigned long * active_scan_mask)283902c4b24SDavid Lechner static int ti_ads7950_update_scan_mode(struct iio_dev *indio_dev,
284902c4b24SDavid Lechner const unsigned long *active_scan_mask)
285902c4b24SDavid Lechner {
286902c4b24SDavid Lechner struct ti_ads7950_state *st = iio_priv(indio_dev);
287902c4b24SDavid Lechner int i, cmd, len;
288902c4b24SDavid Lechner
289902c4b24SDavid Lechner len = 0;
290902c4b24SDavid Lechner for_each_set_bit(i, active_scan_mask, indio_dev->num_channels) {
291c97dce79SJustin Chen cmd = TI_ADS7950_MAN_CMD(TI_ADS7950_CR_CHAN(i));
292e2540da8SDavid Lechner st->tx_buf[len++] = cmd;
293902c4b24SDavid Lechner }
294902c4b24SDavid Lechner
295902c4b24SDavid Lechner /* Data for the 1st channel is not returned until the 3rd transfer */
296e2540da8SDavid Lechner st->tx_buf[len++] = 0;
297e2540da8SDavid Lechner st->tx_buf[len++] = 0;
298902c4b24SDavid Lechner
299e2540da8SDavid Lechner st->ring_xfer.len = len * 2;
300902c4b24SDavid Lechner
301902c4b24SDavid Lechner return 0;
302902c4b24SDavid Lechner }
303902c4b24SDavid Lechner
ti_ads7950_trigger_handler(int irq,void * p)304902c4b24SDavid Lechner static irqreturn_t ti_ads7950_trigger_handler(int irq, void *p)
305902c4b24SDavid Lechner {
306902c4b24SDavid Lechner struct iio_poll_func *pf = p;
307902c4b24SDavid Lechner struct iio_dev *indio_dev = pf->indio_dev;
308902c4b24SDavid Lechner struct ti_ads7950_state *st = iio_priv(indio_dev);
309902c4b24SDavid Lechner int ret;
310902c4b24SDavid Lechner
311abbde279SJustin Chen mutex_lock(&st->slock);
312902c4b24SDavid Lechner ret = spi_sync(st->spi, &st->ring_msg);
313902c4b24SDavid Lechner if (ret < 0)
314902c4b24SDavid Lechner goto out;
315902c4b24SDavid Lechner
316e2540da8SDavid Lechner iio_push_to_buffers_with_timestamp(indio_dev, &st->rx_buf[2],
317902c4b24SDavid Lechner iio_get_time_ns(indio_dev));
318902c4b24SDavid Lechner
319902c4b24SDavid Lechner out:
320abbde279SJustin Chen mutex_unlock(&st->slock);
321902c4b24SDavid Lechner iio_trigger_notify_done(indio_dev->trig);
322902c4b24SDavid Lechner
323902c4b24SDavid Lechner return IRQ_HANDLED;
324902c4b24SDavid Lechner }
325902c4b24SDavid Lechner
ti_ads7950_scan_direct(struct iio_dev * indio_dev,unsigned int ch)3268134b613SDavid Lechner static int ti_ads7950_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
327902c4b24SDavid Lechner {
3288134b613SDavid Lechner struct ti_ads7950_state *st = iio_priv(indio_dev);
329902c4b24SDavid Lechner int ret, cmd;
330902c4b24SDavid Lechner
331abbde279SJustin Chen mutex_lock(&st->slock);
332c97dce79SJustin Chen cmd = TI_ADS7950_MAN_CMD(TI_ADS7950_CR_CHAN(ch));
333e2540da8SDavid Lechner st->single_tx = cmd;
334902c4b24SDavid Lechner
335902c4b24SDavid Lechner ret = spi_sync(st->spi, &st->scan_single_msg);
336902c4b24SDavid Lechner if (ret)
3378134b613SDavid Lechner goto out;
338902c4b24SDavid Lechner
339e2540da8SDavid Lechner ret = st->single_rx;
3408134b613SDavid Lechner
3418134b613SDavid Lechner out:
342abbde279SJustin Chen mutex_unlock(&st->slock);
3438134b613SDavid Lechner
3448134b613SDavid Lechner return ret;
345902c4b24SDavid Lechner }
346902c4b24SDavid Lechner
ti_ads7950_get_range(struct ti_ads7950_state * st)347902c4b24SDavid Lechner static int ti_ads7950_get_range(struct ti_ads7950_state *st)
348902c4b24SDavid Lechner {
349902c4b24SDavid Lechner int vref;
350902c4b24SDavid Lechner
3518cfa26a7SAndy Shevchenko if (st->vref_mv) {
3528cfa26a7SAndy Shevchenko vref = st->vref_mv;
3538cfa26a7SAndy Shevchenko } else {
354902c4b24SDavid Lechner vref = regulator_get_voltage(st->reg);
355902c4b24SDavid Lechner if (vref < 0)
356902c4b24SDavid Lechner return vref;
357902c4b24SDavid Lechner
358902c4b24SDavid Lechner vref /= 1000;
3598cfa26a7SAndy Shevchenko }
360902c4b24SDavid Lechner
361c97dce79SJustin Chen if (st->cmd_settings_bitmask & TI_ADS7950_CR_RANGE_5V)
362902c4b24SDavid Lechner vref *= 2;
363902c4b24SDavid Lechner
364902c4b24SDavid Lechner return vref;
365902c4b24SDavid Lechner }
366902c4b24SDavid Lechner
ti_ads7950_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)367902c4b24SDavid Lechner static int ti_ads7950_read_raw(struct iio_dev *indio_dev,
368902c4b24SDavid Lechner struct iio_chan_spec const *chan,
369902c4b24SDavid Lechner int *val, int *val2, long m)
370902c4b24SDavid Lechner {
371902c4b24SDavid Lechner struct ti_ads7950_state *st = iio_priv(indio_dev);
372902c4b24SDavid Lechner int ret;
373902c4b24SDavid Lechner
374902c4b24SDavid Lechner switch (m) {
375902c4b24SDavid Lechner case IIO_CHAN_INFO_RAW:
3768134b613SDavid Lechner ret = ti_ads7950_scan_direct(indio_dev, chan->address);
377902c4b24SDavid Lechner if (ret < 0)
378902c4b24SDavid Lechner return ret;
379902c4b24SDavid Lechner
380902c4b24SDavid Lechner if (chan->address != TI_ADS7950_EXTRACT(ret, 12, 4))
381902c4b24SDavid Lechner return -EIO;
382902c4b24SDavid Lechner
383902c4b24SDavid Lechner *val = TI_ADS7950_EXTRACT(ret, chan->scan_type.shift,
384902c4b24SDavid Lechner chan->scan_type.realbits);
385902c4b24SDavid Lechner
386902c4b24SDavid Lechner return IIO_VAL_INT;
387902c4b24SDavid Lechner case IIO_CHAN_INFO_SCALE:
388902c4b24SDavid Lechner ret = ti_ads7950_get_range(st);
389902c4b24SDavid Lechner if (ret < 0)
390902c4b24SDavid Lechner return ret;
391902c4b24SDavid Lechner
392902c4b24SDavid Lechner *val = ret;
393902c4b24SDavid Lechner *val2 = (1 << chan->scan_type.realbits) - 1;
394902c4b24SDavid Lechner
395902c4b24SDavid Lechner return IIO_VAL_FRACTIONAL;
396902c4b24SDavid Lechner }
397902c4b24SDavid Lechner
398902c4b24SDavid Lechner return -EINVAL;
399902c4b24SDavid Lechner }
400902c4b24SDavid Lechner
401902c4b24SDavid Lechner static const struct iio_info ti_ads7950_info = {
402902c4b24SDavid Lechner .read_raw = &ti_ads7950_read_raw,
403902c4b24SDavid Lechner .update_scan_mode = ti_ads7950_update_scan_mode,
404902c4b24SDavid Lechner };
405902c4b24SDavid Lechner
ti_ads7950_set(struct gpio_chip * chip,unsigned int offset,int value)406c97dce79SJustin Chen static void ti_ads7950_set(struct gpio_chip *chip, unsigned int offset,
407c97dce79SJustin Chen int value)
408c97dce79SJustin Chen {
409c97dce79SJustin Chen struct ti_ads7950_state *st = gpiochip_get_data(chip);
410c97dce79SJustin Chen
411c97dce79SJustin Chen mutex_lock(&st->slock);
412c97dce79SJustin Chen
413c97dce79SJustin Chen if (value)
414c97dce79SJustin Chen st->cmd_settings_bitmask |= BIT(offset);
415c97dce79SJustin Chen else
416c97dce79SJustin Chen st->cmd_settings_bitmask &= ~BIT(offset);
417c97dce79SJustin Chen
418c97dce79SJustin Chen st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
419c97dce79SJustin Chen spi_sync(st->spi, &st->scan_single_msg);
420c97dce79SJustin Chen
421c97dce79SJustin Chen mutex_unlock(&st->slock);
422c97dce79SJustin Chen }
423c97dce79SJustin Chen
ti_ads7950_get(struct gpio_chip * chip,unsigned int offset)424c97dce79SJustin Chen static int ti_ads7950_get(struct gpio_chip *chip, unsigned int offset)
425c97dce79SJustin Chen {
426c97dce79SJustin Chen struct ti_ads7950_state *st = gpiochip_get_data(chip);
427c97dce79SJustin Chen int ret;
428c97dce79SJustin Chen
429c97dce79SJustin Chen mutex_lock(&st->slock);
430c97dce79SJustin Chen
431c97dce79SJustin Chen /* If set as output, return the output */
432c97dce79SJustin Chen if (st->gpio_cmd_settings_bitmask & BIT(offset)) {
433c97dce79SJustin Chen ret = st->cmd_settings_bitmask & BIT(offset);
434c97dce79SJustin Chen goto out;
435c97dce79SJustin Chen }
436c97dce79SJustin Chen
437c97dce79SJustin Chen /* GPIO data bit sets SDO bits 12-15 to GPIO input */
438c97dce79SJustin Chen st->cmd_settings_bitmask |= TI_ADS7950_CR_GPIO_DATA;
439c97dce79SJustin Chen st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
440c97dce79SJustin Chen ret = spi_sync(st->spi, &st->scan_single_msg);
441c97dce79SJustin Chen if (ret)
442c97dce79SJustin Chen goto out;
443c97dce79SJustin Chen
444c97dce79SJustin Chen ret = ((st->single_rx >> 12) & BIT(offset)) ? 1 : 0;
445c97dce79SJustin Chen
446c97dce79SJustin Chen /* Revert back to original settings */
447c97dce79SJustin Chen st->cmd_settings_bitmask &= ~TI_ADS7950_CR_GPIO_DATA;
448c97dce79SJustin Chen st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
449c97dce79SJustin Chen ret = spi_sync(st->spi, &st->scan_single_msg);
450c97dce79SJustin Chen if (ret)
451c97dce79SJustin Chen goto out;
452c97dce79SJustin Chen
453c97dce79SJustin Chen out:
454c97dce79SJustin Chen mutex_unlock(&st->slock);
455c97dce79SJustin Chen
456c97dce79SJustin Chen return ret;
457c97dce79SJustin Chen }
458c97dce79SJustin Chen
ti_ads7950_get_direction(struct gpio_chip * chip,unsigned int offset)459c97dce79SJustin Chen static int ti_ads7950_get_direction(struct gpio_chip *chip,
460c97dce79SJustin Chen unsigned int offset)
461c97dce79SJustin Chen {
462c97dce79SJustin Chen struct ti_ads7950_state *st = gpiochip_get_data(chip);
463c97dce79SJustin Chen
464c97dce79SJustin Chen /* Bitmask is inverted from GPIO framework 0=input/1=output */
465c97dce79SJustin Chen return !(st->gpio_cmd_settings_bitmask & BIT(offset));
466c97dce79SJustin Chen }
467c97dce79SJustin Chen
_ti_ads7950_set_direction(struct gpio_chip * chip,int offset,int input)468c97dce79SJustin Chen static int _ti_ads7950_set_direction(struct gpio_chip *chip, int offset,
469c97dce79SJustin Chen int input)
470c97dce79SJustin Chen {
471c97dce79SJustin Chen struct ti_ads7950_state *st = gpiochip_get_data(chip);
472c97dce79SJustin Chen int ret = 0;
473c97dce79SJustin Chen
474c97dce79SJustin Chen mutex_lock(&st->slock);
475c97dce79SJustin Chen
476c97dce79SJustin Chen /* Only change direction if needed */
477c97dce79SJustin Chen if (input && (st->gpio_cmd_settings_bitmask & BIT(offset)))
478c97dce79SJustin Chen st->gpio_cmd_settings_bitmask &= ~BIT(offset);
479c97dce79SJustin Chen else if (!input && !(st->gpio_cmd_settings_bitmask & BIT(offset)))
480c97dce79SJustin Chen st->gpio_cmd_settings_bitmask |= BIT(offset);
481c97dce79SJustin Chen else
482c97dce79SJustin Chen goto out;
483c97dce79SJustin Chen
484c97dce79SJustin Chen st->single_tx = TI_ADS7950_GPIO_CMD_SETTINGS(st);
485c97dce79SJustin Chen ret = spi_sync(st->spi, &st->scan_single_msg);
486c97dce79SJustin Chen
487c97dce79SJustin Chen out:
488c97dce79SJustin Chen mutex_unlock(&st->slock);
489c97dce79SJustin Chen
490c97dce79SJustin Chen return ret;
491c97dce79SJustin Chen }
492c97dce79SJustin Chen
ti_ads7950_direction_input(struct gpio_chip * chip,unsigned int offset)493c97dce79SJustin Chen static int ti_ads7950_direction_input(struct gpio_chip *chip,
494c97dce79SJustin Chen unsigned int offset)
495c97dce79SJustin Chen {
496c97dce79SJustin Chen return _ti_ads7950_set_direction(chip, offset, 1);
497c97dce79SJustin Chen }
498c97dce79SJustin Chen
ti_ads7950_direction_output(struct gpio_chip * chip,unsigned int offset,int value)499c97dce79SJustin Chen static int ti_ads7950_direction_output(struct gpio_chip *chip,
500c97dce79SJustin Chen unsigned int offset, int value)
501c97dce79SJustin Chen {
502c97dce79SJustin Chen ti_ads7950_set(chip, offset, value);
503c97dce79SJustin Chen
504c97dce79SJustin Chen return _ti_ads7950_set_direction(chip, offset, 0);
505c97dce79SJustin Chen }
506c97dce79SJustin Chen
ti_ads7950_init_hw(struct ti_ads7950_state * st)507c97dce79SJustin Chen static int ti_ads7950_init_hw(struct ti_ads7950_state *st)
508c97dce79SJustin Chen {
509c97dce79SJustin Chen int ret = 0;
510c97dce79SJustin Chen
511c97dce79SJustin Chen mutex_lock(&st->slock);
512c97dce79SJustin Chen
513c97dce79SJustin Chen /* Settings for Manual/Auto1/Auto2 commands */
514c97dce79SJustin Chen /* Default to 5v ref */
515c97dce79SJustin Chen st->cmd_settings_bitmask = TI_ADS7950_CR_RANGE_5V;
516c97dce79SJustin Chen st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
517c97dce79SJustin Chen ret = spi_sync(st->spi, &st->scan_single_msg);
518c97dce79SJustin Chen if (ret)
519c97dce79SJustin Chen goto out;
520c97dce79SJustin Chen
521c97dce79SJustin Chen /* Settings for GPIO command */
522c97dce79SJustin Chen st->gpio_cmd_settings_bitmask = 0x0;
523c97dce79SJustin Chen st->single_tx = TI_ADS7950_GPIO_CMD_SETTINGS(st);
524c97dce79SJustin Chen ret = spi_sync(st->spi, &st->scan_single_msg);
525c97dce79SJustin Chen
526c97dce79SJustin Chen out:
527c97dce79SJustin Chen mutex_unlock(&st->slock);
528c97dce79SJustin Chen
529c97dce79SJustin Chen return ret;
530c97dce79SJustin Chen }
531c97dce79SJustin Chen
ti_ads7950_probe(struct spi_device * spi)532902c4b24SDavid Lechner static int ti_ads7950_probe(struct spi_device *spi)
533902c4b24SDavid Lechner {
534902c4b24SDavid Lechner struct ti_ads7950_state *st;
535902c4b24SDavid Lechner struct iio_dev *indio_dev;
536902c4b24SDavid Lechner const struct ti_ads7950_chip_info *info;
537902c4b24SDavid Lechner int ret;
538902c4b24SDavid Lechner
539e2540da8SDavid Lechner spi->bits_per_word = 16;
540e2540da8SDavid Lechner spi->mode |= SPI_CS_WORD;
541e2540da8SDavid Lechner ret = spi_setup(spi);
542e2540da8SDavid Lechner if (ret < 0) {
543e2540da8SDavid Lechner dev_err(&spi->dev, "Error in spi setup\n");
544e2540da8SDavid Lechner return ret;
545e2540da8SDavid Lechner }
546e2540da8SDavid Lechner
547902c4b24SDavid Lechner indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
548902c4b24SDavid Lechner if (!indio_dev)
549902c4b24SDavid Lechner return -ENOMEM;
550902c4b24SDavid Lechner
551902c4b24SDavid Lechner st = iio_priv(indio_dev);
552902c4b24SDavid Lechner
553902c4b24SDavid Lechner spi_set_drvdata(spi, indio_dev);
554902c4b24SDavid Lechner
555902c4b24SDavid Lechner st->spi = spi;
556902c4b24SDavid Lechner
557902c4b24SDavid Lechner info = &ti_ads7950_chip_info[spi_get_device_id(spi)->driver_data];
558902c4b24SDavid Lechner
559902c4b24SDavid Lechner indio_dev->name = spi_get_device_id(spi)->name;
560902c4b24SDavid Lechner indio_dev->modes = INDIO_DIRECT_MODE;
561902c4b24SDavid Lechner indio_dev->channels = info->channels;
562902c4b24SDavid Lechner indio_dev->num_channels = info->num_channels;
563902c4b24SDavid Lechner indio_dev->info = &ti_ads7950_info;
564902c4b24SDavid Lechner
565e2540da8SDavid Lechner /* build spi ring message */
566e2540da8SDavid Lechner spi_message_init(&st->ring_msg);
567e2540da8SDavid Lechner
568e2540da8SDavid Lechner st->ring_xfer.tx_buf = &st->tx_buf[0];
569e2540da8SDavid Lechner st->ring_xfer.rx_buf = &st->rx_buf[0];
570e2540da8SDavid Lechner /* len will be set later */
571e2540da8SDavid Lechner
572e2540da8SDavid Lechner spi_message_add_tail(&st->ring_xfer, &st->ring_msg);
573e2540da8SDavid Lechner
574902c4b24SDavid Lechner /*
575902c4b24SDavid Lechner * Setup default message. The sample is read at the end of the first
576902c4b24SDavid Lechner * transfer, then it takes one full cycle to convert the sample and one
577902c4b24SDavid Lechner * more cycle to send the value. The conversion process is driven by
578902c4b24SDavid Lechner * the SPI clock, which is why we have 3 transfers. The middle one is
579902c4b24SDavid Lechner * just dummy data sent while the chip is converting the sample that
580902c4b24SDavid Lechner * was read at the end of the first transfer.
581902c4b24SDavid Lechner */
582902c4b24SDavid Lechner
5838134b613SDavid Lechner st->scan_single_xfer[0].tx_buf = &st->single_tx;
584902c4b24SDavid Lechner st->scan_single_xfer[0].len = 2;
585902c4b24SDavid Lechner st->scan_single_xfer[0].cs_change = 1;
5868134b613SDavid Lechner st->scan_single_xfer[1].tx_buf = &st->single_tx;
587902c4b24SDavid Lechner st->scan_single_xfer[1].len = 2;
588902c4b24SDavid Lechner st->scan_single_xfer[1].cs_change = 1;
5898134b613SDavid Lechner st->scan_single_xfer[2].rx_buf = &st->single_rx;
590902c4b24SDavid Lechner st->scan_single_xfer[2].len = 2;
591902c4b24SDavid Lechner
592902c4b24SDavid Lechner spi_message_init_with_transfers(&st->scan_single_msg,
593902c4b24SDavid Lechner st->scan_single_xfer, 3);
594902c4b24SDavid Lechner
5958cfa26a7SAndy Shevchenko /* Use hard coded value for reference voltage in ACPI case */
5968cfa26a7SAndy Shevchenko if (ACPI_COMPANION(&spi->dev))
5978cfa26a7SAndy Shevchenko st->vref_mv = TI_ADS7950_VA_MV_ACPI_DEFAULT;
5988cfa26a7SAndy Shevchenko
599abbde279SJustin Chen mutex_init(&st->slock);
600abbde279SJustin Chen
6010bf1a2aaSDavid Lechner st->reg = devm_regulator_get(&spi->dev, "vref");
602902c4b24SDavid Lechner if (IS_ERR(st->reg)) {
60342351035SCai Huoqing ret = dev_err_probe(&spi->dev, PTR_ERR(st->reg),
60442351035SCai Huoqing "Failed to get regulator \"vref\"\n");
605abbde279SJustin Chen goto error_destroy_mutex;
606902c4b24SDavid Lechner }
607902c4b24SDavid Lechner
608902c4b24SDavid Lechner ret = regulator_enable(st->reg);
609902c4b24SDavid Lechner if (ret) {
6100bf1a2aaSDavid Lechner dev_err(&spi->dev, "Failed to enable regulator \"vref\"\n");
611abbde279SJustin Chen goto error_destroy_mutex;
612902c4b24SDavid Lechner }
613902c4b24SDavid Lechner
614902c4b24SDavid Lechner ret = iio_triggered_buffer_setup(indio_dev, NULL,
615902c4b24SDavid Lechner &ti_ads7950_trigger_handler, NULL);
616902c4b24SDavid Lechner if (ret) {
617902c4b24SDavid Lechner dev_err(&spi->dev, "Failed to setup triggered buffer\n");
618902c4b24SDavid Lechner goto error_disable_reg;
619902c4b24SDavid Lechner }
620902c4b24SDavid Lechner
621c97dce79SJustin Chen ret = ti_ads7950_init_hw(st);
622c97dce79SJustin Chen if (ret) {
623c97dce79SJustin Chen dev_err(&spi->dev, "Failed to init adc chip\n");
624c97dce79SJustin Chen goto error_cleanup_ring;
625c97dce79SJustin Chen }
626c97dce79SJustin Chen
627902c4b24SDavid Lechner ret = iio_device_register(indio_dev);
628902c4b24SDavid Lechner if (ret) {
629902c4b24SDavid Lechner dev_err(&spi->dev, "Failed to register iio device\n");
630902c4b24SDavid Lechner goto error_cleanup_ring;
631902c4b24SDavid Lechner }
632902c4b24SDavid Lechner
633c97dce79SJustin Chen /* Add GPIO chip */
634c97dce79SJustin Chen st->chip.label = dev_name(&st->spi->dev);
635c97dce79SJustin Chen st->chip.parent = &st->spi->dev;
636c97dce79SJustin Chen st->chip.owner = THIS_MODULE;
637*363c7dc7SLars-Peter Clausen st->chip.can_sleep = true;
638c97dce79SJustin Chen st->chip.base = -1;
639c97dce79SJustin Chen st->chip.ngpio = TI_ADS7950_NUM_GPIOS;
640c97dce79SJustin Chen st->chip.get_direction = ti_ads7950_get_direction;
641c97dce79SJustin Chen st->chip.direction_input = ti_ads7950_direction_input;
642c97dce79SJustin Chen st->chip.direction_output = ti_ads7950_direction_output;
643c97dce79SJustin Chen st->chip.get = ti_ads7950_get;
644c97dce79SJustin Chen st->chip.set = ti_ads7950_set;
645c97dce79SJustin Chen
646c97dce79SJustin Chen ret = gpiochip_add_data(&st->chip, st);
647c97dce79SJustin Chen if (ret) {
648c97dce79SJustin Chen dev_err(&spi->dev, "Failed to init GPIOs\n");
649c97dce79SJustin Chen goto error_iio_device;
650c97dce79SJustin Chen }
651c97dce79SJustin Chen
652902c4b24SDavid Lechner return 0;
653902c4b24SDavid Lechner
654c97dce79SJustin Chen error_iio_device:
655c97dce79SJustin Chen iio_device_unregister(indio_dev);
656902c4b24SDavid Lechner error_cleanup_ring:
657902c4b24SDavid Lechner iio_triggered_buffer_cleanup(indio_dev);
658902c4b24SDavid Lechner error_disable_reg:
659902c4b24SDavid Lechner regulator_disable(st->reg);
660abbde279SJustin Chen error_destroy_mutex:
661abbde279SJustin Chen mutex_destroy(&st->slock);
662902c4b24SDavid Lechner
663902c4b24SDavid Lechner return ret;
664902c4b24SDavid Lechner }
665902c4b24SDavid Lechner
ti_ads7950_remove(struct spi_device * spi)666a0386bbaSUwe Kleine-König static void ti_ads7950_remove(struct spi_device *spi)
667902c4b24SDavid Lechner {
668902c4b24SDavid Lechner struct iio_dev *indio_dev = spi_get_drvdata(spi);
669902c4b24SDavid Lechner struct ti_ads7950_state *st = iio_priv(indio_dev);
670902c4b24SDavid Lechner
671c97dce79SJustin Chen gpiochip_remove(&st->chip);
672902c4b24SDavid Lechner iio_device_unregister(indio_dev);
673902c4b24SDavid Lechner iio_triggered_buffer_cleanup(indio_dev);
674902c4b24SDavid Lechner regulator_disable(st->reg);
675abbde279SJustin Chen mutex_destroy(&st->slock);
676902c4b24SDavid Lechner }
677902c4b24SDavid Lechner
678902c4b24SDavid Lechner static const struct spi_device_id ti_ads7950_id[] = {
6792b84f4deSDavid Lechner { "ads7950", TI_ADS7950 },
6802b84f4deSDavid Lechner { "ads7951", TI_ADS7951 },
6812b84f4deSDavid Lechner { "ads7952", TI_ADS7952 },
6822b84f4deSDavid Lechner { "ads7953", TI_ADS7953 },
6832b84f4deSDavid Lechner { "ads7954", TI_ADS7954 },
6842b84f4deSDavid Lechner { "ads7955", TI_ADS7955 },
6852b84f4deSDavid Lechner { "ads7956", TI_ADS7956 },
6862b84f4deSDavid Lechner { "ads7957", TI_ADS7957 },
6872b84f4deSDavid Lechner { "ads7958", TI_ADS7958 },
6882b84f4deSDavid Lechner { "ads7959", TI_ADS7959 },
6892b84f4deSDavid Lechner { "ads7960", TI_ADS7960 },
6902b84f4deSDavid Lechner { "ads7961", TI_ADS7961 },
691902c4b24SDavid Lechner { }
692902c4b24SDavid Lechner };
693902c4b24SDavid Lechner MODULE_DEVICE_TABLE(spi, ti_ads7950_id);
694902c4b24SDavid Lechner
695fb4b6f92SAndy Shevchenko static const struct of_device_id ads7950_of_table[] = {
696fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7950", .data = &ti_ads7950_chip_info[TI_ADS7950] },
697fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7951", .data = &ti_ads7950_chip_info[TI_ADS7951] },
698fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7952", .data = &ti_ads7950_chip_info[TI_ADS7952] },
699fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7953", .data = &ti_ads7950_chip_info[TI_ADS7953] },
700fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7954", .data = &ti_ads7950_chip_info[TI_ADS7954] },
701fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7955", .data = &ti_ads7950_chip_info[TI_ADS7955] },
702fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7956", .data = &ti_ads7950_chip_info[TI_ADS7956] },
703fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7957", .data = &ti_ads7950_chip_info[TI_ADS7957] },
704fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7958", .data = &ti_ads7950_chip_info[TI_ADS7958] },
705fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7959", .data = &ti_ads7950_chip_info[TI_ADS7959] },
706fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7960", .data = &ti_ads7950_chip_info[TI_ADS7960] },
707fb4b6f92SAndy Shevchenko { .compatible = "ti,ads7961", .data = &ti_ads7950_chip_info[TI_ADS7961] },
708fb4b6f92SAndy Shevchenko { },
709fb4b6f92SAndy Shevchenko };
710fb4b6f92SAndy Shevchenko MODULE_DEVICE_TABLE(of, ads7950_of_table);
711fb4b6f92SAndy Shevchenko
712902c4b24SDavid Lechner static struct spi_driver ti_ads7950_driver = {
713902c4b24SDavid Lechner .driver = {
7142b84f4deSDavid Lechner .name = "ads7950",
715fb4b6f92SAndy Shevchenko .of_match_table = ads7950_of_table,
716902c4b24SDavid Lechner },
717902c4b24SDavid Lechner .probe = ti_ads7950_probe,
718902c4b24SDavid Lechner .remove = ti_ads7950_remove,
719902c4b24SDavid Lechner .id_table = ti_ads7950_id,
720902c4b24SDavid Lechner };
721902c4b24SDavid Lechner module_spi_driver(ti_ads7950_driver);
722902c4b24SDavid Lechner
723902c4b24SDavid Lechner MODULE_AUTHOR("David Lechner <david@lechnology.com>");
724902c4b24SDavid Lechner MODULE_DESCRIPTION("TI TI_ADS7950 ADC");
725902c4b24SDavid Lechner MODULE_LICENSE("GPL v2");
726