| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | intel,ce4100-lapic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rtanwar@maxlinear.com>
28 [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf
32 const: intel,ce4100-lapic
37 interrupt-controller: true
39 '#interrupt-cells':
42 intel,virtual-wire-mode:
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| /openbmc/linux/drivers/iommu/ |
| H A D | irq_remapping.c | 1 // SPDX-License-Identifier: GPL-2.0-only
33 * With interrupt-remapping, for now we will use virtual wire A in irq_remapping_restore_boot_irq_mode()
34 * mode, as virtual wire B is little complex (need to configure in irq_remapping_restore_boot_irq_mode()
35 * both IOAPIC RTE as well as interrupt-remapping table entry). in irq_remapping_restore_boot_irq_mode()
58 return -EINVAL; in setup_irqremap()
93 return (remap_ops->capability & (1 << cap)); in irq_remapping_cap()
100 return -ENOSYS; in irq_remapping_prepare()
112 return -ENOSYS; in irq_remapping_prepare()
121 if (!remap_ops->enable) in irq_remapping_enable()
122 return -ENODEV; in irq_remapping_enable()
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| /openbmc/u-boot/doc/ |
| H A D | README.vxworks | 1 # SPDX-License-Identifier: GPL-2.0+
4 # Copyright (C) 2015-2018, Bin Meng <bmeng.cn@gmail.com>
9 This document describes the information about U-Boot loading VxWorks kernel.
12 ------
13 U-Boot supports loading VxWorks kernels via 'bootvx' and 'bootm' commands.
22 ---------------------------
39 bootm <kernel image address> - <device tree address>
42 ----------------
43 When using 'bootvx', the kernel bootline must be prepared by U-Boot at a
44 board-specific address before loading VxWorks. U-Boot supplies its address
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| /openbmc/linux/arch/x86/kernel/ |
| H A D | devicetree.c | 1 // SPDX-License-Identifier: GPL-2.0
43 { .compatible = "intel,ce4100-cp", },
67 prop = of_get_property(np, "bus-range", NULL); in pcibios_get_phb_of_node()
71 if (bus->number == bus_min) in pcibios_get_phb_of_node()
91 return -EINVAL; in x86_of_pci_irq_enable()
92 dev->irq = virq; in x86_of_pci_irq_enable()
114 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); in dtb_setup_hpet()
150 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); in dtb_lapic_setup()
167 pic_mode = !of_property_read_bool(dn, "intel,virtual-wire-mode"); in dtb_lapic_setup()
168 pr_info("%s compatibility mode.\n", pic_mode ? "IMCR and PIC" : "Virtual Wire"); in dtb_lapic_setup()
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| H A D | irqinit.c | 1 // SPDX-License-Identifier: GPL-2.0
34 * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
35 * (these are usually mapped to vectors 0x30-0x3f)
39 * The IO-APIC gives us many more interrupt sources. Most of these
44 * IO-APIC registers.
46 * (these are usually mapped into the 0x30-0xff vector range)
50 [0 ... NR_VECTORS - 1] = VECTOR_UNUSED,
55 struct irq_chip *chip = legacy_pic->chip; in init_ISA_irqs()
59 * Try to set up the through-local-APIC virtual wire mode earlier. in init_ISA_irqs()
61 * On some 32-bit UP machines, whose APIC has been disabled by BIOS in init_ISA_irqs()
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| /openbmc/linux/arch/hexagon/include/asm/ |
| H A D | cacheflush.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
15 * - flush_cache_all() flushes entire cache
16 * - flush_cache_mm(mm) flushes the specified mm context's cache lines
17 * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
18 * - flush_cache_range(vma, start, end) flushes a range of pages
19 * - flush_icache_range(start, end) flush a range of instructions
20 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
21 * - flush_icache_pages(vma, pg, nr) flushes(invalidates) nr pages for icache
41 * Memory-management related flushes are there to ensure in non-physically
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| /openbmc/linux/Documentation/networking/ |
| H A D | ila.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 Identifier-locator addressing (ILA) is a technique used with IPv6 that
14 indicates the location of the node which can be dynamic. Identifier-locator
27 The ILA protocol is described in Internet-Draft draft-herbert-intarea-ila.
33 - Identifier
35 independent of its location. ILA identifiers are sixty-four
38 - Locator
41 locators are sixty-four bit prefixes.
43 - ILA mapping
48 - SIR address
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| H A D | tls-offload.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 For details regarding the user-facing interface refer to the TLS
18 * Software crypto mode (``TLS_SW``) - CPU handles the cryptography.
24 * Packet-based NIC offload mode (``TLS_HW``) - the NIC handles crypto
26 This mode integrates best with the kernel stack and is described in detail
28 (``ethtool`` flags ``tls-hw-tx-offload`` and ``tls-hw-rx-offload``).
29 * Full TCP NIC offload mode (``TLS_HW_RECORD``) - mode of operation where
33 abilities or QoS and packet scheduling (``ethtool`` flag ``tls-hw-record``).
35 The operation mode is selected automatically based on device configuration,
36 offload opt-in or opt-out on per-connection basis is not currently supported.
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| H A D | arcnet.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 See also arcnet-hardware.txt in this directory for jumper-setting
25 ARCnet 0.32 ALPHA first made it into the Linux kernel 1.1.80 - this was
36 If you don't e-mail me about your success/failure soon, I may be forced to
40 If you think so, why not flame me in a quick little e-mail? Please also
44 My e-mail address is: apenwarr@worldvisions.ca
55 The previous release resulted from many months of on-and-off effort from me
58 ARCnet 2.10 ALPHA, Tomasz's all-new-and-improved RFC1051 support has been
63 ---------------------------------
66 Subscribe by sending a message with the BODY "subscribe linux-arcnet YOUR
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| /openbmc/linux/arch/x86/kernel/apic/ |
| H A D | apic.c | 1 // SPDX-License-Identifier: GPL-2.0-only
13 * Mikael Pettersson : Power Management for UP-APIC.
43 #include <asm/pc-conf-reg.h>
64 #include <asm/intel-family.h>
75 unsigned int boot_cpu_physical_apicid __ro_after_init = -1U;
124 * Handle interrupt mode configuration register (IMCR).
127 * local APIC. Before entering Symmetric I/O Mode, either
129 * PIC Mode by changing the IMCR.
147 * +1=force-enable
237 * so apic->write/read doesn't do anything
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| /openbmc/linux/Documentation/networking/dsa/ |
| H A D | sja1105.rst | 8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches:
10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and
17 100base-TX PHYs
18 - SJA1110B: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX
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| /openbmc/linux/Documentation/fb/ |
| H A D | udlfb.rst | 9 USB wire. That hardware framebuffer is able to drive the VGA, DVI, or HDMI
15 pixels line-by-line via USB bulk transfers.
18 does not require any acks - the effect is very low latency that
20 non-gaming and non-video applications.
22 Mode setting, EDID read, etc are other bulk or control transfers. Mode
23 setting is very flexible - able to set nearly arbitrary modes from any timing.
35 one-to-one with the fbdev interface, making the driver quite small and
38 from user mode to talk to the device, without needing to know anything
45 In the case of USB graphics, it is just an allocated (virtual) buffer.
50 of virtual or remote framebuffers.
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| /openbmc/linux/arch/arm/mach-nomadik/ |
| H A D | cpu-8815.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <asm/mach-types.h>
15 * These are the only hard-coded address offsets we still have to use.
24 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
26 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
39 #define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */
44 #define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */
45 #define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */
47 #define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */
59 /* This is needed for LL-debug/earlyprintk/debug-macro.S */
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| /openbmc/linux/include/linux/ |
| H A D | wm97xx.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
47 #define WM97XX_COO 0x0800 /* enable coordinate mode */
48 #define WM97XX_CTC 0x0400 /* enable continuous mode */
62 #define WM97XX_SLT(i) ((i - 5) & 0x7) /* panel slot (5-11) */
71 #define WM9712_45W 0x1000 /* set for 5-wire touchscreen */
102 #define WM9713_CTC 0x0100 /* enable continuous mode */
106 #define WM9713_COO 0x0001 /* enable coordinate mode */
107 #define WM9713_45W 0x1000 /* set for 5 wire panel */
146 /*---------------- Return codes from sample reading functions ---------------*/
160 * The wm97xx driver provides a private API for writing platform-specific
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| /openbmc/u-boot/arch/x86/cpu/ |
| H A D | lapic.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2008-2009 coresystems GmbH
13 #include <asm/msr-index.h>
115 result = -1; in lapic_remote_read()
136 /* Put the local apic in virtual wire mode */ in lapic_setup()
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| /openbmc/linux/fs/smb/client/ |
| H A D | smb2pdu.h | 1 /* SPDX-License-Identifier: LGPL-2.1 */
24 /* See MS-SMB2 2.2.43 */
51 * See MS-SMB2.PDF specification for protocol details.
78 /* SMB 3.1.1 and later dialects. See MS-SMB2 section 2.2.2.1 */
89 /* Defines for Type field below (see MS-SMB2 2.2.2.2.2.1) */
137 /* See MS-SMB2 2.2.13.2.11 */
153 /* See MS-SMB2 2.2.13.2.12 */
163 /* See MS-SMB2 2.2.14.2.12 */
176 /* See MS-SMB2 2.2.13.2.5 */
184 /* See MS-SMB2 2.2.13.2.9 */
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| /openbmc/linux/arch/ia64/kernel/ |
| H A D | mca_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * 2000-03-15 David Mosberger-Tang <davidm@hpl.hp.com>
11 * 2000-03-29 Chuck Fleckenstein <cfleck@co.intel.com>
15 * 2002-01-04 J.Hall <jenna.s.hall@intel.com>
16 * Before entering virtual mode code:
21 * 2004-11-12 Russ Anderson <rja@sgi.com>
24 * 2005-12-08 Keith Owens <kaos@sgi.com>
55 * so we can re-use the code for cpu hotplug code as well
68 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base
76 adds r20=-1,r20
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| /openbmc/linux/arch/x86/kvm/ |
| H A D | i8254.c | 4 * Copyright (c) 2003-2004 Fabrice Bellard
44 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
56 struct kvm_kpit_channel_state *c = &pit->pit_state.channels[channel]; in pit_set_gate()
58 switch (c->mode) { in pit_set_gate()
69 if (c->gate < val) in pit_set_gate()
70 c->count_load_time = ktime_get(); in pit_set_gate()
74 c->gate = val; in pit_set_gate()
79 return pit->pit_state.channels[channel].gate; in pit_get_gate()
86 struct kvm_kpit_state *ps = &pit->pit_state; in __kpit_elapsed()
88 if (!ps->period) in __kpit_elapsed()
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| /openbmc/linux/include/drm/ |
| H A D | drm_modes.h | 3 * Copyright © 2007-2008 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
46 * enum drm_mode_status - hardware support status of a mode
47 * @MODE_OK: Mode OK
50 * @MODE_H_ILLEGAL: mode has illegal horizontal timings
51 * @MODE_V_ILLEGAL: mode has illegal vertical timings
53 * @MODE_NOMODE: no mode with a matching name
54 * @MODE_NO_INTERLACE: interlaced mode not supported
55 * @MODE_NO_DBLESCAN: doublescan mode not supported
56 * @MODE_NO_VSCAN: multiscan mode not supported
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| /openbmc/linux/Documentation/spi/ |
| H A D | spi-summary.rst | 5 02-Feb-2012
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
41 - Words are usually sent with their most significant bit (MSB) first,
44 - Sometimes SPI is used to daisy-chain devices, like shift registers.
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| /openbmc/linux/drivers/net/ethernet/chelsio/cxgb4vf/ |
| H A D | adapter.h | 2 * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
5 * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
62 * MSI-X interrupt index usage.
64 MSIX_FW = 0, /* MSI-X index for firmware Q */
65 MSIX_IQFLINT = 1, /* MSI-X index base for Ingress Qs */
90 * Per-"port" information. This is really per-Virtual Interface information
97 u16 viid; /* virtual interface ID */
114 * (Virtual Interfaces). One extra ingress queue is used to receive
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| /openbmc/linux/sound/ppc/ |
| H A D | snd_ps3.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
129 } while (!done && --retries); in snd_ps3_verify_dma_stop()
145 * NOTE: caller should reset card->running before call.
146 * If not, the interrupt handler will re-start DMA,
187 * convert virtual addr to ioif bus addr.
191 return card->dma_start_bus_addr[ch] + in v_to_bus()
192 (paddr - card->dma_start_vaddr[ch]); in v_to_bus()
205 card->dma_last_transfer_vaddr[ch] = in snd_ps3_bump_buffer()
206 card->dma_next_transfer_vaddr[ch]; in snd_ps3_bump_buffer()
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | uncore-interconnect.json | 147 "BriefDescription": "BL Ingress Occupancy - DRS",
169 "BriefDescription": "BL Ingress Occupancy - NCB",
191 "BriefDescription": "BL Ingress Occupancy - NCS",
210 …ny requests behind it in the switch queue will lose ownership and have to re-acquire it later when…
228 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
237 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
246 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
255 …ddition to the source queue. Note the special filtering equation. We do OR-reduction on the requ…
304 …er of cycles when there are pending write ACK's in the switch but the switch->IRP pipeline is not …
324 "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egress Credits",
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| /openbmc/qemu/qga/ |
| H A D | qapi-schema.json | 1 # *-*- Mode: Python -*-*
8 { 'pragma': { 'doc-required': true } }
14 'member-name-exceptions': [
17 # Commands allowed to return a non-dictionary:
18 'command-returns-exceptions': [
19 'guest-file-open',
20 'guest-fsfreeze-freeze',
21 'guest-fsfreeze-freeze-list',
22 'guest-fsfreeze-status',
23 'guest-fsfreeze-thaw',
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| /openbmc/linux/Documentation/virt/uml/ |
| H A D | user_mode_linux_howto_v2.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 Welcome to User Mode Linux
15 User Mode Linux is the first Open Source virtualization platform (first
25 Most OSes today have built-in support for a number of "fake"
27 User Mode Linux takes this concept to the ultimate extreme - there
30 concepts which map onto something provided by the host - files, sockets,
36 The UML kernel is just a process running on Linux - same as any other
49 Why Would I Want User Mode Linux?
53 * If User Mode Linux kernel crashes, your host kernel is still fine. It
57 * You can run a usermode kernel as a non-root user (you may need to
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