xref: /openbmc/linux/arch/arm/mach-nomadik/cpu-8815.c (revision 23174ee5)
11a59d1b8SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
228ad94ecSAlessandro Rubini /*
328ad94ecSAlessandro Rubini  * Copyright STMicroelectronics, 2007.
428ad94ecSAlessandro Rubini  */
528ad94ecSAlessandro Rubini 
628ad94ecSAlessandro Rubini #include <linux/types.h>
728ad94ecSAlessandro Rubini #include <linux/init.h>
835b47a40SRussell King #include <linux/io.h>
928ad94ecSAlessandro Rubini 
10f8635abdSLinus Walleij #include <asm/mach/arch.h>
1128ad94ecSAlessandro Rubini #include <asm/mach/map.h>
1227bda036SLinus Walleij #include <asm/mach-types.h>
1328ad94ecSAlessandro Rubini 
14dea3eacdSLinus Walleij /*
15dea3eacdSLinus Walleij  * These are the only hard-coded address offsets we still have to use.
16dea3eacdSLinus Walleij  */
17dea3eacdSLinus Walleij #define NOMADIK_FSMC_BASE	0x10100000	/* FSMC registers */
18dea3eacdSLinus Walleij #define NOMADIK_SDRAMC_BASE	0x10110000	/* SDRAM Controller */
19dea3eacdSLinus Walleij #define NOMADIK_CLCDC_BASE	0x10120000	/* CLCD Controller */
20dea3eacdSLinus Walleij #define NOMADIK_MDIF_BASE	0x10120000	/* MDIF */
21dea3eacdSLinus Walleij #define NOMADIK_DMA0_BASE	0x10130000	/* DMA0 Controller */
22dea3eacdSLinus Walleij #define NOMADIK_IC_BASE		0x10140000	/* Vectored Irq Controller */
23dea3eacdSLinus Walleij #define NOMADIK_DMA1_BASE	0x10150000	/* DMA1 Controller */
24dea3eacdSLinus Walleij #define NOMADIK_USB_BASE	0x10170000	/* USB-OTG conf reg base */
25dea3eacdSLinus Walleij #define NOMADIK_CRYP_BASE	0x10180000	/* Crypto processor */
26dea3eacdSLinus Walleij #define NOMADIK_SHA1_BASE	0x10190000	/* SHA-1 Processor */
27dea3eacdSLinus Walleij #define NOMADIK_XTI_BASE	0x101A0000	/* XTI */
28dea3eacdSLinus Walleij #define NOMADIK_RNG_BASE	0x101B0000	/* Random number generator */
29dea3eacdSLinus Walleij #define NOMADIK_SRC_BASE	0x101E0000	/* SRC base */
30dea3eacdSLinus Walleij #define NOMADIK_WDOG_BASE	0x101E1000	/* Watchdog */
31dea3eacdSLinus Walleij #define NOMADIK_MTU0_BASE	0x101E2000	/* Multiple Timer 0 */
32dea3eacdSLinus Walleij #define NOMADIK_MTU1_BASE	0x101E3000	/* Multiple Timer 1 */
33dea3eacdSLinus Walleij #define NOMADIK_GPIO0_BASE	0x101E4000	/* GPIO0 */
34dea3eacdSLinus Walleij #define NOMADIK_GPIO1_BASE	0x101E5000	/* GPIO1 */
35dea3eacdSLinus Walleij #define NOMADIK_GPIO2_BASE	0x101E6000	/* GPIO2 */
36dea3eacdSLinus Walleij #define NOMADIK_GPIO3_BASE	0x101E7000	/* GPIO3 */
37dea3eacdSLinus Walleij #define NOMADIK_RTC_BASE	0x101E8000	/* Real Time Clock base */
38dea3eacdSLinus Walleij #define NOMADIK_PMU_BASE	0x101E9000	/* Power Management Unit */
39dea3eacdSLinus Walleij #define NOMADIK_OWM_BASE	0x101EA000	/* One wire master */
40dea3eacdSLinus Walleij #define NOMADIK_SCR_BASE	0x101EF000	/* Secure Control registers */
41dea3eacdSLinus Walleij #define NOMADIK_MSP2_BASE	0x101F0000	/* MSP 2 interface */
42dea3eacdSLinus Walleij #define NOMADIK_MSP1_BASE	0x101F1000	/* MSP 1 interface */
43dea3eacdSLinus Walleij #define NOMADIK_UART2_BASE	0x101F2000	/* UART 2 interface */
44dea3eacdSLinus Walleij #define NOMADIK_SSIRx_BASE	0x101F3000	/* SSI 8-ch rx interface */
45dea3eacdSLinus Walleij #define NOMADIK_SSITx_BASE	0x101F4000	/* SSI 8-ch tx interface */
46dea3eacdSLinus Walleij #define NOMADIK_MSHC_BASE	0x101F5000	/* Memory Stick(Pro) Host */
47dea3eacdSLinus Walleij #define NOMADIK_SDI_BASE	0x101F6000	/* SD-card/MM-Card */
48dea3eacdSLinus Walleij #define NOMADIK_I2C1_BASE	0x101F7000	/* I2C1 interface */
49dea3eacdSLinus Walleij #define NOMADIK_I2C0_BASE	0x101F8000	/* I2C0 interface */
50dea3eacdSLinus Walleij #define NOMADIK_MSP0_BASE	0x101F9000	/* MSP 0 interface */
51dea3eacdSLinus Walleij #define NOMADIK_FIRDA_BASE	0x101FA000	/* FIrDA interface */
52dea3eacdSLinus Walleij #define NOMADIK_UART1_BASE	0x101FB000	/* UART 1 interface */
53dea3eacdSLinus Walleij #define NOMADIK_SSP_BASE	0x101FC000	/* SSP interface */
54dea3eacdSLinus Walleij #define NOMADIK_UART0_BASE	0x101FD000	/* UART 0 interface */
55dea3eacdSLinus Walleij #define NOMADIK_SGA_BASE	0x101FE000	/* SGA interface */
56dea3eacdSLinus Walleij #define NOMADIK_L2CC_BASE	0x10210000	/* L2 Cache controller */
57dea3eacdSLinus Walleij #define NOMADIK_UART1_VBASE	0xF01FB000
58dea3eacdSLinus Walleij 
59dea3eacdSLinus Walleij /* This is needed for LL-debug/earlyprintk/debug-macro.S */
60dea3eacdSLinus Walleij static struct map_desc cpu8815_io_desc[] __initdata = {
6128ad94ecSAlessandro Rubini 	{
62dea3eacdSLinus Walleij 		.virtual =	NOMADIK_UART1_VBASE,
63dea3eacdSLinus Walleij 		.pfn =		__phys_to_pfn(NOMADIK_UART1_BASE),
64dea3eacdSLinus Walleij 		.length =	SZ_4K,
6528ad94ecSAlessandro Rubini 		.type =		MT_DEVICE,
66dea3eacdSLinus Walleij 	},
6728ad94ecSAlessandro Rubini };
6828ad94ecSAlessandro Rubini 
cpu8815_map_io(void)695f66d482SLinus Walleij static void __init cpu8815_map_io(void)
7028ad94ecSAlessandro Rubini {
71dea3eacdSLinus Walleij 	iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc));
7228ad94ecSAlessandro Rubini }
7328ad94ecSAlessandro Rubini 
cpu8815_restart(enum reboot_mode mode,const char * cmd)747b6d864bSRobin Holt static void cpu8815_restart(enum reboot_mode mode, const char *cmd)
7535b47a40SRussell King {
76dea3eacdSLinus Walleij 	void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K);
7735b47a40SRussell King 
7835b47a40SRussell King 	/* FIXME: use egpio when implemented */
7935b47a40SRussell King 
8035b47a40SRussell King 	/* Write anything to Reset status register */
81dea3eacdSLinus Walleij 	writel(1, srcbase + 0x18);
8235b47a40SRussell King }
83f8635abdSLinus Walleij 
84f8635abdSLinus Walleij static const char * cpu8815_board_compat[] = {
85451f2334SLinus Walleij 	"st,nomadik-nhk-15",
86f8635abdSLinus Walleij 	"calaosystems,usb-s8815",
87f8635abdSLinus Walleij 	NULL,
88f8635abdSLinus Walleij };
89f8635abdSLinus Walleij 
90f8635abdSLinus Walleij DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
9198badfd3SLinus Walleij 	.l2c_aux_val	= 0,
9298badfd3SLinus Walleij 	.l2c_aux_mask	= ~0,
93f8635abdSLinus Walleij 	.map_io		= cpu8815_map_io,
94f8635abdSLinus Walleij 	.restart	= cpu8815_restart,
95f8635abdSLinus Walleij 	.dt_compat      = cpu8815_board_compat,
96f8635abdSLinus Walleij MACHINE_END
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