16b138c7bSAndi Kleen[
26b138c7bSAndi Kleen    {
3*14b4c544SIan Rogers        "BriefDescription": "Address Match (Conflict) Count; Conflict Merges",
4*14b4c544SIan Rogers        "EventCode": "0x17",
5*14b4c544SIan Rogers        "EventName": "UNC_I_ADDRESS_MATCH.MERGE_COUNT",
6*14b4c544SIan Rogers        "PerPkg": "1",
7*14b4c544SIan Rogers        "PublicDescription": "Counts the number of times when an inbound write (from a device to memory or another device) had an address match with another request in the write cache.; When two requests to the same address from the same source are received back to back, it is possible to merge the two of them together.",
8*14b4c544SIan Rogers        "UMask": "0x2",
9*14b4c544SIan Rogers        "Unit": "IRP"
10*14b4c544SIan Rogers    },
11*14b4c544SIan Rogers    {
12*14b4c544SIan Rogers        "BriefDescription": "Address Match (Conflict) Count; Conflict Stalls",
13*14b4c544SIan Rogers        "EventCode": "0x17",
14*14b4c544SIan Rogers        "EventName": "UNC_I_ADDRESS_MATCH.STALL_COUNT",
15*14b4c544SIan Rogers        "PerPkg": "1",
16*14b4c544SIan Rogers        "PublicDescription": "Counts the number of times when an inbound write (from a device to memory or another device) had an address match with another request in the write cache.; When it is not possible to merge two conflicting requests, a stall event occurs.  This is bad for performance.",
17*14b4c544SIan Rogers        "UMask": "0x1",
18*14b4c544SIan Rogers        "Unit": "IRP"
19*14b4c544SIan Rogers    },
20*14b4c544SIan Rogers    {
21*14b4c544SIan Rogers        "BriefDescription": "Write Ack Pending Occupancy; Any Source",
22*14b4c544SIan Rogers        "EventCode": "0x14",
23*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.ANY",
24*14b4c544SIan Rogers        "PerPkg": "1",
25*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of writes that have acquired ownership but have not yet returned their data to the uncore.  These writes are generally queued up in the switch trying to get to the head of their queues so that they can post their data.  The queue occuapancy increments when the ACK is received, and decrements when either the data is returned OR a tickle is received and ownership is released.  Note that a single tickle can result in multiple decrements.; Tracks only those requests that come from the port specified in the IRP_PmonFilter.OrderingQ register.  This register allows one to select one specific queue.  It is not possible to monitor multiple queues at a time.",
26*14b4c544SIan Rogers        "UMask": "0x1",
27*14b4c544SIan Rogers        "Unit": "IRP"
28*14b4c544SIan Rogers    },
29*14b4c544SIan Rogers    {
30*14b4c544SIan Rogers        "BriefDescription": "Write Ack Pending Occupancy; Select Source",
31*14b4c544SIan Rogers        "EventCode": "0x14",
32*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_ACK_PENDING_OCCUPANCY.SOURCE",
33*14b4c544SIan Rogers        "PerPkg": "1",
34*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of writes that have acquired ownership but have not yet returned their data to the uncore.  These writes are generally queued up in the switch trying to get to the head of their queues so that they can post their data.  The queue occuapancy increments when the ACK is received, and decrements when either the data is returned OR a tickle is received and ownership is released.  Note that a single tickle can result in multiple decrements.; Tracks all requests from any source port.",
35*14b4c544SIan Rogers        "UMask": "0x2",
36*14b4c544SIan Rogers        "Unit": "IRP"
37*14b4c544SIan Rogers    },
38*14b4c544SIan Rogers    {
39*14b4c544SIan Rogers        "BriefDescription": "Outstanding Write Ownership Occupancy; Any Source",
40*14b4c544SIan Rogers        "EventCode": "0x13",
41*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.ANY",
42*14b4c544SIan Rogers        "PerPkg": "1",
43*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of writes (and write prefetches) that are outstanding in the uncore trying to acquire ownership in each cycle.  This can be used with the write transaction count to calculate the average write latency in the uncore.  The occupancy increments when a write request is issued, and decrements when the data is returned.; Tracks all requests from any source port.",
44*14b4c544SIan Rogers        "UMask": "0x1",
45*14b4c544SIan Rogers        "Unit": "IRP"
46*14b4c544SIan Rogers    },
47*14b4c544SIan Rogers    {
48*14b4c544SIan Rogers        "BriefDescription": "Outstanding Write Ownership Occupancy; Select Source",
49*14b4c544SIan Rogers        "EventCode": "0x13",
50*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_OWN_OCCUPANCY.SOURCE",
51*14b4c544SIan Rogers        "PerPkg": "1",
52*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of writes (and write prefetches) that are outstanding in the uncore trying to acquire ownership in each cycle.  This can be used with the write transaction count to calculate the average write latency in the uncore.  The occupancy increments when a write request is issued, and decrements when the data is returned.; Tracks only those requests that come from the port specified in the IRP_PmonFilter.OrderingQ register.  This register allows one to select one specific queue.  It is not possible to monitor multiple queues at a time.",
53*14b4c544SIan Rogers        "UMask": "0x2",
54*14b4c544SIan Rogers        "Unit": "IRP"
55*14b4c544SIan Rogers    },
56*14b4c544SIan Rogers    {
57*14b4c544SIan Rogers        "BriefDescription": "Outstanding Read Occupancy; Any Source",
58*14b4c544SIan Rogers        "EventCode": "0x10",
59*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_READ_OCCUPANCY.ANY",
60*14b4c544SIan Rogers        "PerPkg": "1",
61*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of reads that are outstanding in the uncore in each cycle.  This can be used with the read transaction count to calculate the average read latency in the uncore.  The occupancy increments when a read request is issued, and decrements when the data is returned.; Tracks all requests from any source port.",
62*14b4c544SIan Rogers        "UMask": "0x1",
63*14b4c544SIan Rogers        "Unit": "IRP"
64*14b4c544SIan Rogers    },
65*14b4c544SIan Rogers    {
66*14b4c544SIan Rogers        "BriefDescription": "Outstanding Read Occupancy; Select Source",
67*14b4c544SIan Rogers        "EventCode": "0x10",
68*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_READ_OCCUPANCY.SOURCE",
69*14b4c544SIan Rogers        "PerPkg": "1",
70*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of reads that are outstanding in the uncore in each cycle.  This can be used with the read transaction count to calculate the average read latency in the uncore.  The occupancy increments when a read request is issued, and decrements when the data is returned.; Tracks only those requests that come from the port specified in the IRP_PmonFilter.OrderingQ register.  This register allows one to select one specific queue.  It is not possible to monitor multiple queues at a time.",
71*14b4c544SIan Rogers        "UMask": "0x2",
72*14b4c544SIan Rogers        "Unit": "IRP"
73*14b4c544SIan Rogers    },
74*14b4c544SIan Rogers    {
75*14b4c544SIan Rogers        "BriefDescription": "Total Write Cache Occupancy; Any Source",
76*14b4c544SIan Rogers        "EventCode": "0x12",
77*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.ANY",
78*14b4c544SIan Rogers        "PerPkg": "1",
79*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of reads and writes that are outstanding in the uncore in each cycle.  This is effectively the sum of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks all requests from any source port.",
80*14b4c544SIan Rogers        "UMask": "0x1",
81*14b4c544SIan Rogers        "Unit": "IRP"
82*14b4c544SIan Rogers    },
83*14b4c544SIan Rogers    {
84*14b4c544SIan Rogers        "BriefDescription": "Total Write Cache Occupancy; Select Source",
85*14b4c544SIan Rogers        "EventCode": "0x12",
86*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_TOTAL_OCCUPANCY.SOURCE",
87*14b4c544SIan Rogers        "PerPkg": "1",
88*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of reads and writes that are outstanding in the uncore in each cycle.  This is effectively the sum of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those requests that come from the port specified in the IRP_PmonFilter.OrderingQ register.  This register allows one to select one specific queue.  It is not possible to monitor multiple queues at a time.",
89*14b4c544SIan Rogers        "UMask": "0x2",
90*14b4c544SIan Rogers        "Unit": "IRP"
91*14b4c544SIan Rogers    },
92*14b4c544SIan Rogers    {
93*14b4c544SIan Rogers        "BriefDescription": "Outstanding Write Occupancy; Any Source",
94*14b4c544SIan Rogers        "EventCode": "0x11",
95*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.ANY",
96*14b4c544SIan Rogers        "PerPkg": "1",
97*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of writes (and write prefetches)  that are outstanding in the uncore in each cycle.  This can be used with the transaction count event to calculate the average latency in the uncore.  The occupancy increments when the ownership fetch/prefetch is issued, and decrements the data is returned to the uncore.; Tracks all requests from any source port.",
98*14b4c544SIan Rogers        "UMask": "0x1",
99*14b4c544SIan Rogers        "Unit": "IRP"
100*14b4c544SIan Rogers    },
101*14b4c544SIan Rogers    {
102*14b4c544SIan Rogers        "BriefDescription": "Outstanding Write Occupancy; Select Source",
103*14b4c544SIan Rogers        "EventCode": "0x11",
104*14b4c544SIan Rogers        "EventName": "UNC_I_CACHE_WRITE_OCCUPANCY.SOURCE",
105*14b4c544SIan Rogers        "PerPkg": "1",
106*14b4c544SIan Rogers        "PublicDescription": "Accumulates the number of writes (and write prefetches)  that are outstanding in the uncore in each cycle.  This can be used with the transaction count event to calculate the average latency in the uncore.  The occupancy increments when the ownership fetch/prefetch is issued, and decrements the data is returned to the uncore.; Tracks only those requests that come from the port specified in the IRP_PmonFilter.OrderingQ register.  This register allows one to select one specific queue.  It is not possible to monitor multiple queues at a time.",
107*14b4c544SIan Rogers        "UMask": "0x2",
108*14b4c544SIan Rogers        "Unit": "IRP"
109*14b4c544SIan Rogers    },
110*14b4c544SIan Rogers    {
111*14b4c544SIan Rogers        "BriefDescription": "Clocks in the IRP",
112*14b4c544SIan Rogers        "EventName": "UNC_I_CLOCKTICKS",
113*14b4c544SIan Rogers        "PerPkg": "1",
114*14b4c544SIan Rogers        "PublicDescription": "Number of clocks in the IRP.",
115*14b4c544SIan Rogers        "Unit": "IRP"
116*14b4c544SIan Rogers    },
117*14b4c544SIan Rogers    {
118*14b4c544SIan Rogers        "EventCode": "0xb",
119*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_AK_CYCLES_FULL",
120*14b4c544SIan Rogers        "PerPkg": "1",
121*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when the AK Ingress is full.  This queue is where the IRP receives responses from R2PCIe (the ring).",
122*14b4c544SIan Rogers        "Unit": "IRP"
123*14b4c544SIan Rogers    },
124*14b4c544SIan Rogers    {
125*14b4c544SIan Rogers        "BriefDescription": "AK Ingress Occupancy",
126*14b4c544SIan Rogers        "EventCode": "0xa",
127*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_AK_INSERTS",
128*14b4c544SIan Rogers        "PerPkg": "1",
129*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the AK Ingress.  This queue is where the IRP receives responses from R2PCIe (the ring).",
130*14b4c544SIan Rogers        "Unit": "IRP"
131*14b4c544SIan Rogers    },
132*14b4c544SIan Rogers    {
133*14b4c544SIan Rogers        "EventCode": "0xc",
134*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_AK_OCCUPANCY",
135*14b4c544SIan Rogers        "PerPkg": "1",
136*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of the AK Ingress in each cycles.  This queue is where the IRP receives responses from R2PCIe (the ring).",
137*14b4c544SIan Rogers        "Unit": "IRP"
138*14b4c544SIan Rogers    },
139*14b4c544SIan Rogers    {
140*14b4c544SIan Rogers        "EventCode": "0x4",
141*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_DRS_CYCLES_FULL",
142*14b4c544SIan Rogers        "PerPkg": "1",
143*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
144*14b4c544SIan Rogers        "Unit": "IRP"
145*14b4c544SIan Rogers    },
146*14b4c544SIan Rogers    {
147*14b4c544SIan Rogers        "BriefDescription": "BL Ingress Occupancy - DRS",
148*14b4c544SIan Rogers        "EventCode": "0x1",
149*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_DRS_INSERTS",
150*14b4c544SIan Rogers        "PerPkg": "1",
151*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
152*14b4c544SIan Rogers        "Unit": "IRP"
153*14b4c544SIan Rogers    },
154*14b4c544SIan Rogers    {
155*14b4c544SIan Rogers        "EventCode": "0x7",
156*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_DRS_OCCUPANCY",
157*14b4c544SIan Rogers        "PerPkg": "1",
158*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
159*14b4c544SIan Rogers        "Unit": "IRP"
160*14b4c544SIan Rogers    },
161*14b4c544SIan Rogers    {
162*14b4c544SIan Rogers        "EventCode": "0x5",
163*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_NCB_CYCLES_FULL",
164*14b4c544SIan Rogers        "PerPkg": "1",
165*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
166*14b4c544SIan Rogers        "Unit": "IRP"
167*14b4c544SIan Rogers    },
168*14b4c544SIan Rogers    {
169*14b4c544SIan Rogers        "BriefDescription": "BL Ingress Occupancy - NCB",
170*14b4c544SIan Rogers        "EventCode": "0x2",
171*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_NCB_INSERTS",
172*14b4c544SIan Rogers        "PerPkg": "1",
173*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
174*14b4c544SIan Rogers        "Unit": "IRP"
175*14b4c544SIan Rogers    },
176*14b4c544SIan Rogers    {
177*14b4c544SIan Rogers        "EventCode": "0x8",
178*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_NCB_OCCUPANCY",
179*14b4c544SIan Rogers        "PerPkg": "1",
180*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
181*14b4c544SIan Rogers        "Unit": "IRP"
182*14b4c544SIan Rogers    },
183*14b4c544SIan Rogers    {
184*14b4c544SIan Rogers        "EventCode": "0x6",
185*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_NCS_CYCLES_FULL",
186*14b4c544SIan Rogers        "PerPkg": "1",
187*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when the BL Ingress is full.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
188*14b4c544SIan Rogers        "Unit": "IRP"
189*14b4c544SIan Rogers    },
190*14b4c544SIan Rogers    {
191*14b4c544SIan Rogers        "BriefDescription": "BL Ingress Occupancy - NCS",
192*14b4c544SIan Rogers        "EventCode": "0x3",
193*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_NCS_INSERTS",
194*14b4c544SIan Rogers        "PerPkg": "1",
195*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the BL Ingress.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
196*14b4c544SIan Rogers        "Unit": "IRP"
197*14b4c544SIan Rogers    },
198*14b4c544SIan Rogers    {
199*14b4c544SIan Rogers        "EventCode": "0x9",
200*14b4c544SIan Rogers        "EventName": "UNC_I_RxR_BL_NCS_OCCUPANCY",
201*14b4c544SIan Rogers        "PerPkg": "1",
202*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of the BL Ingress in each cycles.  This queue is where the IRP receives data from R2PCIe (the ring).  It is used for data returns from read requets as well as outbound MMIO writes.",
203*14b4c544SIan Rogers        "Unit": "IRP"
204*14b4c544SIan Rogers    },
205*14b4c544SIan Rogers    {
206*14b4c544SIan Rogers        "BriefDescription": "Tickle Count; Ownership Lost",
207*14b4c544SIan Rogers        "EventCode": "0x16",
208*14b4c544SIan Rogers        "EventName": "UNC_I_TICKLES.LOST_OWNERSHIP",
209*14b4c544SIan Rogers        "PerPkg": "1",
210*14b4c544SIan Rogers        "PublicDescription": "Counts the number of tickles that are received.  This is for both explicit (from Cbo) and implicit (internal conflict) tickles.; Tracks the number of requests that lost ownership as a result of a tickle.  When a tickle comes in, if the request is not at the head of the queue in the switch, then that request as well as any requests behind it in the switch queue will lose ownership and have to re-acquire it later when they get to the head of the queue.  This will therefore track the number of requests that lost ownership and not just the number of tickles.",
211*14b4c544SIan Rogers        "UMask": "0x1",
212*14b4c544SIan Rogers        "Unit": "IRP"
213*14b4c544SIan Rogers    },
214*14b4c544SIan Rogers    {
215*14b4c544SIan Rogers        "BriefDescription": "Tickle Count; Data Returned",
216*14b4c544SIan Rogers        "EventCode": "0x16",
217*14b4c544SIan Rogers        "EventName": "UNC_I_TICKLES.TOP_OF_QUEUE",
218*14b4c544SIan Rogers        "PerPkg": "1",
219*14b4c544SIan Rogers        "PublicDescription": "Counts the number of tickles that are received.  This is for both explicit (from Cbo) and implicit (internal conflict) tickles.; Tracks the number of cases when a tickle was received but the requests was at the head of the queue in the switch.  In this case, data is returned rather than releasing ownership.",
220*14b4c544SIan Rogers        "UMask": "0x2",
221*14b4c544SIan Rogers        "Unit": "IRP"
222*14b4c544SIan Rogers    },
223*14b4c544SIan Rogers    {
224*14b4c544SIan Rogers        "BriefDescription": "Inbound Transaction Count: Read Prefetches",
225*14b4c544SIan Rogers        "EventCode": "0x15",
226*14b4c544SIan Rogers        "EventName": "UNC_I_TRANSACTIONS.PD_PREFETCHES",
227*14b4c544SIan Rogers        "PerPkg": "1",
228*14b4c544SIan Rogers        "PublicDescription": "Counts the number of Inbound transactions from the IRP to the Uncore.  This can be filtered based on request type in addition to the source queue.  Note the special filtering equation.  We do OR-reduction on the request type.  If the SOURCE bit is set, then we also do AND qualification based on the source portID.",
229*14b4c544SIan Rogers        "UMask": "0x4",
230*14b4c544SIan Rogers        "Unit": "IRP"
231*14b4c544SIan Rogers    },
232*14b4c544SIan Rogers    {
233*14b4c544SIan Rogers        "BriefDescription": "Inbound Transaction Count; Read Prefetches",
234*14b4c544SIan Rogers        "EventCode": "0x15",
235*14b4c544SIan Rogers        "EventName": "UNC_I_TRANSACTIONS.RD_PREFETCHES",
236*14b4c544SIan Rogers        "PerPkg": "1",
237*14b4c544SIan Rogers        "PublicDescription": "Counts the number of Inbound transactions from the IRP to the Uncore.  This can be filtered based on request type in addition to the source queue.  Note the special filtering equation.  We do OR-reduction on the request type.  If the SOURCE bit is set, then we also do AND qualification based on the source portID.; Tracks the number of read prefetches.",
238*14b4c544SIan Rogers        "UMask": "0x4",
239*14b4c544SIan Rogers        "Unit": "IRP"
240*14b4c544SIan Rogers    },
241*14b4c544SIan Rogers    {
242*14b4c544SIan Rogers        "BriefDescription": "Inbound Transaction Count; Reads",
243*14b4c544SIan Rogers        "EventCode": "0x15",
244*14b4c544SIan Rogers        "EventName": "UNC_I_TRANSACTIONS.READS",
245*14b4c544SIan Rogers        "PerPkg": "1",
246*14b4c544SIan Rogers        "PublicDescription": "Counts the number of Inbound transactions from the IRP to the Uncore.  This can be filtered based on request type in addition to the source queue.  Note the special filtering equation.  We do OR-reduction on the request type.  If the SOURCE bit is set, then we also do AND qualification based on the source portID.; Tracks only read requests (not including read prefetches).",
247*14b4c544SIan Rogers        "UMask": "0x1",
248*14b4c544SIan Rogers        "Unit": "IRP"
249*14b4c544SIan Rogers    },
250*14b4c544SIan Rogers    {
251*14b4c544SIan Rogers        "BriefDescription": "Inbound Transaction Count; Writes",
252*14b4c544SIan Rogers        "EventCode": "0x15",
253*14b4c544SIan Rogers        "EventName": "UNC_I_TRANSACTIONS.WRITES",
254*14b4c544SIan Rogers        "PerPkg": "1",
255*14b4c544SIan Rogers        "PublicDescription": "Counts the number of Inbound transactions from the IRP to the Uncore.  This can be filtered based on request type in addition to the source queue.  Note the special filtering equation.  We do OR-reduction on the request type.  If the SOURCE bit is set, then we also do AND qualification based on the source portID.; Trackes only write requests.  Each write request should have a prefetch, so there is no need to explicitly track these requests.  For writes that are tickled and have to retry, the counter will be incremented for each retry.",
256*14b4c544SIan Rogers        "UMask": "0x2",
257*14b4c544SIan Rogers        "Unit": "IRP"
258*14b4c544SIan Rogers    },
259*14b4c544SIan Rogers    {
260*14b4c544SIan Rogers        "BriefDescription": "No AD Egress Credit Stalls",
261*14b4c544SIan Rogers        "EventCode": "0x18",
262*14b4c544SIan Rogers        "EventName": "UNC_I_TxR_AD_STALL_CREDIT_CYCLES",
263*14b4c544SIan Rogers        "PerPkg": "1",
264*14b4c544SIan Rogers        "PublicDescription": "Counts the number times when it is not possible to issue a request to the R2PCIe because there are no AD Egress Credits available.",
265*14b4c544SIan Rogers        "Unit": "IRP"
266*14b4c544SIan Rogers    },
267*14b4c544SIan Rogers    {
268*14b4c544SIan Rogers        "BriefDescription": "No BL Egress Credit Stalls",
269*14b4c544SIan Rogers        "EventCode": "0x19",
270*14b4c544SIan Rogers        "EventName": "UNC_I_TxR_BL_STALL_CREDIT_CYCLES",
271*14b4c544SIan Rogers        "PerPkg": "1",
272*14b4c544SIan Rogers        "PublicDescription": "Counts the number times when it is not possible to issue data to the R2PCIe because there are no BL Egress Credits available.",
273*14b4c544SIan Rogers        "Unit": "IRP"
274*14b4c544SIan Rogers    },
275*14b4c544SIan Rogers    {
276*14b4c544SIan Rogers        "BriefDescription": "Outbound Read Requests",
277*14b4c544SIan Rogers        "EventCode": "0xe",
278*14b4c544SIan Rogers        "EventName": "UNC_I_TxR_DATA_INSERTS_NCB",
279*14b4c544SIan Rogers        "PerPkg": "1",
280*14b4c544SIan Rogers        "PublicDescription": "Counts the number of requests issued to the switch (towards the devices).",
281*14b4c544SIan Rogers        "Unit": "IRP"
282*14b4c544SIan Rogers    },
283*14b4c544SIan Rogers    {
284*14b4c544SIan Rogers        "BriefDescription": "Outbound Read Requests",
285*14b4c544SIan Rogers        "EventCode": "0xf",
286*14b4c544SIan Rogers        "EventName": "UNC_I_TxR_DATA_INSERTS_NCS",
287*14b4c544SIan Rogers        "PerPkg": "1",
288*14b4c544SIan Rogers        "PublicDescription": "Counts the number of requests issued to the switch (towards the devices).",
289*14b4c544SIan Rogers        "Unit": "IRP"
290*14b4c544SIan Rogers    },
291*14b4c544SIan Rogers    {
292*14b4c544SIan Rogers        "BriefDescription": "Outbound Request Queue Occupancy",
293*14b4c544SIan Rogers        "EventCode": "0xd",
294*14b4c544SIan Rogers        "EventName": "UNC_I_TxR_REQUEST_OCCUPANCY",
295*14b4c544SIan Rogers        "PerPkg": "1",
296*14b4c544SIan Rogers        "PublicDescription": "Accumultes the number of outstanding outbound requests from the IRP to the switch (towards the devices).  This can be used in conjuection with the allocations event in order to calculate average latency of outbound requests.",
297*14b4c544SIan Rogers        "Unit": "IRP"
298*14b4c544SIan Rogers    },
299*14b4c544SIan Rogers    {
300*14b4c544SIan Rogers        "BriefDescription": "Write Ordering Stalls",
301*14b4c544SIan Rogers        "EventCode": "0x1a",
302*14b4c544SIan Rogers        "EventName": "UNC_I_WRITE_ORDERING_STALL_CYCLES",
303*14b4c544SIan Rogers        "PerPkg": "1",
304*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when there are pending write ACK's in the switch but the switch->IRP pipeline is not utilized.",
305*14b4c544SIan Rogers        "Unit": "IRP"
306*14b4c544SIan Rogers    },
307*14b4c544SIan Rogers    {
30862201368SIan Rogers        "BriefDescription": "Number of qfclks",
3096b138c7bSAndi Kleen        "EventCode": "0x14",
3106b138c7bSAndi Kleen        "EventName": "UNC_Q_CLOCKTICKS",
3116b138c7bSAndi Kleen        "PerPkg": "1",
31262201368SIan Rogers        "PublicDescription": "Counts the number of clocks in the QPI LL.  This clock runs at 1/8th the GT/s speed of the QPI link.  For example, a 8GT/s link will have qfclk or 1GHz.  JKT does not support dynamic link speeds, so this frequency is fixed.",
313*14b4c544SIan Rogers        "Unit": "QPI"
3146b138c7bSAndi Kleen    },
3156b138c7bSAndi Kleen    {
31662201368SIan Rogers        "BriefDescription": "Count of CTO Events",
31762201368SIan Rogers        "EventCode": "0x38",
31862201368SIan Rogers        "EventName": "UNC_Q_CTO_COUNT",
3196b138c7bSAndi Kleen        "PerPkg": "1",
32062201368SIan Rogers        "PublicDescription": "Counts the number of CTO (cluster trigger outs) events that were asserted across the two slots.  If both slots trigger in a given cycle, the event will increment by 2.  You can use edge detect to count the number of cases when both events triggered.",
321*14b4c544SIan Rogers        "Unit": "QPI"
3226b138c7bSAndi Kleen    },
3236b138c7bSAndi Kleen    {
32462201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egress Credits",
32562201368SIan Rogers        "EventCode": "0x13",
32662201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS",
3276b138c7bSAndi Kleen        "PerPkg": "1",
328d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn failed because there were not enough Egress credits.  Had there been enough credits, the spawn would have worked as the RBT bit was set and the RBT tag matched.",
3296b138c7bSAndi Kleen        "UMask": "0x2",
330*14b4c544SIan Rogers        "Unit": "QPI"
3316b138c7bSAndi Kleen    },
3326b138c7bSAndi Kleen    {
33362201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egress and RBT Miss",
33462201368SIan Rogers        "EventCode": "0x13",
33562201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_MISS",
33662201368SIan Rogers        "PerPkg": "1",
337d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn failed because the RBT tag did not match and there weren't enough Egress credits.   The valid bit was set.",
33862201368SIan Rogers        "UMask": "0x20",
339*14b4c544SIan Rogers        "Unit": "QPI"
34062201368SIan Rogers    },
34162201368SIan Rogers    {
34262201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egress and RBT Invalid",
34362201368SIan Rogers        "EventCode": "0x13",
34462201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT",
34562201368SIan Rogers        "PerPkg": "1",
346d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn failed because there were not enough Egress credits AND the RBT bit was not set, but the RBT tag matched.",
34762201368SIan Rogers        "UMask": "0x8",
348*14b4c544SIan Rogers        "Unit": "QPI"
34962201368SIan Rogers    },
35062201368SIan Rogers    {
35162201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - Egress and RBT Miss, Invalid",
35262201368SIan Rogers        "EventCode": "0x13",
35362201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.FAILURE_CREDITS_RBT_MISS",
35462201368SIan Rogers        "PerPkg": "1",
355d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn failed because the RBT tag did not match, the valid bit was not set and there weren't enough Egress credits.",
35662201368SIan Rogers        "UMask": "0x80",
357*14b4c544SIan Rogers        "Unit": "QPI"
35862201368SIan Rogers    },
35962201368SIan Rogers    {
36062201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT Miss",
36162201368SIan Rogers        "EventCode": "0x13",
36262201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.FAILURE_MISS",
36362201368SIan Rogers        "PerPkg": "1",
364d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn failed because the RBT tag did not match although the valid bit was set and there were enough Egress credits.",
36562201368SIan Rogers        "UMask": "0x10",
366*14b4c544SIan Rogers        "Unit": "QPI"
36762201368SIan Rogers    },
36862201368SIan Rogers    {
36962201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT Invalid",
37062201368SIan Rogers        "EventCode": "0x13",
37162201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_HIT",
37262201368SIan Rogers        "PerPkg": "1",
373d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn failed because the route-back table (RBT) specified that the transaction should not trigger a direct2core transaction.  This is common for IO transactions.  There were enough Egress credits and the RBT tag matched but the valid bit was not set.",
37462201368SIan Rogers        "UMask": "0x4",
375*14b4c544SIan Rogers        "Unit": "QPI"
37662201368SIan Rogers    },
37762201368SIan Rogers    {
37862201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Failure - RBT Miss and Invalid",
37962201368SIan Rogers        "EventCode": "0x13",
38062201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.FAILURE_RBT_MISS",
38162201368SIan Rogers        "PerPkg": "1",
382d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn failed because the RBT tag did not match and the valid bit was not set although there were enough Egress credits.",
38362201368SIan Rogers        "UMask": "0x40",
384*14b4c544SIan Rogers        "Unit": "QPI"
38562201368SIan Rogers    },
38662201368SIan Rogers    {
38762201368SIan Rogers        "BriefDescription": "Direct 2 Core Spawning; Spawn Success",
38862201368SIan Rogers        "EventCode": "0x13",
38962201368SIan Rogers        "EventName": "UNC_Q_DIRECT2CORE.SUCCESS_RBT_HIT",
39062201368SIan Rogers        "PerPkg": "1",
391d2aaf040SIan Rogers        "PublicDescription": "Counts the number of DRS packets that we attempted to do direct2core on.  There are 4 mutually exclusive filters.  Filter [0] can be used to get successful spawns, while [1:3] provide the different failure cases.  Note that this does not count packets that are not candidates for Direct2Core.  The only candidates for Direct2Core are DRS packets destined for Cbos.; The spawn was successful.  There were sufficient credits, the RBT valid bit was set and there was an RBT tag match.  The message was marked to spawn direct2core.",
39262201368SIan Rogers        "UMask": "0x1",
393*14b4c544SIan Rogers        "Unit": "QPI"
39462201368SIan Rogers    },
39562201368SIan Rogers    {
39662201368SIan Rogers        "BriefDescription": "Cycles in L1",
39762201368SIan Rogers        "EventCode": "0x12",
39862201368SIan Rogers        "EventName": "UNC_Q_L1_POWER_CYCLES",
39962201368SIan Rogers        "PerPkg": "1",
40062201368SIan Rogers        "PublicDescription": "Number of QPI qfclk cycles spent in L1 power mode.  L1 is a mode that totally shuts down a QPI link.  Use edge detect to count the number of instances when the QPI link entered L1.  Link power states are per link and per direction, so for example the Tx direction could be in one state while Rx was in another. Because L1 totally shuts down the link, it takes a good amount of time to exit this mode.",
401*14b4c544SIan Rogers        "Unit": "QPI"
40262201368SIan Rogers    },
40362201368SIan Rogers    {
4048ee37818SIan Rogers        "EventCode": "0x38",
4058ee37818SIan Rogers        "EventName": "UNC_Q_MATCH_MASK",
4068ee37818SIan Rogers        "PerPkg": "1",
407*14b4c544SIan Rogers        "Unit": "QPI"
4088ee37818SIan Rogers    },
4098ee37818SIan Rogers    {
4108ee37818SIan Rogers        "EventCode": "0x38",
4118ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.AnyDataC",
4128ee37818SIan Rogers        "PerPkg": "1",
413*14b4c544SIan Rogers        "Unit": "QPI"
4148ee37818SIan Rogers    },
4158ee37818SIan Rogers    {
4168ee37818SIan Rogers        "EventCode": "0x38",
4178ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.AnyResp",
4188ee37818SIan Rogers        "PerPkg": "1",
419*14b4c544SIan Rogers        "Unit": "QPI"
4208ee37818SIan Rogers    },
4218ee37818SIan Rogers    {
4228ee37818SIan Rogers        "EventCode": "0x38",
4238ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.AnyResp11flits",
4248ee37818SIan Rogers        "PerPkg": "1",
425*14b4c544SIan Rogers        "Unit": "QPI"
4268ee37818SIan Rogers    },
4278ee37818SIan Rogers    {
4288ee37818SIan Rogers        "EventCode": "0x38",
4298ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.AnyResp9flits",
4308ee37818SIan Rogers        "PerPkg": "1",
431*14b4c544SIan Rogers        "Unit": "QPI"
4328ee37818SIan Rogers    },
4338ee37818SIan Rogers    {
4348ee37818SIan Rogers        "EventCode": "0x38",
4358ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.DataC_E",
4368ee37818SIan Rogers        "PerPkg": "1",
437*14b4c544SIan Rogers        "Unit": "QPI"
4388ee37818SIan Rogers    },
4398ee37818SIan Rogers    {
4408ee37818SIan Rogers        "EventCode": "0x38",
4418ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.DataC_E_Cmp",
4428ee37818SIan Rogers        "PerPkg": "1",
443*14b4c544SIan Rogers        "Unit": "QPI"
4448ee37818SIan Rogers    },
4458ee37818SIan Rogers    {
4468ee37818SIan Rogers        "EventCode": "0x38",
4478ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.DataC_E_FrcAckCnflt",
4488ee37818SIan Rogers        "PerPkg": "1",
449*14b4c544SIan Rogers        "Unit": "QPI"
4508ee37818SIan Rogers    },
4518ee37818SIan Rogers    {
4528ee37818SIan Rogers        "EventCode": "0x38",
4538ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.DataC_F",
4548ee37818SIan Rogers        "PerPkg": "1",
455*14b4c544SIan Rogers        "Unit": "QPI"
4568ee37818SIan Rogers    },
4578ee37818SIan Rogers    {
4588ee37818SIan Rogers        "EventCode": "0x38",
4598ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.DataC_F_Cmp",
4608ee37818SIan Rogers        "PerPkg": "1",
461*14b4c544SIan Rogers        "Unit": "QPI"
4628ee37818SIan Rogers    },
4638ee37818SIan Rogers    {
4648ee37818SIan Rogers        "EventCode": "0x38",
4658ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.DataC_F_FrcAckCnflt",
4668ee37818SIan Rogers        "PerPkg": "1",
467*14b4c544SIan Rogers        "Unit": "QPI"
4688ee37818SIan Rogers    },
4698ee37818SIan Rogers    {
4708ee37818SIan Rogers        "EventCode": "0x38",
4718ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.DataC_M",
4728ee37818SIan Rogers        "PerPkg": "1",
473*14b4c544SIan Rogers        "Unit": "QPI"
4748ee37818SIan Rogers    },
4758ee37818SIan Rogers    {
4768ee37818SIan Rogers        "EventCode": "0x38",
4778ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.WbEData",
4788ee37818SIan Rogers        "PerPkg": "1",
479*14b4c544SIan Rogers        "Unit": "QPI"
4808ee37818SIan Rogers    },
4818ee37818SIan Rogers    {
4828ee37818SIan Rogers        "EventCode": "0x38",
4838ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.WbIData",
4848ee37818SIan Rogers        "PerPkg": "1",
485*14b4c544SIan Rogers        "Unit": "QPI"
4868ee37818SIan Rogers    },
4878ee37818SIan Rogers    {
4888ee37818SIan Rogers        "EventCode": "0x38",
4898ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.DRS.WbSData",
4908ee37818SIan Rogers        "PerPkg": "1",
491*14b4c544SIan Rogers        "Unit": "QPI"
4928ee37818SIan Rogers    },
4938ee37818SIan Rogers    {
4948ee37818SIan Rogers        "EventCode": "0x38",
4958ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.AnyReq",
4968ee37818SIan Rogers        "PerPkg": "1",
497*14b4c544SIan Rogers        "Unit": "QPI"
4988ee37818SIan Rogers    },
4998ee37818SIan Rogers    {
5008ee37818SIan Rogers        "EventCode": "0x38",
5018ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.AnyResp",
5028ee37818SIan Rogers        "PerPkg": "1",
503*14b4c544SIan Rogers        "Unit": "QPI"
5048ee37818SIan Rogers    },
5058ee37818SIan Rogers    {
5068ee37818SIan Rogers        "EventCode": "0x38",
5078ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.RespFwd",
5088ee37818SIan Rogers        "PerPkg": "1",
509*14b4c544SIan Rogers        "Unit": "QPI"
5108ee37818SIan Rogers    },
5118ee37818SIan Rogers    {
5128ee37818SIan Rogers        "EventCode": "0x38",
5138ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.RespFwdI",
5148ee37818SIan Rogers        "PerPkg": "1",
515*14b4c544SIan Rogers        "Unit": "QPI"
5168ee37818SIan Rogers    },
5178ee37818SIan Rogers    {
5188ee37818SIan Rogers        "EventCode": "0x38",
5198ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.RespFwdIWb",
5208ee37818SIan Rogers        "PerPkg": "1",
521*14b4c544SIan Rogers        "Unit": "QPI"
5228ee37818SIan Rogers    },
5238ee37818SIan Rogers    {
5248ee37818SIan Rogers        "EventCode": "0x38",
5258ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.RespFwdS",
5268ee37818SIan Rogers        "PerPkg": "1",
527*14b4c544SIan Rogers        "Unit": "QPI"
5288ee37818SIan Rogers    },
5298ee37818SIan Rogers    {
5308ee37818SIan Rogers        "EventCode": "0x38",
5318ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.RespFwdSWb",
5328ee37818SIan Rogers        "PerPkg": "1",
533*14b4c544SIan Rogers        "Unit": "QPI"
5348ee37818SIan Rogers    },
5358ee37818SIan Rogers    {
5368ee37818SIan Rogers        "EventCode": "0x38",
5378ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.RespIWb",
5388ee37818SIan Rogers        "PerPkg": "1",
539*14b4c544SIan Rogers        "Unit": "QPI"
5408ee37818SIan Rogers    },
5418ee37818SIan Rogers    {
5428ee37818SIan Rogers        "EventCode": "0x38",
5438ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.HOM.RespSWb",
5448ee37818SIan Rogers        "PerPkg": "1",
545*14b4c544SIan Rogers        "Unit": "QPI"
5468ee37818SIan Rogers    },
5478ee37818SIan Rogers    {
5488ee37818SIan Rogers        "EventCode": "0x38",
5498ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NCB.AnyInt",
5508ee37818SIan Rogers        "PerPkg": "1",
551*14b4c544SIan Rogers        "Unit": "QPI"
5528ee37818SIan Rogers    },
5538ee37818SIan Rogers    {
5548ee37818SIan Rogers        "EventCode": "0x38",
5558ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NCB.AnyMsg",
5568ee37818SIan Rogers        "PerPkg": "1",
557*14b4c544SIan Rogers        "Unit": "QPI"
5588ee37818SIan Rogers    },
5598ee37818SIan Rogers    {
5608ee37818SIan Rogers        "EventCode": "0x38",
5618ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NCB.AnyMsg11flits",
5628ee37818SIan Rogers        "PerPkg": "1",
563*14b4c544SIan Rogers        "Unit": "QPI"
5648ee37818SIan Rogers    },
5658ee37818SIan Rogers    {
5668ee37818SIan Rogers        "EventCode": "0x38",
5678ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NCB.AnyMsg9flits",
5688ee37818SIan Rogers        "PerPkg": "1",
569*14b4c544SIan Rogers        "Unit": "QPI"
5708ee37818SIan Rogers    },
5718ee37818SIan Rogers    {
5728ee37818SIan Rogers        "EventCode": "0x38",
5738ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NCS.AnyMsg1or2flits",
5748ee37818SIan Rogers        "PerPkg": "1",
575*14b4c544SIan Rogers        "Unit": "QPI"
5768ee37818SIan Rogers    },
5778ee37818SIan Rogers    {
5788ee37818SIan Rogers        "EventCode": "0x38",
5798ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NCS.AnyMsg3flits",
5808ee37818SIan Rogers        "PerPkg": "1",
581*14b4c544SIan Rogers        "Unit": "QPI"
5828ee37818SIan Rogers    },
5838ee37818SIan Rogers    {
5848ee37818SIan Rogers        "EventCode": "0x38",
5858ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NCS.NcRd",
5868ee37818SIan Rogers        "PerPkg": "1",
587*14b4c544SIan Rogers        "Unit": "QPI"
5888ee37818SIan Rogers    },
5898ee37818SIan Rogers    {
5908ee37818SIan Rogers        "EventCode": "0x38",
5918ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.NDR.AnyCmp",
5928ee37818SIan Rogers        "PerPkg": "1",
593*14b4c544SIan Rogers        "Unit": "QPI"
5948ee37818SIan Rogers    },
5958ee37818SIan Rogers    {
5968ee37818SIan Rogers        "EventCode": "0x38",
5978ee37818SIan Rogers        "EventName": "UNC_Q_MESSAGE.SNP.AnySnp",
5988ee37818SIan Rogers        "PerPkg": "1",
599*14b4c544SIan Rogers        "Unit": "QPI"
6008ee37818SIan Rogers    },
6018ee37818SIan Rogers    {
60262201368SIan Rogers        "BriefDescription": "Cycles in L0p",
60362201368SIan Rogers        "EventCode": "0x10",
60462201368SIan Rogers        "EventName": "UNC_Q_RxL0P_POWER_CYCLES",
60562201368SIan Rogers        "PerPkg": "1",
60662201368SIan Rogers        "PublicDescription": "Number of QPI qfclk cycles spent in L0p power mode.  L0p is a mode where we disable 1/2 of the QPI lanes, decreasing our bandwidth in order to save power.  It increases snoop and data transfer latencies and decreases overall bandwidth.  This mode can be very useful in NUMA optimized workloads that largely only utilize QPI for snoops and their responses.  Use edge detect to count the number of instances when the QPI link entered L0p.  Link power states are per link and per direction, so for example the Tx direction could be in one state while Rx was in another.",
607*14b4c544SIan Rogers        "Unit": "QPI"
60862201368SIan Rogers    },
60962201368SIan Rogers    {
61062201368SIan Rogers        "BriefDescription": "Cycles in L0",
61162201368SIan Rogers        "EventCode": "0xf",
61262201368SIan Rogers        "EventName": "UNC_Q_RxL0_POWER_CYCLES",
61362201368SIan Rogers        "PerPkg": "1",
61462201368SIan Rogers        "PublicDescription": "Number of QPI qfclk cycles spent in L0 power mode in the Link Layer.  L0 is the default mode which provides the highest performance with the most power.  Use edge detect to count the number of instances that the link entered L0.  Link power states are per link and per direction, so for example the Tx direction could be in one state while Rx was in another.  The phy layer  sometimes leaves L0 for training, which will not be captured by this event.",
615*14b4c544SIan Rogers        "Unit": "QPI"
61662201368SIan Rogers    },
61762201368SIan Rogers    {
61862201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Bypassed",
61962201368SIan Rogers        "EventCode": "0x9",
62062201368SIan Rogers        "EventName": "UNC_Q_RxL_BYPASSED",
62162201368SIan Rogers        "PerPkg": "1",
622d2aaf040SIan Rogers        "PublicDescription": "Counts the number of times that an incoming flit was able to bypass the flit buffer and pass directly across the BGF and into the Egress.  This is a latency optimization, and should generally be the common case.  If this value is less than the number of flits transferred, it implies that there was queueing getting onto the ring, and thus the transactions saw higher latency.",
623*14b4c544SIan Rogers        "Unit": "QPI"
62462201368SIan Rogers    },
62562201368SIan Rogers    {
62662201368SIan Rogers        "BriefDescription": "CRC Errors Detected; LinkInit",
62762201368SIan Rogers        "EventCode": "0x3",
62862201368SIan Rogers        "EventName": "UNC_Q_RxL_CRC_ERRORS.LINK_INIT",
62962201368SIan Rogers        "PerPkg": "1",
63062201368SIan Rogers        "PublicDescription": "Number of CRC errors detected in the QPI Agent.  Each QPI flit incorporates 8 bits of CRC for error detection.  This counts the number of flits where the CRC was able to detect an error.  After an error has been detected, the QPI agent will send a request to the transmitting socket to resend the flit (as well as any flits that came after it).; CRC errors detected during link initialization.",
63162201368SIan Rogers        "UMask": "0x1",
632*14b4c544SIan Rogers        "Unit": "QPI"
63362201368SIan Rogers    },
63462201368SIan Rogers    {
63562201368SIan Rogers        "BriefDescription": "CRC Errors Detected; Normal Operations",
63662201368SIan Rogers        "EventCode": "0x3",
63762201368SIan Rogers        "EventName": "UNC_Q_RxL_CRC_ERRORS.NORMAL_OP",
63862201368SIan Rogers        "PerPkg": "1",
63962201368SIan Rogers        "PublicDescription": "Number of CRC errors detected in the QPI Agent.  Each QPI flit incorporates 8 bits of CRC for error detection.  This counts the number of flits where the CRC was able to detect an error.  After an error has been detected, the QPI agent will send a request to the transmitting socket to resend the flit (as well as any flits that came after it).; CRC errors detected during normal operation.",
64062201368SIan Rogers        "UMask": "0x2",
641*14b4c544SIan Rogers        "Unit": "QPI"
64262201368SIan Rogers    },
64362201368SIan Rogers    {
64462201368SIan Rogers        "BriefDescription": "VN0 Credit Consumed; DRS",
64562201368SIan Rogers        "EventCode": "0x1e",
64662201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.DRS",
64762201368SIan Rogers        "PerPkg": "1",
64862201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN0 credit for the DRS message class.",
64962201368SIan Rogers        "UMask": "0x1",
650*14b4c544SIan Rogers        "Unit": "QPI"
65162201368SIan Rogers    },
65262201368SIan Rogers    {
65362201368SIan Rogers        "BriefDescription": "VN0 Credit Consumed; HOM",
65462201368SIan Rogers        "EventCode": "0x1e",
65562201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.HOM",
65662201368SIan Rogers        "PerPkg": "1",
65762201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN0 credit for the HOM message class.",
65862201368SIan Rogers        "UMask": "0x8",
659*14b4c544SIan Rogers        "Unit": "QPI"
66062201368SIan Rogers    },
66162201368SIan Rogers    {
66262201368SIan Rogers        "BriefDescription": "VN0 Credit Consumed; NCB",
66362201368SIan Rogers        "EventCode": "0x1e",
66462201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCB",
66562201368SIan Rogers        "PerPkg": "1",
66662201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN0 credit for the NCB message class.",
66762201368SIan Rogers        "UMask": "0x2",
668*14b4c544SIan Rogers        "Unit": "QPI"
66962201368SIan Rogers    },
67062201368SIan Rogers    {
67162201368SIan Rogers        "BriefDescription": "VN0 Credit Consumed; NCS",
67262201368SIan Rogers        "EventCode": "0x1e",
67362201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NCS",
67462201368SIan Rogers        "PerPkg": "1",
67562201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN0 credit for the NCS message class.",
67662201368SIan Rogers        "UMask": "0x4",
677*14b4c544SIan Rogers        "Unit": "QPI"
67862201368SIan Rogers    },
67962201368SIan Rogers    {
68062201368SIan Rogers        "BriefDescription": "VN0 Credit Consumed; NDR",
68162201368SIan Rogers        "EventCode": "0x1e",
68262201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.NDR",
68362201368SIan Rogers        "PerPkg": "1",
68462201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN0 credit for the NDR message class.",
68562201368SIan Rogers        "UMask": "0x20",
686*14b4c544SIan Rogers        "Unit": "QPI"
68762201368SIan Rogers    },
68862201368SIan Rogers    {
68962201368SIan Rogers        "BriefDescription": "VN0 Credit Consumed; SNP",
69062201368SIan Rogers        "EventCode": "0x1e",
69162201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN0.SNP",
69262201368SIan Rogers        "PerPkg": "1",
69362201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN0 credit was consumed (i.e. message uses a VN0 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN0 credit for the SNP message class.",
69462201368SIan Rogers        "UMask": "0x10",
695*14b4c544SIan Rogers        "Unit": "QPI"
69662201368SIan Rogers    },
69762201368SIan Rogers    {
69862201368SIan Rogers        "BriefDescription": "VN1 Credit Consumed; DRS",
69962201368SIan Rogers        "EventCode": "0x39",
70062201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.DRS",
70162201368SIan Rogers        "PerPkg": "1",
70262201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN1 credit for the DRS message class.",
70362201368SIan Rogers        "UMask": "0x1",
704*14b4c544SIan Rogers        "Unit": "QPI"
70562201368SIan Rogers    },
70662201368SIan Rogers    {
70762201368SIan Rogers        "BriefDescription": "VN1 Credit Consumed; HOM",
70862201368SIan Rogers        "EventCode": "0x39",
70962201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.HOM",
71062201368SIan Rogers        "PerPkg": "1",
71162201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN1 credit for the HOM message class.",
71262201368SIan Rogers        "UMask": "0x8",
713*14b4c544SIan Rogers        "Unit": "QPI"
71462201368SIan Rogers    },
71562201368SIan Rogers    {
71662201368SIan Rogers        "BriefDescription": "VN1 Credit Consumed; NCB",
71762201368SIan Rogers        "EventCode": "0x39",
71862201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCB",
71962201368SIan Rogers        "PerPkg": "1",
72062201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN1 credit for the NCB message class.",
72162201368SIan Rogers        "UMask": "0x2",
722*14b4c544SIan Rogers        "Unit": "QPI"
72362201368SIan Rogers    },
72462201368SIan Rogers    {
72562201368SIan Rogers        "BriefDescription": "VN1 Credit Consumed; NCS",
72662201368SIan Rogers        "EventCode": "0x39",
72762201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NCS",
72862201368SIan Rogers        "PerPkg": "1",
72962201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN1 credit for the NCS message class.",
73062201368SIan Rogers        "UMask": "0x4",
731*14b4c544SIan Rogers        "Unit": "QPI"
73262201368SIan Rogers    },
73362201368SIan Rogers    {
73462201368SIan Rogers        "BriefDescription": "VN1 Credit Consumed; NDR",
73562201368SIan Rogers        "EventCode": "0x39",
73662201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.NDR",
73762201368SIan Rogers        "PerPkg": "1",
73862201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN1 credit for the NDR message class.",
73962201368SIan Rogers        "UMask": "0x20",
740*14b4c544SIan Rogers        "Unit": "QPI"
74162201368SIan Rogers    },
74262201368SIan Rogers    {
74362201368SIan Rogers        "BriefDescription": "VN1 Credit Consumed; SNP",
74462201368SIan Rogers        "EventCode": "0x39",
74562201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VN1.SNP",
74662201368SIan Rogers        "PerPkg": "1",
74762201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VN1 credit was consumed (i.e. message uses a VN1 credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.; VN1 credit for the SNP message class.",
74862201368SIan Rogers        "UMask": "0x10",
749*14b4c544SIan Rogers        "Unit": "QPI"
75062201368SIan Rogers    },
75162201368SIan Rogers    {
75262201368SIan Rogers        "BriefDescription": "VNA Credit Consumed",
75362201368SIan Rogers        "EventCode": "0x1d",
75462201368SIan Rogers        "EventName": "UNC_Q_RxL_CREDITS_CONSUMED_VNA",
75562201368SIan Rogers        "PerPkg": "1",
75662201368SIan Rogers        "PublicDescription": "Counts the number of times that an RxQ VNA credit was consumed (i.e. message uses a VNA credit for the Rx Buffer).  This includes packets that went through the RxQ and those that were bypasssed.",
757*14b4c544SIan Rogers        "Unit": "QPI"
75862201368SIan Rogers    },
75962201368SIan Rogers    {
76062201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty",
76162201368SIan Rogers        "EventCode": "0xa",
76262201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE",
76362201368SIan Rogers        "PerPkg": "1",
76462201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.",
765*14b4c544SIan Rogers        "Unit": "QPI"
76662201368SIan Rogers    },
76762201368SIan Rogers    {
76862201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN0",
76962201368SIan Rogers        "EventCode": "0xF",
77062201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN0",
77162201368SIan Rogers        "PerPkg": "1",
77262201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors DRS flits only.",
77362201368SIan Rogers        "UMask": "0x1",
774*14b4c544SIan Rogers        "Unit": "QPI"
77562201368SIan Rogers    },
77662201368SIan Rogers    {
77762201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - DRS; for VN1",
77862201368SIan Rogers        "EventCode": "0xF",
77962201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_DRS.VN1",
78062201368SIan Rogers        "PerPkg": "1",
78162201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors DRS flits only.",
78262201368SIan Rogers        "UMask": "0x2",
783*14b4c544SIan Rogers        "Unit": "QPI"
78462201368SIan Rogers    },
78562201368SIan Rogers    {
78662201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN0",
78762201368SIan Rogers        "EventCode": "0x12",
78862201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN0",
78962201368SIan Rogers        "PerPkg": "1",
79062201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors HOM flits only.",
79162201368SIan Rogers        "UMask": "0x1",
792*14b4c544SIan Rogers        "Unit": "QPI"
79362201368SIan Rogers    },
79462201368SIan Rogers    {
79562201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - HOM; for VN1",
79662201368SIan Rogers        "EventCode": "0x12",
79762201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_HOM.VN1",
79862201368SIan Rogers        "PerPkg": "1",
79962201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors HOM flits only.",
80062201368SIan Rogers        "UMask": "0x2",
801*14b4c544SIan Rogers        "Unit": "QPI"
80262201368SIan Rogers    },
80362201368SIan Rogers    {
80462201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN0",
80562201368SIan Rogers        "EventCode": "0x10",
80662201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN0",
80762201368SIan Rogers        "PerPkg": "1",
80862201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors NCB flits only.",
80962201368SIan Rogers        "UMask": "0x1",
810*14b4c544SIan Rogers        "Unit": "QPI"
81162201368SIan Rogers    },
81262201368SIan Rogers    {
81362201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - NCB; for VN1",
81462201368SIan Rogers        "EventCode": "0x10",
81562201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_NCB.VN1",
81662201368SIan Rogers        "PerPkg": "1",
81762201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors NCB flits only.",
81862201368SIan Rogers        "UMask": "0x2",
819*14b4c544SIan Rogers        "Unit": "QPI"
82062201368SIan Rogers    },
82162201368SIan Rogers    {
82262201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN0",
82362201368SIan Rogers        "EventCode": "0x11",
82462201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN0",
82562201368SIan Rogers        "PerPkg": "1",
82662201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors NCS flits only.",
82762201368SIan Rogers        "UMask": "0x1",
828*14b4c544SIan Rogers        "Unit": "QPI"
82962201368SIan Rogers    },
83062201368SIan Rogers    {
83162201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - NCS; for VN1",
83262201368SIan Rogers        "EventCode": "0x11",
83362201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_NCS.VN1",
83462201368SIan Rogers        "PerPkg": "1",
83562201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors NCS flits only.",
83662201368SIan Rogers        "UMask": "0x2",
837*14b4c544SIan Rogers        "Unit": "QPI"
83862201368SIan Rogers    },
83962201368SIan Rogers    {
84062201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN0",
84162201368SIan Rogers        "EventCode": "0x14",
84262201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN0",
84362201368SIan Rogers        "PerPkg": "1",
84462201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors NDR flits only.",
84562201368SIan Rogers        "UMask": "0x1",
846*14b4c544SIan Rogers        "Unit": "QPI"
84762201368SIan Rogers    },
84862201368SIan Rogers    {
84962201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - NDR; for VN1",
85062201368SIan Rogers        "EventCode": "0x14",
85162201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_NDR.VN1",
85262201368SIan Rogers        "PerPkg": "1",
85362201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors NDR flits only.",
85462201368SIan Rogers        "UMask": "0x2",
855*14b4c544SIan Rogers        "Unit": "QPI"
85662201368SIan Rogers    },
85762201368SIan Rogers    {
85862201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN0",
85962201368SIan Rogers        "EventCode": "0x13",
86062201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN0",
86162201368SIan Rogers        "PerPkg": "1",
86262201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors SNP flits only.",
86362201368SIan Rogers        "UMask": "0x1",
864*14b4c544SIan Rogers        "Unit": "QPI"
86562201368SIan Rogers    },
86662201368SIan Rogers    {
86762201368SIan Rogers        "BriefDescription": "RxQ Cycles Not Empty - SNP; for VN1",
86862201368SIan Rogers        "EventCode": "0x13",
86962201368SIan Rogers        "EventName": "UNC_Q_RxL_CYCLES_NE_SNP.VN1",
87062201368SIan Rogers        "PerPkg": "1",
87162201368SIan Rogers        "PublicDescription": "Counts the number of cycles that the QPI RxQ was not empty.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy Accumulator event to calculate the average occupancy.  This monitors SNP flits only.",
87262201368SIan Rogers        "UMask": "0x2",
873*14b4c544SIan Rogers        "Unit": "QPI"
87462201368SIan Rogers    },
87562201368SIan Rogers    {
87662201368SIan Rogers        "BriefDescription": "Flits Received - Group 0; Data Tx Flits",
87762201368SIan Rogers        "EventCode": "0x1",
87862201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G0.DATA",
87962201368SIan Rogers        "PerPkg": "1",
880d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  It includes filters for Idle, protocol, and Data Flits.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data flits received over QPI.  Each flit contains 64b of data.  This includes both DRS and NCB data flits (coherent and non-coherent).  This can be used to calculate the data bandwidth of the QPI link.  One can get a good picture of the QPI-link characteristics by evaluating the protocol flits, data flits, and idle/null flits.  This does not include the header flits that go in data packets.",
88162201368SIan Rogers        "UMask": "0x2",
882*14b4c544SIan Rogers        "Unit": "QPI"
88362201368SIan Rogers    },
88462201368SIan Rogers    {
88562201368SIan Rogers        "BriefDescription": "Flits Received - Group 0; Idle and Null Flits",
88662201368SIan Rogers        "EventCode": "0x1",
88762201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G0.IDLE",
88862201368SIan Rogers        "PerPkg": "1",
889d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  It includes filters for Idle, protocol, and Data Flits.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of flits received over QPI that do not hold protocol payload.  When QPI is not in a power saving state, it continuously transmits flits across the link.  When there are no protocol flits to send, it will send IDLE and NULL flits  across.  These flits sometimes do carry a payload, such as credit returns, but are generally not considered part of the QPI bandwidth.",
89062201368SIan Rogers        "UMask": "0x1",
891*14b4c544SIan Rogers        "Unit": "QPI"
89262201368SIan Rogers    },
89362201368SIan Rogers    {
89462201368SIan Rogers        "BriefDescription": "Flits Received - Group 0; Non-Data protocol Tx Flits",
89562201368SIan Rogers        "EventCode": "0x1",
89662201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G0.NON_DATA",
89762201368SIan Rogers        "PerPkg": "1",
898d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  It includes filters for Idle, protocol, and Data Flits.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL non-data flits received across QPI.  This basically tracks the protocol overhead on the QPI link.  One can get a good picture of the QPI-link characteristics by evaluating the protocol flits, data flits, and idle/null flits.  This includes the header flits for data packets.",
89962201368SIan Rogers        "UMask": "0x4",
900*14b4c544SIan Rogers        "Unit": "QPI"
90162201368SIan Rogers    },
90262201368SIan Rogers    {
90362201368SIan Rogers        "BriefDescription": "Flits Received - Group 1; DRS Flits (both Header and Data)",
90462201368SIan Rogers        "EventCode": "0x2",
90562201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G1.DRS",
90662201368SIan Rogers        "PerPkg": "1",
907d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of flits received over QPI on the DRS (Data Response) channel.  DRS flits are used to transmit data with coherency.  This does not count data flits received over the NCB channel which transmits non-coherent data.",
90862201368SIan Rogers        "UMask": "0x18",
909*14b4c544SIan Rogers        "Unit": "QPI"
91062201368SIan Rogers    },
91162201368SIan Rogers    {
91262201368SIan Rogers        "BriefDescription": "Flits Received - Group 1; DRS Data Flits",
91362201368SIan Rogers        "EventCode": "0x2",
91462201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G1.DRS_DATA",
91562201368SIan Rogers        "PerPkg": "1",
916d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of data flits received over QPI on the DRS (Data Response) channel.  DRS flits are used to transmit data with coherency.  This does not count data flits received over the NCB channel which transmits non-coherent data.  This includes only the data flits (not the header).",
91762201368SIan Rogers        "UMask": "0x8",
918*14b4c544SIan Rogers        "Unit": "QPI"
91962201368SIan Rogers    },
92062201368SIan Rogers    {
92162201368SIan Rogers        "BriefDescription": "Flits Received - Group 1; DRS Header Flits",
92262201368SIan Rogers        "EventCode": "0x2",
92362201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G1.DRS_NONDATA",
92462201368SIan Rogers        "PerPkg": "1",
925d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of protocol flits received over QPI on the DRS (Data Response) channel.  DRS flits are used to transmit data with coherency.  This does not count data flits received over the NCB channel which transmits non-coherent data.  This includes only the header flits (not the data).  This includes extended headers.",
92662201368SIan Rogers        "UMask": "0x10",
927*14b4c544SIan Rogers        "Unit": "QPI"
92862201368SIan Rogers    },
92962201368SIan Rogers    {
93062201368SIan Rogers        "BriefDescription": "Flits Received - Group 1; HOM Flits",
93162201368SIan Rogers        "EventCode": "0x2",
93262201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G1.HOM",
93362201368SIan Rogers        "PerPkg": "1",
934d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of flits received over QPI on the home channel.",
93562201368SIan Rogers        "UMask": "0x6",
936*14b4c544SIan Rogers        "Unit": "QPI"
93762201368SIan Rogers    },
93862201368SIan Rogers    {
93962201368SIan Rogers        "BriefDescription": "Flits Received - Group 1; HOM Non-Request Flits",
94062201368SIan Rogers        "EventCode": "0x2",
94162201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G1.HOM_NONREQ",
94262201368SIan Rogers        "PerPkg": "1",
943d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of non-request flits received over QPI on the home channel.  These are most commonly snoop responses, and this event can be used as a proxy for that.",
94462201368SIan Rogers        "UMask": "0x4",
945*14b4c544SIan Rogers        "Unit": "QPI"
94662201368SIan Rogers    },
94762201368SIan Rogers    {
94862201368SIan Rogers        "BriefDescription": "Flits Received - Group 1; HOM Request Flits",
94962201368SIan Rogers        "EventCode": "0x2",
95062201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G1.HOM_REQ",
95162201368SIan Rogers        "PerPkg": "1",
952d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of data request received over QPI on the home channel.  This basically counts the number of remote memory requests received over QPI.  In conjunction with the local read count in the Home Agent, one can calculate the number of LLC Misses.",
95362201368SIan Rogers        "UMask": "0x2",
954*14b4c544SIan Rogers        "Unit": "QPI"
95562201368SIan Rogers    },
95662201368SIan Rogers    {
95762201368SIan Rogers        "BriefDescription": "Flits Received - Group 1; SNP Flits",
95862201368SIan Rogers        "EventCode": "0x2",
95962201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G1.SNP",
96062201368SIan Rogers        "PerPkg": "1",
961d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of snoop request flits received over QPI.  These requests are contained in the snoop channel.  This does not include snoop responses, which are received on the home channel.",
96262201368SIan Rogers        "UMask": "0x1",
963*14b4c544SIan Rogers        "Unit": "QPI"
96462201368SIan Rogers    },
96562201368SIan Rogers    {
96662201368SIan Rogers        "BriefDescription": "Flits Received - Group 2; Non-Coherent Rx Flits",
96762201368SIan Rogers        "EventCode": "0x3",
96862201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G2.NCB",
96962201368SIan Rogers        "PerPkg": "1",
970d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of Non-Coherent Bypass flits.  These packets are generally used to transmit non-coherent data across QPI.",
9718ee37818SIan Rogers        "UMask": "0xc",
972*14b4c544SIan Rogers        "Unit": "QPI"
97362201368SIan Rogers    },
97462201368SIan Rogers    {
97562201368SIan Rogers        "BriefDescription": "Flits Received - Group 2; Non-Coherent data Rx Flits",
97662201368SIan Rogers        "EventCode": "0x3",
97762201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G2.NCB_DATA",
97862201368SIan Rogers        "PerPkg": "1",
979d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of Non-Coherent Bypass data flits.  These flits are generally used to transmit non-coherent data across QPI.  This does not include a count of the DRS (coherent) data flits.  This only counts the data flits, not the NCB headers.",
98062201368SIan Rogers        "UMask": "0x4",
981*14b4c544SIan Rogers        "Unit": "QPI"
98262201368SIan Rogers    },
98362201368SIan Rogers    {
98462201368SIan Rogers        "BriefDescription": "Flits Received - Group 2; Non-Coherent non-data Rx Flits",
98562201368SIan Rogers        "EventCode": "0x3",
98662201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G2.NCB_NONDATA",
98762201368SIan Rogers        "PerPkg": "1",
988d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of Non-Coherent Bypass non-data flits.  These packets are generally used to transmit non-coherent data across QPI, and the flits counted here are for headers and other non-data flits.  This includes extended headers.",
98962201368SIan Rogers        "UMask": "0x8",
990*14b4c544SIan Rogers        "Unit": "QPI"
99162201368SIan Rogers    },
99262201368SIan Rogers    {
99362201368SIan Rogers        "BriefDescription": "Flits Received - Group 2; Non-Coherent standard Rx Flits",
99462201368SIan Rogers        "EventCode": "0x3",
99562201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G2.NCS",
99662201368SIan Rogers        "PerPkg": "1",
997d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of NCS (non-coherent standard) flits received over QPI.    This includes extended headers.",
99862201368SIan Rogers        "UMask": "0x10",
999*14b4c544SIan Rogers        "Unit": "QPI"
100062201368SIan Rogers    },
100162201368SIan Rogers    {
100262201368SIan Rogers        "BriefDescription": "Flits Received - Group 2; Non-Data Response Rx Flits - AD",
100362201368SIan Rogers        "EventCode": "0x3",
100462201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AD",
100562201368SIan Rogers        "PerPkg": "1",
1006d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of flits received over the NDR (Non-Data Response) channel.  This channel is used to send a variety of protocol flits including grants and completions.  This is only for NDR packets to the local socket which use the AK ring.",
100762201368SIan Rogers        "UMask": "0x1",
1008*14b4c544SIan Rogers        "Unit": "QPI"
100962201368SIan Rogers    },
101062201368SIan Rogers    {
101162201368SIan Rogers        "BriefDescription": "Flits Received - Group 2; Non-Data Response Rx Flits - AK",
101262201368SIan Rogers        "EventCode": "0x3",
101362201368SIan Rogers        "EventName": "UNC_Q_RxL_FLITS_G2.NDR_AK",
101462201368SIan Rogers        "PerPkg": "1",
1015d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits received from the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of flits received over the NDR (Non-Data Response) channel.  This channel is used to send a variety of protocol flits including grants and completions.  This is only for NDR packets destined for Route-thru to a remote socket.",
101662201368SIan Rogers        "UMask": "0x2",
1017*14b4c544SIan Rogers        "Unit": "QPI"
101862201368SIan Rogers    },
101962201368SIan Rogers    {
102062201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations",
102162201368SIan Rogers        "EventCode": "0x8",
102262201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS",
102362201368SIan Rogers        "PerPkg": "1",
102462201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.",
1025*14b4c544SIan Rogers        "Unit": "QPI"
102662201368SIan Rogers    },
102762201368SIan Rogers    {
102862201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - DRS",
102962201368SIan Rogers        "EventCode": "0x9",
103062201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_DRS",
103162201368SIan Rogers        "PerPkg": "1",
103262201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only DRS flits.",
1033*14b4c544SIan Rogers        "Unit": "QPI"
103462201368SIan Rogers    },
103562201368SIan Rogers    {
103662201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN0",
103762201368SIan Rogers        "EventCode": "0x9",
103862201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_DRS.VN0",
103962201368SIan Rogers        "PerPkg": "1",
104062201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only DRS flits.",
104162201368SIan Rogers        "UMask": "0x1",
1042*14b4c544SIan Rogers        "Unit": "QPI"
104362201368SIan Rogers    },
104462201368SIan Rogers    {
104562201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - DRS; for VN1",
104662201368SIan Rogers        "EventCode": "0x9",
104762201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_DRS.VN1",
104862201368SIan Rogers        "PerPkg": "1",
104962201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only DRS flits.",
105062201368SIan Rogers        "UMask": "0x2",
1051*14b4c544SIan Rogers        "Unit": "QPI"
105262201368SIan Rogers    },
105362201368SIan Rogers    {
105462201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - HOM",
105562201368SIan Rogers        "EventCode": "0xc",
105662201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_HOM",
105762201368SIan Rogers        "PerPkg": "1",
105862201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only HOM flits.",
1059*14b4c544SIan Rogers        "Unit": "QPI"
106062201368SIan Rogers    },
106162201368SIan Rogers    {
106262201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN0",
106362201368SIan Rogers        "EventCode": "0xC",
106462201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_HOM.VN0",
106562201368SIan Rogers        "PerPkg": "1",
106662201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only HOM flits.",
106762201368SIan Rogers        "UMask": "0x1",
1068*14b4c544SIan Rogers        "Unit": "QPI"
106962201368SIan Rogers    },
107062201368SIan Rogers    {
107162201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - HOM; for VN1",
107262201368SIan Rogers        "EventCode": "0xC",
107362201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_HOM.VN1",
107462201368SIan Rogers        "PerPkg": "1",
107562201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only HOM flits.",
107662201368SIan Rogers        "UMask": "0x2",
1077*14b4c544SIan Rogers        "Unit": "QPI"
107862201368SIan Rogers    },
107962201368SIan Rogers    {
108062201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NCB",
108162201368SIan Rogers        "EventCode": "0xa",
108262201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NCB",
108362201368SIan Rogers        "PerPkg": "1",
108462201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NCB flits.",
1085*14b4c544SIan Rogers        "Unit": "QPI"
108662201368SIan Rogers    },
108762201368SIan Rogers    {
108862201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN0",
108962201368SIan Rogers        "EventCode": "0xA",
109062201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NCB.VN0",
109162201368SIan Rogers        "PerPkg": "1",
109262201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NCB flits.",
109362201368SIan Rogers        "UMask": "0x1",
1094*14b4c544SIan Rogers        "Unit": "QPI"
109562201368SIan Rogers    },
109662201368SIan Rogers    {
109762201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NCB; for VN1",
109862201368SIan Rogers        "EventCode": "0xA",
109962201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NCB.VN1",
110062201368SIan Rogers        "PerPkg": "1",
110162201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NCB flits.",
110262201368SIan Rogers        "UMask": "0x2",
1103*14b4c544SIan Rogers        "Unit": "QPI"
110462201368SIan Rogers    },
110562201368SIan Rogers    {
110662201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NCS",
110762201368SIan Rogers        "EventCode": "0xb",
110862201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NCS",
110962201368SIan Rogers        "PerPkg": "1",
111062201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NCS flits.",
1111*14b4c544SIan Rogers        "Unit": "QPI"
111262201368SIan Rogers    },
111362201368SIan Rogers    {
111462201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN0",
111562201368SIan Rogers        "EventCode": "0xB",
111662201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NCS.VN0",
111762201368SIan Rogers        "PerPkg": "1",
111862201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NCS flits.",
111962201368SIan Rogers        "UMask": "0x1",
1120*14b4c544SIan Rogers        "Unit": "QPI"
112162201368SIan Rogers    },
112262201368SIan Rogers    {
112362201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NCS; for VN1",
112462201368SIan Rogers        "EventCode": "0xB",
112562201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NCS.VN1",
112662201368SIan Rogers        "PerPkg": "1",
112762201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NCS flits.",
112862201368SIan Rogers        "UMask": "0x2",
1129*14b4c544SIan Rogers        "Unit": "QPI"
113062201368SIan Rogers    },
113162201368SIan Rogers    {
113262201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NDR",
113362201368SIan Rogers        "EventCode": "0xe",
113462201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NDR",
113562201368SIan Rogers        "PerPkg": "1",
113662201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NDR flits.",
1137*14b4c544SIan Rogers        "Unit": "QPI"
113862201368SIan Rogers    },
113962201368SIan Rogers    {
114062201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN0",
114162201368SIan Rogers        "EventCode": "0xE",
114262201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NDR.VN0",
114362201368SIan Rogers        "PerPkg": "1",
114462201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NDR flits.",
114562201368SIan Rogers        "UMask": "0x1",
1146*14b4c544SIan Rogers        "Unit": "QPI"
114762201368SIan Rogers    },
114862201368SIan Rogers    {
114962201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - NDR; for VN1",
115062201368SIan Rogers        "EventCode": "0xE",
115162201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_NDR.VN1",
115262201368SIan Rogers        "PerPkg": "1",
115362201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only NDR flits.",
115462201368SIan Rogers        "UMask": "0x2",
1155*14b4c544SIan Rogers        "Unit": "QPI"
115662201368SIan Rogers    },
115762201368SIan Rogers    {
115862201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - SNP",
115962201368SIan Rogers        "EventCode": "0xd",
116062201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_SNP",
116162201368SIan Rogers        "PerPkg": "1",
116262201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only SNP flits.",
1163*14b4c544SIan Rogers        "Unit": "QPI"
116462201368SIan Rogers    },
116562201368SIan Rogers    {
116662201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN0",
116762201368SIan Rogers        "EventCode": "0xD",
116862201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_SNP.VN0",
116962201368SIan Rogers        "PerPkg": "1",
117062201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only SNP flits.",
117162201368SIan Rogers        "UMask": "0x1",
1172*14b4c544SIan Rogers        "Unit": "QPI"
117362201368SIan Rogers    },
117462201368SIan Rogers    {
117562201368SIan Rogers        "BriefDescription": "Rx Flit Buffer Allocations - SNP; for VN1",
117662201368SIan Rogers        "EventCode": "0xD",
117762201368SIan Rogers        "EventName": "UNC_Q_RxL_INSERTS_SNP.VN1",
117862201368SIan Rogers        "PerPkg": "1",
117962201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Rx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.  This monitors only SNP flits.",
118062201368SIan Rogers        "UMask": "0x2",
1181*14b4c544SIan Rogers        "Unit": "QPI"
118262201368SIan Rogers    },
118362201368SIan Rogers    {
118462201368SIan Rogers        "BriefDescription": "RxQ Occupancy - All Packets",
118562201368SIan Rogers        "EventCode": "0xb",
118662201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY",
118762201368SIan Rogers        "PerPkg": "1",
118862201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.",
1189*14b4c544SIan Rogers        "Unit": "QPI"
119062201368SIan Rogers    },
119162201368SIan Rogers    {
119262201368SIan Rogers        "BriefDescription": "RxQ Occupancy - DRS",
119362201368SIan Rogers        "EventCode": "0x15",
119462201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_DRS",
119562201368SIan Rogers        "PerPkg": "1",
119662201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors DRS flits only.",
1197*14b4c544SIan Rogers        "Unit": "QPI"
119862201368SIan Rogers    },
119962201368SIan Rogers    {
120062201368SIan Rogers        "BriefDescription": "RxQ Occupancy - DRS; for VN0",
120162201368SIan Rogers        "EventCode": "0x15",
120262201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN0",
120362201368SIan Rogers        "PerPkg": "1",
120462201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors DRS flits only.",
120562201368SIan Rogers        "UMask": "0x1",
1206*14b4c544SIan Rogers        "Unit": "QPI"
120762201368SIan Rogers    },
120862201368SIan Rogers    {
120962201368SIan Rogers        "BriefDescription": "RxQ Occupancy - DRS; for VN1",
121062201368SIan Rogers        "EventCode": "0x15",
121162201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_DRS.VN1",
121262201368SIan Rogers        "PerPkg": "1",
121362201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors DRS flits only.",
121462201368SIan Rogers        "UMask": "0x2",
1215*14b4c544SIan Rogers        "Unit": "QPI"
121662201368SIan Rogers    },
121762201368SIan Rogers    {
121862201368SIan Rogers        "BriefDescription": "RxQ Occupancy - HOM",
121962201368SIan Rogers        "EventCode": "0x18",
122062201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_HOM",
122162201368SIan Rogers        "PerPkg": "1",
122262201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors HOM flits only.",
1223*14b4c544SIan Rogers        "Unit": "QPI"
122462201368SIan Rogers    },
122562201368SIan Rogers    {
122662201368SIan Rogers        "BriefDescription": "RxQ Occupancy - HOM; for VN0",
122762201368SIan Rogers        "EventCode": "0x18",
122862201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN0",
122962201368SIan Rogers        "PerPkg": "1",
123062201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors HOM flits only.",
123162201368SIan Rogers        "UMask": "0x1",
1232*14b4c544SIan Rogers        "Unit": "QPI"
123362201368SIan Rogers    },
123462201368SIan Rogers    {
123562201368SIan Rogers        "BriefDescription": "RxQ Occupancy - HOM; for VN1",
123662201368SIan Rogers        "EventCode": "0x18",
123762201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_HOM.VN1",
123862201368SIan Rogers        "PerPkg": "1",
123962201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors HOM flits only.",
124062201368SIan Rogers        "UMask": "0x2",
1241*14b4c544SIan Rogers        "Unit": "QPI"
124262201368SIan Rogers    },
124362201368SIan Rogers    {
124462201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NCB",
124562201368SIan Rogers        "EventCode": "0x16",
124662201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NCB",
124762201368SIan Rogers        "PerPkg": "1",
124862201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NCB flits only.",
1249*14b4c544SIan Rogers        "Unit": "QPI"
125062201368SIan Rogers    },
125162201368SIan Rogers    {
125262201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NCB; for VN0",
125362201368SIan Rogers        "EventCode": "0x16",
125462201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN0",
125562201368SIan Rogers        "PerPkg": "1",
125662201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NCB flits only.",
125762201368SIan Rogers        "UMask": "0x1",
1258*14b4c544SIan Rogers        "Unit": "QPI"
125962201368SIan Rogers    },
126062201368SIan Rogers    {
126162201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NCB; for VN1",
126262201368SIan Rogers        "EventCode": "0x16",
126362201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NCB.VN1",
126462201368SIan Rogers        "PerPkg": "1",
126562201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NCB flits only.",
126662201368SIan Rogers        "UMask": "0x2",
1267*14b4c544SIan Rogers        "Unit": "QPI"
126862201368SIan Rogers    },
126962201368SIan Rogers    {
127062201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NCS",
127162201368SIan Rogers        "EventCode": "0x17",
127262201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NCS",
127362201368SIan Rogers        "PerPkg": "1",
127462201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NCS flits only.",
1275*14b4c544SIan Rogers        "Unit": "QPI"
127662201368SIan Rogers    },
127762201368SIan Rogers    {
127862201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NCS; for VN0",
127962201368SIan Rogers        "EventCode": "0x17",
128062201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN0",
128162201368SIan Rogers        "PerPkg": "1",
128262201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NCS flits only.",
128362201368SIan Rogers        "UMask": "0x1",
1284*14b4c544SIan Rogers        "Unit": "QPI"
128562201368SIan Rogers    },
128662201368SIan Rogers    {
128762201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NCS; for VN1",
128862201368SIan Rogers        "EventCode": "0x17",
128962201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NCS.VN1",
129062201368SIan Rogers        "PerPkg": "1",
129162201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NCS flits only.",
129262201368SIan Rogers        "UMask": "0x2",
1293*14b4c544SIan Rogers        "Unit": "QPI"
129462201368SIan Rogers    },
129562201368SIan Rogers    {
129662201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NDR",
129762201368SIan Rogers        "EventCode": "0x1a",
129862201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NDR",
129962201368SIan Rogers        "PerPkg": "1",
130062201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NDR flits only.",
1301*14b4c544SIan Rogers        "Unit": "QPI"
130262201368SIan Rogers    },
130362201368SIan Rogers    {
130462201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NDR; for VN0",
130562201368SIan Rogers        "EventCode": "0x1A",
130662201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN0",
130762201368SIan Rogers        "PerPkg": "1",
130862201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NDR flits only.",
130962201368SIan Rogers        "UMask": "0x1",
1310*14b4c544SIan Rogers        "Unit": "QPI"
131162201368SIan Rogers    },
131262201368SIan Rogers    {
131362201368SIan Rogers        "BriefDescription": "RxQ Occupancy - NDR; for VN1",
131462201368SIan Rogers        "EventCode": "0x1A",
131562201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_NDR.VN1",
131662201368SIan Rogers        "PerPkg": "1",
131762201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors NDR flits only.",
131862201368SIan Rogers        "UMask": "0x2",
1319*14b4c544SIan Rogers        "Unit": "QPI"
132062201368SIan Rogers    },
132162201368SIan Rogers    {
132262201368SIan Rogers        "BriefDescription": "RxQ Occupancy - SNP",
132362201368SIan Rogers        "EventCode": "0x19",
132462201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_SNP",
132562201368SIan Rogers        "PerPkg": "1",
132662201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors SNP flits only.",
1327*14b4c544SIan Rogers        "Unit": "QPI"
132862201368SIan Rogers    },
132962201368SIan Rogers    {
133062201368SIan Rogers        "BriefDescription": "RxQ Occupancy - SNP; for VN0",
133162201368SIan Rogers        "EventCode": "0x19",
133262201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN0",
133362201368SIan Rogers        "PerPkg": "1",
133462201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors SNP flits only.",
133562201368SIan Rogers        "UMask": "0x1",
1336*14b4c544SIan Rogers        "Unit": "QPI"
133762201368SIan Rogers    },
133862201368SIan Rogers    {
133962201368SIan Rogers        "BriefDescription": "RxQ Occupancy - SNP; for VN1",
134062201368SIan Rogers        "EventCode": "0x19",
134162201368SIan Rogers        "EventName": "UNC_Q_RxL_OCCUPANCY_SNP.VN1",
134262201368SIan Rogers        "PerPkg": "1",
134362201368SIan Rogers        "PublicDescription": "Accumulates the number of elements in the QPI RxQ in each cycle.  Generally, when data is transmitted across QPI, it will bypass the RxQ and pass directly to the ring interface.  If things back up getting transmitted onto the ring, however, it may need to allocate into this buffer, thus increasing the latency.  This event can be used in conjunction with the Flit Buffer Not Empty event to calculate average occupancy, or with the Flit Buffer Allocations event to track average lifetime.  This monitors SNP flits only.",
134462201368SIan Rogers        "UMask": "0x2",
1345*14b4c544SIan Rogers        "Unit": "QPI"
134662201368SIan Rogers    },
134762201368SIan Rogers    {
134862201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - HOM",
134962201368SIan Rogers        "EventCode": "0x35",
135062201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_DRS",
135162201368SIan Rogers        "PerPkg": "1",
135262201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled a packet from the HOM message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
135362201368SIan Rogers        "UMask": "0x1",
1354*14b4c544SIan Rogers        "Unit": "QPI"
135562201368SIan Rogers    },
135662201368SIan Rogers    {
135762201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - DRS",
135862201368SIan Rogers        "EventCode": "0x35",
135962201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_HOM",
136062201368SIan Rogers        "PerPkg": "1",
136162201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled a packet from the DRS message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
136262201368SIan Rogers        "UMask": "0x8",
1363*14b4c544SIan Rogers        "Unit": "QPI"
136462201368SIan Rogers    },
136562201368SIan Rogers    {
136662201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - SNP",
136762201368SIan Rogers        "EventCode": "0x35",
136862201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCB",
136962201368SIan Rogers        "PerPkg": "1",
137062201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled a packet from the SNP message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
137162201368SIan Rogers        "UMask": "0x2",
1372*14b4c544SIan Rogers        "Unit": "QPI"
137362201368SIan Rogers    },
137462201368SIan Rogers    {
137562201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - NDR",
137662201368SIan Rogers        "EventCode": "0x35",
137762201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NCS",
137862201368SIan Rogers        "PerPkg": "1",
137962201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled a packet from the NDR message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
138062201368SIan Rogers        "UMask": "0x4",
1381*14b4c544SIan Rogers        "Unit": "QPI"
138262201368SIan Rogers    },
138362201368SIan Rogers    {
138462201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - NCS",
138562201368SIan Rogers        "EventCode": "0x35",
138662201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_NDR",
138762201368SIan Rogers        "PerPkg": "1",
138862201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled a packet from the NCS message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
138962201368SIan Rogers        "UMask": "0x20",
1390*14b4c544SIan Rogers        "Unit": "QPI"
139162201368SIan Rogers    },
139262201368SIan Rogers    {
139362201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; BGF Stall - NCB",
139462201368SIan Rogers        "EventCode": "0x35",
139562201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.BGF_SNP",
139662201368SIan Rogers        "PerPkg": "1",
139762201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled a packet from the NCB message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
139862201368SIan Rogers        "UMask": "0x10",
1399*14b4c544SIan Rogers        "Unit": "QPI"
140062201368SIan Rogers    },
140162201368SIan Rogers    {
140262201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; Egress Credits",
140362201368SIan Rogers        "EventCode": "0x35",
140462201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.EGRESS_CREDITS",
140562201368SIan Rogers        "PerPkg": "1",
140662201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled a packet because there were insufficient BGF credits.  For details on a message class granularity, use the Egress Credit Occupancy events.",
140762201368SIan Rogers        "UMask": "0x40",
1408*14b4c544SIan Rogers        "Unit": "QPI"
140962201368SIan Rogers    },
141062201368SIan Rogers    {
141162201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN0; GV",
141262201368SIan Rogers        "EventCode": "0x35",
141362201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN0.GV",
141462201368SIan Rogers        "PerPkg": "1",
141562201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 0; Stalled because a GV transition (frequency transition) was taking place.",
141662201368SIan Rogers        "UMask": "0x80",
1417*14b4c544SIan Rogers        "Unit": "QPI"
141862201368SIan Rogers    },
141962201368SIan Rogers    {
142062201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - HOM",
142162201368SIan Rogers        "EventCode": "0x3a",
142262201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_DRS",
142362201368SIan Rogers        "PerPkg": "1",
142462201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 1.; Stalled a packet from the HOM message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
142562201368SIan Rogers        "UMask": "0x1",
1426*14b4c544SIan Rogers        "Unit": "QPI"
142762201368SIan Rogers    },
142862201368SIan Rogers    {
142962201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - DRS",
143062201368SIan Rogers        "EventCode": "0x3a",
143162201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_HOM",
143262201368SIan Rogers        "PerPkg": "1",
143362201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 1.; Stalled a packet from the DRS message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
143462201368SIan Rogers        "UMask": "0x8",
1435*14b4c544SIan Rogers        "Unit": "QPI"
143662201368SIan Rogers    },
143762201368SIan Rogers    {
143862201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - SNP",
143962201368SIan Rogers        "EventCode": "0x3a",
144062201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCB",
144162201368SIan Rogers        "PerPkg": "1",
144262201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 1.; Stalled a packet from the SNP message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
144362201368SIan Rogers        "UMask": "0x2",
1444*14b4c544SIan Rogers        "Unit": "QPI"
144562201368SIan Rogers    },
144662201368SIan Rogers    {
144762201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - NDR",
144862201368SIan Rogers        "EventCode": "0x3a",
144962201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NCS",
145062201368SIan Rogers        "PerPkg": "1",
145162201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 1.; Stalled a packet from the NDR message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
145262201368SIan Rogers        "UMask": "0x4",
1453*14b4c544SIan Rogers        "Unit": "QPI"
145462201368SIan Rogers    },
145562201368SIan Rogers    {
145662201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - NCS",
145762201368SIan Rogers        "EventCode": "0x3a",
145862201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_NDR",
145962201368SIan Rogers        "PerPkg": "1",
146062201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 1.; Stalled a packet from the NCS message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
146162201368SIan Rogers        "UMask": "0x20",
1462*14b4c544SIan Rogers        "Unit": "QPI"
146362201368SIan Rogers    },
146462201368SIan Rogers    {
146562201368SIan Rogers        "BriefDescription": "Stalls Sending to R3QPI on VN1; BGF Stall - NCB",
146662201368SIan Rogers        "EventCode": "0x3a",
146762201368SIan Rogers        "EventName": "UNC_Q_RxL_STALLS_VN1.BGF_SNP",
146862201368SIan Rogers        "PerPkg": "1",
146962201368SIan Rogers        "PublicDescription": "Number of stalls trying to send to R3QPI on Virtual Network 1.; Stalled a packet from the NCB message class because there were not enough BGF credits.  In bypass mode, we will stall on the packet boundary, while in RxQ mode we will stall on the flit boundary.",
147062201368SIan Rogers        "UMask": "0x10",
1471*14b4c544SIan Rogers        "Unit": "QPI"
147262201368SIan Rogers    },
147362201368SIan Rogers    {
147462201368SIan Rogers        "BriefDescription": "Cycles in L0p",
147562201368SIan Rogers        "EventCode": "0xd",
147662201368SIan Rogers        "EventName": "UNC_Q_TxL0P_POWER_CYCLES",
147762201368SIan Rogers        "PerPkg": "1",
147862201368SIan Rogers        "PublicDescription": "Number of QPI qfclk cycles spent in L0p power mode.  L0p is a mode where we disable 1/2 of the QPI lanes, decreasing our bandwidth in order to save power.  It increases snoop and data transfer latencies and decreases overall bandwidth.  This mode can be very useful in NUMA optimized workloads that largely only utilize QPI for snoops and their responses.  Use edge detect to count the number of instances when the QPI link entered L0p.  Link power states are per link and per direction, so for example the Tx direction could be in one state while Rx was in another.",
1479*14b4c544SIan Rogers        "Unit": "QPI"
148062201368SIan Rogers    },
148162201368SIan Rogers    {
148262201368SIan Rogers        "BriefDescription": "Cycles in L0",
148362201368SIan Rogers        "EventCode": "0xc",
148462201368SIan Rogers        "EventName": "UNC_Q_TxL0_POWER_CYCLES",
148562201368SIan Rogers        "PerPkg": "1",
148662201368SIan Rogers        "PublicDescription": "Number of QPI qfclk cycles spent in L0 power mode in the Link Layer.  L0 is the default mode which provides the highest performance with the most power.  Use edge detect to count the number of instances that the link entered L0.  Link power states are per link and per direction, so for example the Tx direction could be in one state while Rx was in another.  The phy layer  sometimes leaves L0 for training, which will not be captured by this event.",
1487*14b4c544SIan Rogers        "Unit": "QPI"
148862201368SIan Rogers    },
148962201368SIan Rogers    {
149062201368SIan Rogers        "BriefDescription": "Tx Flit Buffer Bypassed",
149162201368SIan Rogers        "EventCode": "0x5",
149262201368SIan Rogers        "EventName": "UNC_Q_TxL_BYPASSED",
149362201368SIan Rogers        "PerPkg": "1",
149462201368SIan Rogers        "PublicDescription": "Counts the number of times that an incoming flit was able to bypass the Tx flit buffer and pass directly out the QPI Link. Generally, when data is transmitted across QPI, it will bypass the TxQ and pass directly to the link.  However, the TxQ will be used with L0p and when LLR occurs, increasing latency to transfer out to the link.",
1495*14b4c544SIan Rogers        "Unit": "QPI"
149662201368SIan Rogers    },
149762201368SIan Rogers    {
149862201368SIan Rogers        "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is almost full",
149962201368SIan Rogers        "EventCode": "0x2",
150062201368SIan Rogers        "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.ALMOST_FULL",
150162201368SIan Rogers        "PerPkg": "1",
150262201368SIan Rogers        "PublicDescription": "Number of cycles when the Tx side ran out of Link Layer Retry credits, causing the Tx to stall.; When LLR is almost full, we block some but not all packets.",
150362201368SIan Rogers        "UMask": "0x2",
1504*14b4c544SIan Rogers        "Unit": "QPI"
150562201368SIan Rogers    },
150662201368SIan Rogers    {
150762201368SIan Rogers        "BriefDescription": "Cycles Stalled with no LLR Credits; LLR is full",
150862201368SIan Rogers        "EventCode": "0x2",
150962201368SIan Rogers        "EventName": "UNC_Q_TxL_CRC_NO_CREDITS.FULL",
151062201368SIan Rogers        "PerPkg": "1",
151162201368SIan Rogers        "PublicDescription": "Number of cycles when the Tx side ran out of Link Layer Retry credits, causing the Tx to stall.; When LLR is totally full, we are not allowed to send any packets.",
151262201368SIan Rogers        "UMask": "0x1",
1513*14b4c544SIan Rogers        "Unit": "QPI"
151462201368SIan Rogers    },
151562201368SIan Rogers    {
151662201368SIan Rogers        "BriefDescription": "Tx Flit Buffer Cycles not Empty",
151762201368SIan Rogers        "EventCode": "0x6",
151862201368SIan Rogers        "EventName": "UNC_Q_TxL_CYCLES_NE",
151962201368SIan Rogers        "PerPkg": "1",
152062201368SIan Rogers        "PublicDescription": "Counts the number of cycles when the TxQ is not empty. Generally, when data is transmitted across QPI, it will bypass the TxQ and pass directly to the link.  However, the TxQ will be used with L0p and when LLR occurs, increasing latency to transfer out to the link.",
1521*14b4c544SIan Rogers        "Unit": "QPI"
152262201368SIan Rogers    },
152362201368SIan Rogers    {
152462201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 0; Data Tx Flits",
152562201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G0.DATA",
152662201368SIan Rogers        "PerPkg": "1",
1527d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  It includes filters for Idle, protocol, and Data Flits.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of data flits transmitted over QPI.  Each flit contains 64b of data.  This includes both DRS and NCB data flits (coherent and non-coherent).  This can be used to calculate the data bandwidth of the QPI link.  One can get a good picture of the QPI-link characteristics by evaluating the protocol flits, data flits, and idle/null flits.  This does not include the header flits that go in data packets.",
152862201368SIan Rogers        "UMask": "0x2",
1529*14b4c544SIan Rogers        "Unit": "QPI"
153062201368SIan Rogers    },
153162201368SIan Rogers    {
153262201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 0; Non-Data protocol Tx Flits",
15336b138c7bSAndi Kleen        "EventName": "UNC_Q_TxL_FLITS_G0.NON_DATA",
15346b138c7bSAndi Kleen        "PerPkg": "1",
1535d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  It includes filters for Idle, protocol, and Data Flits.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time (for L0) or 4B instead of 8B for L0p.; Number of non-NULL non-data flits transmitted across QPI.  This basically tracks the protocol overhead on the QPI link.  One can get a good picture of the QPI-link characteristics by evaluating the protocol flits, data flits, and idle/null flits.  This includes the header flits for data packets.",
15366b138c7bSAndi Kleen        "UMask": "0x4",
1537*14b4c544SIan Rogers        "Unit": "QPI"
153862201368SIan Rogers    },
153962201368SIan Rogers    {
154062201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 1; DRS Flits (both Header and Data)",
154162201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G1.DRS",
154262201368SIan Rogers        "PerPkg": "1",
1543d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of flits transmitted over QPI on the DRS (Data Response) channel.  DRS flits are used to transmit data with coherency.",
154462201368SIan Rogers        "UMask": "0x18",
1545*14b4c544SIan Rogers        "Unit": "QPI"
154662201368SIan Rogers    },
154762201368SIan Rogers    {
154862201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 1; DRS Data Flits",
154962201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G1.DRS_DATA",
155062201368SIan Rogers        "PerPkg": "1",
1551d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of data flits transmitted over QPI on the DRS (Data Response) channel.  DRS flits are used to transmit data with coherency.  This does not count data flits transmitted over the NCB channel which transmits non-coherent data.  This includes only the data flits (not the header).",
155262201368SIan Rogers        "UMask": "0x8",
1553*14b4c544SIan Rogers        "Unit": "QPI"
155462201368SIan Rogers    },
155562201368SIan Rogers    {
155662201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 1; DRS Header Flits",
155762201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G1.DRS_NONDATA",
155862201368SIan Rogers        "PerPkg": "1",
1559d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of protocol flits transmitted over QPI on the DRS (Data Response) channel.  DRS flits are used to transmit data with coherency.  This does not count data flits transmitted over the NCB channel which transmits non-coherent data.  This includes only the header flits (not the data).  This includes extended headers.",
156062201368SIan Rogers        "UMask": "0x10",
1561*14b4c544SIan Rogers        "Unit": "QPI"
156262201368SIan Rogers    },
156362201368SIan Rogers    {
156462201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 1; HOM Flits",
156562201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G1.HOM",
156662201368SIan Rogers        "PerPkg": "1",
1567d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of flits transmitted over QPI on the home channel.",
156862201368SIan Rogers        "UMask": "0x6",
1569*14b4c544SIan Rogers        "Unit": "QPI"
157062201368SIan Rogers    },
157162201368SIan Rogers    {
157262201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 1; HOM Non-Request Flits",
157362201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G1.HOM_NONREQ",
157462201368SIan Rogers        "PerPkg": "1",
1575d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of non-request flits transmitted over QPI on the home channel.  These are most commonly snoop responses, and this event can be used as a proxy for that.",
157662201368SIan Rogers        "UMask": "0x4",
1577*14b4c544SIan Rogers        "Unit": "QPI"
157862201368SIan Rogers    },
157962201368SIan Rogers    {
158062201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 1; HOM Request Flits",
158162201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G1.HOM_REQ",
158262201368SIan Rogers        "PerPkg": "1",
1583d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of data request transmitted over QPI on the home channel.  This basically counts the number of remote memory requests transmitted over QPI.  In conjunction with the local read count in the Home Agent, one can calculate the number of LLC Misses.",
158462201368SIan Rogers        "UMask": "0x2",
1585*14b4c544SIan Rogers        "Unit": "QPI"
158662201368SIan Rogers    },
158762201368SIan Rogers    {
158862201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 1; SNP Flits",
158962201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G1.SNP",
159062201368SIan Rogers        "PerPkg": "1",
1591d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for SNP, HOM, and DRS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the number of snoop request flits transmitted over QPI.  These requests are contained in the snoop channel.  This does not include snoop responses, which are transmitted on the home channel.",
159262201368SIan Rogers        "UMask": "0x1",
1593*14b4c544SIan Rogers        "Unit": "QPI"
159462201368SIan Rogers    },
159562201368SIan Rogers    {
159662201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 2; Non-Coherent Bypass Tx Flits",
159762201368SIan Rogers        "EventCode": "0x1",
159862201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G2.NCB",
159962201368SIan Rogers        "PerPkg": "1",
1600d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of Non-Coherent Bypass flits.  These packets are generally used to transmit non-coherent data across QPI.",
16018ee37818SIan Rogers        "UMask": "0xc",
1602*14b4c544SIan Rogers        "Unit": "QPI"
160362201368SIan Rogers    },
160462201368SIan Rogers    {
160562201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 2; Non-Coherent data Tx Flits",
160662201368SIan Rogers        "EventCode": "0x1",
160762201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G2.NCB_DATA",
160862201368SIan Rogers        "PerPkg": "1",
1609d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of Non-Coherent Bypass data flits.  These flits are generally used to transmit non-coherent data across QPI.  This does not include a count of the DRS (coherent) data flits.  This only counts the data flits, not the NCB headers.",
161062201368SIan Rogers        "UMask": "0x4",
1611*14b4c544SIan Rogers        "Unit": "QPI"
161262201368SIan Rogers    },
161362201368SIan Rogers    {
161462201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 2; Non-Coherent non-data Tx Flits",
161562201368SIan Rogers        "EventCode": "0x1",
161662201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G2.NCB_NONDATA",
161762201368SIan Rogers        "PerPkg": "1",
1618d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of Non-Coherent Bypass non-data flits.  These packets are generally used to transmit non-coherent data across QPI, and the flits counted here are for headers and other non-data flits.  This includes extended headers.",
161962201368SIan Rogers        "UMask": "0x8",
1620*14b4c544SIan Rogers        "Unit": "QPI"
162162201368SIan Rogers    },
162262201368SIan Rogers    {
162362201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 2; Non-Coherent standard Tx Flits",
162462201368SIan Rogers        "EventCode": "0x1",
162562201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G2.NCS",
162662201368SIan Rogers        "PerPkg": "1",
1627d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Number of NCS (non-coherent standard) flits transmitted over QPI.    This includes extended headers.",
162862201368SIan Rogers        "UMask": "0x10",
1629*14b4c544SIan Rogers        "Unit": "QPI"
163062201368SIan Rogers    },
163162201368SIan Rogers    {
163262201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 2; Non-Data Response Tx Flits - AD",
163362201368SIan Rogers        "EventCode": "0x1",
163462201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AD",
163562201368SIan Rogers        "PerPkg": "1",
1636d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of flits transmitted over the NDR (Non-Data Response) channel.  This channel is used to send a variety of protocol flits including grants and completions.  This is only for NDR packets to the local socket which use the AK ring.",
163762201368SIan Rogers        "UMask": "0x1",
1638*14b4c544SIan Rogers        "Unit": "QPI"
163962201368SIan Rogers    },
164062201368SIan Rogers    {
164162201368SIan Rogers        "BriefDescription": "Flits Transferred - Group 2; Non-Data Response Tx Flits - AK",
164262201368SIan Rogers        "EventCode": "0x1",
164362201368SIan Rogers        "EventName": "UNC_Q_TxL_FLITS_G2.NDR_AK",
164462201368SIan Rogers        "PerPkg": "1",
1645d2aaf040SIan Rogers        "PublicDescription": "Counts the number of flits transmitted across the QPI Link.  This is one of three groups that allow us to track flits.  It includes filters for NDR, NCB, and NCS message classes.  Each flit is made up of 80 bits of information (in addition to some ECC data).  In full-width (L0) mode, flits are made up of four fits, each of which contains 20 bits of data (along with some additional ECC data).   In half-width (L0p) mode, the fits are only 10 bits, and therefore it takes twice as many fits to transmit a flit.  When one talks about QPI speed (for example, 8.0 GT/s), the transfers here refer to fits.  Therefore, in L0, the system will transfer 1 flit at the rate of 1/4th the QPI speed.  One can calculate the bandwidth of the link by taking: flits*80b/time.  Note that this is not the same as data bandwidth.  For example, when we are transferring a 64B cacheline across QPI, we will break it into 9 flits -- 1 with header information and 8 with 64 bits of actual data and an additional 16 bits of other information.  To calculate data bandwidth, one should therefore do: data flits * 8B / time.; Counts the total number of flits transmitted over the NDR (Non-Data Response) channel.  This channel is used to send a variety of protocol flits including grants and completions.  This is only for NDR packets destined for Route-thru to a remote socket.",
164662201368SIan Rogers        "UMask": "0x2",
1647*14b4c544SIan Rogers        "Unit": "QPI"
164862201368SIan Rogers    },
164962201368SIan Rogers    {
165062201368SIan Rogers        "BriefDescription": "Tx Flit Buffer Allocations",
165162201368SIan Rogers        "EventCode": "0x4",
165262201368SIan Rogers        "EventName": "UNC_Q_TxL_INSERTS",
165362201368SIan Rogers        "PerPkg": "1",
165462201368SIan Rogers        "PublicDescription": "Number of allocations into the QPI Tx Flit Buffer.  Generally, when data is transmitted across QPI, it will bypass the TxQ and pass directly to the link.  However, the TxQ will be used with L0p and when LLR occurs, increasing latency to transfer out to the link.  This event can be used in conjunction with the Flit Buffer Occupancy event in order to calculate the average flit buffer lifetime.",
1655*14b4c544SIan Rogers        "Unit": "QPI"
165662201368SIan Rogers    },
165762201368SIan Rogers    {
165862201368SIan Rogers        "BriefDescription": "Tx Flit Buffer Occupancy",
165962201368SIan Rogers        "EventCode": "0x7",
166062201368SIan Rogers        "EventName": "UNC_Q_TxL_OCCUPANCY",
166162201368SIan Rogers        "PerPkg": "1",
166262201368SIan Rogers        "PublicDescription": "Accumulates the number of flits in the TxQ.  Generally, when data is transmitted across QPI, it will bypass the TxQ and pass directly to the link.  However, the TxQ will be used with L0p and when LLR occurs, increasing latency to transfer out to the link. This can be used with the cycles not empty event to track average occupancy, or the allocations event to track average lifetime in the TxQ.",
1663*14b4c544SIan Rogers        "Unit": "QPI"
166462201368SIan Rogers    },
166562201368SIan Rogers    {
166662201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN0",
166762201368SIan Rogers        "EventCode": "0x26",
166862201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN0",
166962201368SIan Rogers        "PerPkg": "1",
167062201368SIan Rogers        "PublicDescription": "Number of link layer credits into the R3 (for transactions across the BGF) acquired each cycle. Flow Control FIFO for Home messages on AD.",
167162201368SIan Rogers        "UMask": "0x1",
1672*14b4c544SIan Rogers        "Unit": "QPI"
167362201368SIan Rogers    },
167462201368SIan Rogers    {
167562201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - HOM; for VN1",
167662201368SIan Rogers        "EventCode": "0x26",
167762201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_ACQUIRED.VN1",
167862201368SIan Rogers        "PerPkg": "1",
167962201368SIan Rogers        "PublicDescription": "Number of link layer credits into the R3 (for transactions across the BGF) acquired each cycle. Flow Control FIFO for Home messages on AD.",
168062201368SIan Rogers        "UMask": "0x2",
1681*14b4c544SIan Rogers        "Unit": "QPI"
168262201368SIan Rogers    },
168362201368SIan Rogers    {
168462201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for VN0",
168562201368SIan Rogers        "EventCode": "0x22",
168662201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN0",
168762201368SIan Rogers        "PerPkg": "1",
168862201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of link layer credits into the R3 (for transactions across the BGF) available in each cycle.  Flow Control FIFO for HOM messages on AD.",
168962201368SIan Rogers        "UMask": "0x1",
1690*14b4c544SIan Rogers        "Unit": "QPI"
169162201368SIan Rogers    },
169262201368SIan Rogers    {
169362201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD HOM; for VN1",
169462201368SIan Rogers        "EventCode": "0x22",
169562201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_HOM_CREDIT_OCCUPANCY.VN1",
169662201368SIan Rogers        "PerPkg": "1",
169762201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of link layer credits into the R3 (for transactions across the BGF) available in each cycle.  Flow Control FIFO for HOM messages on AD.",
169862201368SIan Rogers        "UMask": "0x2",
1699*14b4c544SIan Rogers        "Unit": "QPI"
170062201368SIan Rogers    },
170162201368SIan Rogers    {
170262201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for VN0",
170362201368SIan Rogers        "EventCode": "0x28",
170462201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN0",
170562201368SIan Rogers        "PerPkg": "1",
170662201368SIan Rogers        "PublicDescription": "Number of link layer credits into the R3 (for transactions across the BGF) acquired each cycle.  Flow Control FIFO for NDR messages on AD.",
170762201368SIan Rogers        "UMask": "0x1",
1708*14b4c544SIan Rogers        "Unit": "QPI"
170962201368SIan Rogers    },
171062201368SIan Rogers    {
171162201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for VN1",
171262201368SIan Rogers        "EventCode": "0x28",
171362201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_ACQUIRED.VN1",
171462201368SIan Rogers        "PerPkg": "1",
171562201368SIan Rogers        "PublicDescription": "Number of link layer credits into the R3 (for transactions across the BGF) acquired each cycle.  Flow Control FIFO for NDR messages on AD.",
171662201368SIan Rogers        "UMask": "0x2",
1717*14b4c544SIan Rogers        "Unit": "QPI"
171862201368SIan Rogers    },
171962201368SIan Rogers    {
172062201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for VN0",
172162201368SIan Rogers        "EventCode": "0x24",
172262201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN0",
172362201368SIan Rogers        "PerPkg": "1",
172462201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of link layer credits into the R3 (for transactions across the BGF) available in each cycle. Flow Control FIFO  for NDR messages on AD.",
172562201368SIan Rogers        "UMask": "0x1",
1726*14b4c544SIan Rogers        "Unit": "QPI"
172762201368SIan Rogers    },
172862201368SIan Rogers    {
172962201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD NDR; for VN1",
173062201368SIan Rogers        "EventCode": "0x24",
173162201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_NDR_CREDIT_OCCUPANCY.VN1",
173262201368SIan Rogers        "PerPkg": "1",
173362201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of link layer credits into the R3 (for transactions across the BGF) available in each cycle. Flow Control FIFO  for NDR messages on AD.",
173462201368SIan Rogers        "UMask": "0x2",
1735*14b4c544SIan Rogers        "Unit": "QPI"
173662201368SIan Rogers    },
173762201368SIan Rogers    {
173862201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN0",
173962201368SIan Rogers        "EventCode": "0x27",
174062201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN0",
174162201368SIan Rogers        "PerPkg": "1",
174262201368SIan Rogers        "PublicDescription": "Number of link layer credits into the R3 (for transactions across the BGF) acquired each cycle.  Flow Control FIFO for Snoop messages on AD.",
174362201368SIan Rogers        "UMask": "0x1",
1744*14b4c544SIan Rogers        "Unit": "QPI"
174562201368SIan Rogers    },
174662201368SIan Rogers    {
174762201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - SNP; for VN1",
174862201368SIan Rogers        "EventCode": "0x27",
174962201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_ACQUIRED.VN1",
175062201368SIan Rogers        "PerPkg": "1",
175162201368SIan Rogers        "PublicDescription": "Number of link layer credits into the R3 (for transactions across the BGF) acquired each cycle.  Flow Control FIFO for Snoop messages on AD.",
175262201368SIan Rogers        "UMask": "0x2",
1753*14b4c544SIan Rogers        "Unit": "QPI"
175462201368SIan Rogers    },
175562201368SIan Rogers    {
175662201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for VN0",
175762201368SIan Rogers        "EventCode": "0x23",
175862201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN0",
175962201368SIan Rogers        "PerPkg": "1",
1760d2aaf040SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of link layer credits into the R3 (for transactions across the BGF) available in each cycle.  Flow Control FIFO for Snoop messages on AD.",
176162201368SIan Rogers        "UMask": "0x1",
1762*14b4c544SIan Rogers        "Unit": "QPI"
176362201368SIan Rogers    },
176462201368SIan Rogers    {
176562201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AD SNP; for VN1",
176662201368SIan Rogers        "EventCode": "0x23",
176762201368SIan Rogers        "EventName": "UNC_Q_TxR_AD_SNP_CREDIT_OCCUPANCY.VN1",
176862201368SIan Rogers        "PerPkg": "1",
1769d2aaf040SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of link layer credits into the R3 (for transactions across the BGF) available in each cycle.  Flow Control FIFO for Snoop messages on AD.",
177062201368SIan Rogers        "UMask": "0x2",
1771*14b4c544SIan Rogers        "Unit": "QPI"
177262201368SIan Rogers    },
177362201368SIan Rogers    {
177462201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR",
177562201368SIan Rogers        "EventCode": "0x29",
177662201368SIan Rogers        "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED",
177762201368SIan Rogers        "PerPkg": "1",
177862201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. Local NDR message class to AK Egress.",
1779*14b4c544SIan Rogers        "Unit": "QPI"
178062201368SIan Rogers    },
178162201368SIan Rogers    {
178262201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for VN0",
178362201368SIan Rogers        "EventCode": "0x29",
178462201368SIan Rogers        "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED.VN0",
178562201368SIan Rogers        "PerPkg": "1",
178662201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. Local NDR message class to AK Egress.",
178762201368SIan Rogers        "UMask": "0x1",
1788*14b4c544SIan Rogers        "Unit": "QPI"
178962201368SIan Rogers    },
179062201368SIan Rogers    {
179162201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for VN1",
179262201368SIan Rogers        "EventCode": "0x29",
179362201368SIan Rogers        "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_ACQUIRED.VN1",
179462201368SIan Rogers        "PerPkg": "1",
179562201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. Local NDR message class to AK Egress.",
179662201368SIan Rogers        "UMask": "0x2",
1797*14b4c544SIan Rogers        "Unit": "QPI"
179862201368SIan Rogers    },
179962201368SIan Rogers    {
180062201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR",
180162201368SIan Rogers        "EventCode": "0x25",
180262201368SIan Rogers        "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY",
180362201368SIan Rogers        "PerPkg": "1",
180462201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  Local NDR message class to AK Egress.",
1805*14b4c544SIan Rogers        "Unit": "QPI"
180662201368SIan Rogers    },
180762201368SIan Rogers    {
180862201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for VN0",
180962201368SIan Rogers        "EventCode": "0x25",
181062201368SIan Rogers        "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY.VN0",
181162201368SIan Rogers        "PerPkg": "1",
181262201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  Local NDR message class to AK Egress.",
181362201368SIan Rogers        "UMask": "0x1",
1814*14b4c544SIan Rogers        "Unit": "QPI"
181562201368SIan Rogers    },
181662201368SIan Rogers    {
181762201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - AK NDR: for VN1",
181862201368SIan Rogers        "EventCode": "0x25",
181962201368SIan Rogers        "EventName": "UNC_Q_TxR_AK_NDR_CREDIT_OCCUPANCY.VN1",
182062201368SIan Rogers        "PerPkg": "1",
182162201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  Local NDR message class to AK Egress.",
182262201368SIan Rogers        "UMask": "0x2",
1823*14b4c544SIan Rogers        "Unit": "QPI"
182462201368SIan Rogers    },
182562201368SIan Rogers    {
182662201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN0",
182762201368SIan Rogers        "EventCode": "0x2a",
182862201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN0",
182962201368SIan Rogers        "PerPkg": "1",
183062201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. DRS message class to BL Egress.",
183162201368SIan Rogers        "UMask": "0x1",
1832*14b4c544SIan Rogers        "Unit": "QPI"
183362201368SIan Rogers    },
183462201368SIan Rogers    {
183562201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for VN1",
183662201368SIan Rogers        "EventCode": "0x2a",
183762201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN1",
183862201368SIan Rogers        "PerPkg": "1",
183962201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. DRS message class to BL Egress.",
184062201368SIan Rogers        "UMask": "0x2",
1841*14b4c544SIan Rogers        "Unit": "QPI"
184262201368SIan Rogers    },
184362201368SIan Rogers    {
184462201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - DRS; for Shared VN",
184562201368SIan Rogers        "EventCode": "0x2a",
184662201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_ACQUIRED.VN_SHR",
184762201368SIan Rogers        "PerPkg": "1",
184862201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. DRS message class to BL Egress.",
184962201368SIan Rogers        "UMask": "0x4",
1850*14b4c544SIan Rogers        "Unit": "QPI"
185162201368SIan Rogers    },
185262201368SIan Rogers    {
185362201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for VN0",
185462201368SIan Rogers        "EventCode": "0x1f",
185562201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN0",
185662201368SIan Rogers        "PerPkg": "1",
185762201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  DRS message class to BL Egress.",
185862201368SIan Rogers        "UMask": "0x1",
1859*14b4c544SIan Rogers        "Unit": "QPI"
186062201368SIan Rogers    },
186162201368SIan Rogers    {
186262201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for VN1",
186362201368SIan Rogers        "EventCode": "0x1f",
186462201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN1",
186562201368SIan Rogers        "PerPkg": "1",
186662201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  DRS message class to BL Egress.",
186762201368SIan Rogers        "UMask": "0x2",
1868*14b4c544SIan Rogers        "Unit": "QPI"
186962201368SIan Rogers    },
187062201368SIan Rogers    {
187162201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - BL DRS; for Shared VN",
187262201368SIan Rogers        "EventCode": "0x1f",
187362201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_DRS_CREDIT_OCCUPANCY.VN_SHR",
187462201368SIan Rogers        "PerPkg": "1",
187562201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  DRS message class to BL Egress.",
187662201368SIan Rogers        "UMask": "0x4",
1877*14b4c544SIan Rogers        "Unit": "QPI"
187862201368SIan Rogers    },
187962201368SIan Rogers    {
188062201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN0",
188162201368SIan Rogers        "EventCode": "0x2b",
188262201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN0",
188362201368SIan Rogers        "PerPkg": "1",
188462201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. NCB message class to BL Egress.",
188562201368SIan Rogers        "UMask": "0x1",
1886*14b4c544SIan Rogers        "Unit": "QPI"
188762201368SIan Rogers    },
188862201368SIan Rogers    {
188962201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - NCB; for VN1",
189062201368SIan Rogers        "EventCode": "0x2b",
189162201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_ACQUIRED.VN1",
189262201368SIan Rogers        "PerPkg": "1",
189362201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. NCB message class to BL Egress.",
189462201368SIan Rogers        "UMask": "0x2",
1895*14b4c544SIan Rogers        "Unit": "QPI"
189662201368SIan Rogers    },
189762201368SIan Rogers    {
189862201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for VN0",
189962201368SIan Rogers        "EventCode": "0x20",
190062201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN0",
190162201368SIan Rogers        "PerPkg": "1",
190262201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  NCB message class to BL Egress.",
190362201368SIan Rogers        "UMask": "0x1",
1904*14b4c544SIan Rogers        "Unit": "QPI"
190562201368SIan Rogers    },
190662201368SIan Rogers    {
190762201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCB; for VN1",
190862201368SIan Rogers        "EventCode": "0x20",
190962201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCB_CREDIT_OCCUPANCY.VN1",
191062201368SIan Rogers        "PerPkg": "1",
191162201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  NCB message class to BL Egress.",
191262201368SIan Rogers        "UMask": "0x2",
1913*14b4c544SIan Rogers        "Unit": "QPI"
191462201368SIan Rogers    },
191562201368SIan Rogers    {
191662201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN0",
191762201368SIan Rogers        "EventCode": "0x2c",
191862201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN0",
191962201368SIan Rogers        "PerPkg": "1",
192062201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. NCS message class to BL Egress.",
192162201368SIan Rogers        "UMask": "0x1",
1922*14b4c544SIan Rogers        "Unit": "QPI"
192362201368SIan Rogers    },
192462201368SIan Rogers    {
192562201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - NCS; for VN1",
192662201368SIan Rogers        "EventCode": "0x2c",
192762201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_ACQUIRED.VN1",
192862201368SIan Rogers        "PerPkg": "1",
192962201368SIan Rogers        "PublicDescription": "Number of credits into the R3 (for transactions across the BGF) acquired each cycle. NCS message class to BL Egress.",
193062201368SIan Rogers        "UMask": "0x2",
1931*14b4c544SIan Rogers        "Unit": "QPI"
193262201368SIan Rogers    },
193362201368SIan Rogers    {
193462201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for VN0",
193562201368SIan Rogers        "EventCode": "0x21",
193662201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN0",
193762201368SIan Rogers        "PerPkg": "1",
193862201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  NCS message class to BL Egress.",
193962201368SIan Rogers        "UMask": "0x1",
1940*14b4c544SIan Rogers        "Unit": "QPI"
194162201368SIan Rogers    },
194262201368SIan Rogers    {
194362201368SIan Rogers        "BriefDescription": "R3QPI Egress Credit Occupancy - BL NCS; for VN1",
194462201368SIan Rogers        "EventCode": "0x21",
194562201368SIan Rogers        "EventName": "UNC_Q_TxR_BL_NCS_CREDIT_OCCUPANCY.VN1",
194662201368SIan Rogers        "PerPkg": "1",
194762201368SIan Rogers        "PublicDescription": "Occupancy event that tracks the number of credits into the R3 (for transactions across the BGF) available in each cycle.  NCS message class to BL Egress.",
194862201368SIan Rogers        "UMask": "0x2",
1949*14b4c544SIan Rogers        "Unit": "QPI"
195062201368SIan Rogers    },
195162201368SIan Rogers    {
195262201368SIan Rogers        "BriefDescription": "VNA Credits Returned",
195362201368SIan Rogers        "EventCode": "0x1c",
195462201368SIan Rogers        "EventName": "UNC_Q_VNA_CREDIT_RETURNS",
195562201368SIan Rogers        "PerPkg": "1",
195662201368SIan Rogers        "PublicDescription": "Number of VNA credits returned.",
1957*14b4c544SIan Rogers        "Unit": "QPI"
195862201368SIan Rogers    },
195962201368SIan Rogers    {
196062201368SIan Rogers        "BriefDescription": "VNA Credits Pending Return - Occupancy",
196162201368SIan Rogers        "EventCode": "0x1b",
196262201368SIan Rogers        "EventName": "UNC_Q_VNA_CREDIT_RETURN_OCCUPANCY",
196362201368SIan Rogers        "PerPkg": "1",
196462201368SIan Rogers        "PublicDescription": "Number of VNA credits in the Rx side that are waitng to be returned back across the link.",
1965*14b4c544SIan Rogers        "Unit": "QPI"
1966*14b4c544SIan Rogers    },
1967*14b4c544SIan Rogers    {
1968*14b4c544SIan Rogers        "BriefDescription": "Number of uclks in domain",
1969*14b4c544SIan Rogers        "EventCode": "0x1",
1970*14b4c544SIan Rogers        "EventName": "UNC_R3_CLOCKTICKS",
1971*14b4c544SIan Rogers        "PerPkg": "1",
1972*14b4c544SIan Rogers        "PublicDescription": "Counts the number of uclks in the QPI uclk domain.  This could be slightly different than the count in the Ubox because of enable/freeze delays.  However, because the QPI Agent is close to the Ubox, they generally should not diverge by more than a handful of cycles.",
1973*14b4c544SIan Rogers        "Unit": "R3QPI"
1974*14b4c544SIan Rogers    },
1975*14b4c544SIan Rogers    {
1976*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
1977*14b4c544SIan Rogers        "EventCode": "0x2c",
1978*14b4c544SIan Rogers        "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO10",
1979*14b4c544SIan Rogers        "PerPkg": "1",
1980*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers higher CBoxes); Cbox 10",
1981*14b4c544SIan Rogers        "UMask": "0x4",
1982*14b4c544SIan Rogers        "Unit": "R3QPI"
1983*14b4c544SIan Rogers    },
1984*14b4c544SIan Rogers    {
1985*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
1986*14b4c544SIan Rogers        "EventCode": "0x2c",
1987*14b4c544SIan Rogers        "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO11",
1988*14b4c544SIan Rogers        "PerPkg": "1",
1989*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers higher CBoxes); Cbox 11",
1990*14b4c544SIan Rogers        "UMask": "0x8",
1991*14b4c544SIan Rogers        "Unit": "R3QPI"
1992*14b4c544SIan Rogers    },
1993*14b4c544SIan Rogers    {
1994*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
1995*14b4c544SIan Rogers        "EventCode": "0x2c",
1996*14b4c544SIan Rogers        "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO12",
1997*14b4c544SIan Rogers        "PerPkg": "1",
1998*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers higher CBoxes); Cbox 12",
1999*14b4c544SIan Rogers        "UMask": "0x10",
2000*14b4c544SIan Rogers        "Unit": "R3QPI"
2001*14b4c544SIan Rogers    },
2002*14b4c544SIan Rogers    {
2003*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2004*14b4c544SIan Rogers        "EventCode": "0x2c",
2005*14b4c544SIan Rogers        "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO13",
2006*14b4c544SIan Rogers        "PerPkg": "1",
2007*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers higher CBoxes); Cbox 13",
2008*14b4c544SIan Rogers        "UMask": "0x20",
2009*14b4c544SIan Rogers        "Unit": "R3QPI"
2010*14b4c544SIan Rogers    },
2011*14b4c544SIan Rogers    {
2012*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2013*14b4c544SIan Rogers        "EventCode": "0x2c",
2014*14b4c544SIan Rogers        "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO14",
2015*14b4c544SIan Rogers        "PerPkg": "1",
2016*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers higher CBoxes); Cbox 14&16",
2017*14b4c544SIan Rogers        "UMask": "0x40",
2018*14b4c544SIan Rogers        "Unit": "R3QPI"
2019*14b4c544SIan Rogers    },
2020*14b4c544SIan Rogers    {
2021*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2022*14b4c544SIan Rogers        "EventCode": "0x2c",
2023*14b4c544SIan Rogers        "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO8",
2024*14b4c544SIan Rogers        "PerPkg": "1",
2025*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers higher CBoxes); Cbox 8",
2026*14b4c544SIan Rogers        "UMask": "0x1",
2027*14b4c544SIan Rogers        "Unit": "R3QPI"
2028*14b4c544SIan Rogers    },
2029*14b4c544SIan Rogers    {
2030*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2031*14b4c544SIan Rogers        "EventCode": "0x2c",
2032*14b4c544SIan Rogers        "EventName": "UNC_R3_C_HI_AD_CREDITS_EMPTY.CBO9",
2033*14b4c544SIan Rogers        "PerPkg": "1",
2034*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers higher CBoxes); Cbox 9",
2035*14b4c544SIan Rogers        "UMask": "0x2",
2036*14b4c544SIan Rogers        "Unit": "R3QPI"
2037*14b4c544SIan Rogers    },
2038*14b4c544SIan Rogers    {
2039*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2040*14b4c544SIan Rogers        "EventCode": "0x2b",
2041*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO0",
2042*14b4c544SIan Rogers        "PerPkg": "1",
2043*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 0",
2044*14b4c544SIan Rogers        "UMask": "0x1",
2045*14b4c544SIan Rogers        "Unit": "R3QPI"
2046*14b4c544SIan Rogers    },
2047*14b4c544SIan Rogers    {
2048*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2049*14b4c544SIan Rogers        "EventCode": "0x2b",
2050*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO1",
2051*14b4c544SIan Rogers        "PerPkg": "1",
2052*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 1",
2053*14b4c544SIan Rogers        "UMask": "0x2",
2054*14b4c544SIan Rogers        "Unit": "R3QPI"
2055*14b4c544SIan Rogers    },
2056*14b4c544SIan Rogers    {
2057*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2058*14b4c544SIan Rogers        "EventCode": "0x2b",
2059*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO2",
2060*14b4c544SIan Rogers        "PerPkg": "1",
2061*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 2",
2062*14b4c544SIan Rogers        "UMask": "0x4",
2063*14b4c544SIan Rogers        "Unit": "R3QPI"
2064*14b4c544SIan Rogers    },
2065*14b4c544SIan Rogers    {
2066*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2067*14b4c544SIan Rogers        "EventCode": "0x2b",
2068*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO3",
2069*14b4c544SIan Rogers        "PerPkg": "1",
2070*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 3",
2071*14b4c544SIan Rogers        "UMask": "0x8",
2072*14b4c544SIan Rogers        "Unit": "R3QPI"
2073*14b4c544SIan Rogers    },
2074*14b4c544SIan Rogers    {
2075*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2076*14b4c544SIan Rogers        "EventCode": "0x2b",
2077*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO4",
2078*14b4c544SIan Rogers        "PerPkg": "1",
2079*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 4",
2080*14b4c544SIan Rogers        "UMask": "0x10",
2081*14b4c544SIan Rogers        "Unit": "R3QPI"
2082*14b4c544SIan Rogers    },
2083*14b4c544SIan Rogers    {
2084*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2085*14b4c544SIan Rogers        "EventCode": "0x2b",
2086*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO5",
2087*14b4c544SIan Rogers        "PerPkg": "1",
2088*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 5",
2089*14b4c544SIan Rogers        "UMask": "0x20",
2090*14b4c544SIan Rogers        "Unit": "R3QPI"
2091*14b4c544SIan Rogers    },
2092*14b4c544SIan Rogers    {
2093*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2094*14b4c544SIan Rogers        "EventCode": "0x2b",
2095*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO6",
2096*14b4c544SIan Rogers        "PerPkg": "1",
2097*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 6",
2098*14b4c544SIan Rogers        "UMask": "0x40",
2099*14b4c544SIan Rogers        "Unit": "R3QPI"
2100*14b4c544SIan Rogers    },
2101*14b4c544SIan Rogers    {
2102*14b4c544SIan Rogers        "BriefDescription": "CBox AD Credits Empty",
2103*14b4c544SIan Rogers        "EventCode": "0x2b",
2104*14b4c544SIan Rogers        "EventName": "UNC_R3_C_LO_AD_CREDITS_EMPTY.CBO7",
2105*14b4c544SIan Rogers        "PerPkg": "1",
2106*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to Cbox on the AD Ring (covers lower CBoxes); Cbox 7",
2107*14b4c544SIan Rogers        "UMask": "0x80",
2108*14b4c544SIan Rogers        "Unit": "R3QPI"
2109*14b4c544SIan Rogers    },
2110*14b4c544SIan Rogers    {
2111*14b4c544SIan Rogers        "BriefDescription": "HA/R2 AD Credits Empty",
2112*14b4c544SIan Rogers        "EventCode": "0x2f",
2113*14b4c544SIan Rogers        "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA0",
2114*14b4c544SIan Rogers        "PerPkg": "1",
2115*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to either HA or R2 on the BL Ring; HA0",
2116*14b4c544SIan Rogers        "UMask": "0x1",
2117*14b4c544SIan Rogers        "Unit": "R3QPI"
2118*14b4c544SIan Rogers    },
2119*14b4c544SIan Rogers    {
2120*14b4c544SIan Rogers        "BriefDescription": "HA/R2 AD Credits Empty",
2121*14b4c544SIan Rogers        "EventCode": "0x2f",
2122*14b4c544SIan Rogers        "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.HA1",
2123*14b4c544SIan Rogers        "PerPkg": "1",
2124*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to either HA or R2 on the BL Ring; HA1",
2125*14b4c544SIan Rogers        "UMask": "0x2",
2126*14b4c544SIan Rogers        "Unit": "R3QPI"
2127*14b4c544SIan Rogers    },
2128*14b4c544SIan Rogers    {
2129*14b4c544SIan Rogers        "BriefDescription": "HA/R2 AD Credits Empty",
2130*14b4c544SIan Rogers        "EventCode": "0x2f",
2131*14b4c544SIan Rogers        "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCB",
2132*14b4c544SIan Rogers        "PerPkg": "1",
2133*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to either HA or R2 on the BL Ring; R2 NCB Messages",
2134*14b4c544SIan Rogers        "UMask": "0x4",
2135*14b4c544SIan Rogers        "Unit": "R3QPI"
2136*14b4c544SIan Rogers    },
2137*14b4c544SIan Rogers    {
2138*14b4c544SIan Rogers        "BriefDescription": "HA/R2 AD Credits Empty",
2139*14b4c544SIan Rogers        "EventCode": "0x2f",
2140*14b4c544SIan Rogers        "EventName": "UNC_R3_HA_R2_BL_CREDITS_EMPTY.R2_NCS",
2141*14b4c544SIan Rogers        "PerPkg": "1",
2142*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to either HA or R2 on the BL Ring; R2 NCS Messages",
2143*14b4c544SIan Rogers        "UMask": "0x8",
2144*14b4c544SIan Rogers        "Unit": "R3QPI"
2145*14b4c544SIan Rogers    },
2146*14b4c544SIan Rogers    {
2147*14b4c544SIan Rogers        "BriefDescription": "QPI0 AD Credits Empty",
2148*14b4c544SIan Rogers        "EventCode": "0x29",
2149*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_HOM",
2150*14b4c544SIan Rogers        "PerPkg": "1",
2151*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the AD Ring; VN0 HOM Messages",
2152*14b4c544SIan Rogers        "UMask": "0x2",
2153*14b4c544SIan Rogers        "Unit": "R3QPI"
2154*14b4c544SIan Rogers    },
2155*14b4c544SIan Rogers    {
2156*14b4c544SIan Rogers        "BriefDescription": "QPI0 AD Credits Empty",
2157*14b4c544SIan Rogers        "EventCode": "0x29",
2158*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_NDR",
2159*14b4c544SIan Rogers        "PerPkg": "1",
2160*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the AD Ring; VN0 NDR Messages",
2161*14b4c544SIan Rogers        "UMask": "0x8",
2162*14b4c544SIan Rogers        "Unit": "R3QPI"
2163*14b4c544SIan Rogers    },
2164*14b4c544SIan Rogers    {
2165*14b4c544SIan Rogers        "BriefDescription": "QPI0 AD Credits Empty",
2166*14b4c544SIan Rogers        "EventCode": "0x29",
2167*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN0_SNP",
2168*14b4c544SIan Rogers        "PerPkg": "1",
2169*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the AD Ring; VN0 SNP Messages",
2170*14b4c544SIan Rogers        "UMask": "0x4",
2171*14b4c544SIan Rogers        "Unit": "R3QPI"
2172*14b4c544SIan Rogers    },
2173*14b4c544SIan Rogers    {
2174*14b4c544SIan Rogers        "BriefDescription": "QPI0 AD Credits Empty",
2175*14b4c544SIan Rogers        "EventCode": "0x29",
2176*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_HOM",
2177*14b4c544SIan Rogers        "PerPkg": "1",
2178*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the AD Ring; VN1 HOM Messages",
2179*14b4c544SIan Rogers        "UMask": "0x10",
2180*14b4c544SIan Rogers        "Unit": "R3QPI"
2181*14b4c544SIan Rogers    },
2182*14b4c544SIan Rogers    {
2183*14b4c544SIan Rogers        "BriefDescription": "QPI0 AD Credits Empty",
2184*14b4c544SIan Rogers        "EventCode": "0x29",
2185*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_NDR",
2186*14b4c544SIan Rogers        "PerPkg": "1",
2187*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the AD Ring; VN1 NDR Messages",
2188*14b4c544SIan Rogers        "UMask": "0x40",
2189*14b4c544SIan Rogers        "Unit": "R3QPI"
2190*14b4c544SIan Rogers    },
2191*14b4c544SIan Rogers    {
2192*14b4c544SIan Rogers        "BriefDescription": "QPI0 AD Credits Empty",
2193*14b4c544SIan Rogers        "EventCode": "0x29",
2194*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VN1_SNP",
2195*14b4c544SIan Rogers        "PerPkg": "1",
2196*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the AD Ring; VN1 SNP Messages",
2197*14b4c544SIan Rogers        "UMask": "0x20",
2198*14b4c544SIan Rogers        "Unit": "R3QPI"
2199*14b4c544SIan Rogers    },
2200*14b4c544SIan Rogers    {
2201*14b4c544SIan Rogers        "BriefDescription": "QPI0 AD Credits Empty",
2202*14b4c544SIan Rogers        "EventCode": "0x29",
2203*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_AD_CREDITS_EMPTY.VNA",
2204*14b4c544SIan Rogers        "PerPkg": "1",
2205*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the AD Ring; VNA",
2206*14b4c544SIan Rogers        "UMask": "0x1",
2207*14b4c544SIan Rogers        "Unit": "R3QPI"
2208*14b4c544SIan Rogers    },
2209*14b4c544SIan Rogers    {
2210*14b4c544SIan Rogers        "BriefDescription": "QPI0 BL Credits Empty",
2211*14b4c544SIan Rogers        "EventCode": "0x2d",
2212*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_HOM",
2213*14b4c544SIan Rogers        "PerPkg": "1",
2214*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the BL Ring; VN0 HOM Messages",
2215*14b4c544SIan Rogers        "UMask": "0x2",
2216*14b4c544SIan Rogers        "Unit": "R3QPI"
2217*14b4c544SIan Rogers    },
2218*14b4c544SIan Rogers    {
2219*14b4c544SIan Rogers        "BriefDescription": "QPI0 BL Credits Empty",
2220*14b4c544SIan Rogers        "EventCode": "0x2d",
2221*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_NDR",
2222*14b4c544SIan Rogers        "PerPkg": "1",
2223*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the BL Ring; VN0 NDR Messages",
2224*14b4c544SIan Rogers        "UMask": "0x8",
2225*14b4c544SIan Rogers        "Unit": "R3QPI"
2226*14b4c544SIan Rogers    },
2227*14b4c544SIan Rogers    {
2228*14b4c544SIan Rogers        "BriefDescription": "QPI0 BL Credits Empty",
2229*14b4c544SIan Rogers        "EventCode": "0x2d",
2230*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN0_SNP",
2231*14b4c544SIan Rogers        "PerPkg": "1",
2232*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the BL Ring; VN0 SNP Messages",
2233*14b4c544SIan Rogers        "UMask": "0x4",
2234*14b4c544SIan Rogers        "Unit": "R3QPI"
2235*14b4c544SIan Rogers    },
2236*14b4c544SIan Rogers    {
2237*14b4c544SIan Rogers        "BriefDescription": "QPI0 BL Credits Empty",
2238*14b4c544SIan Rogers        "EventCode": "0x2d",
2239*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_HOM",
2240*14b4c544SIan Rogers        "PerPkg": "1",
2241*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the BL Ring; VN1 HOM Messages",
2242*14b4c544SIan Rogers        "UMask": "0x10",
2243*14b4c544SIan Rogers        "Unit": "R3QPI"
2244*14b4c544SIan Rogers    },
2245*14b4c544SIan Rogers    {
2246*14b4c544SIan Rogers        "BriefDescription": "QPI0 BL Credits Empty",
2247*14b4c544SIan Rogers        "EventCode": "0x2d",
2248*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_NDR",
2249*14b4c544SIan Rogers        "PerPkg": "1",
2250*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the BL Ring; VN1 NDR Messages",
2251*14b4c544SIan Rogers        "UMask": "0x40",
2252*14b4c544SIan Rogers        "Unit": "R3QPI"
2253*14b4c544SIan Rogers    },
2254*14b4c544SIan Rogers    {
2255*14b4c544SIan Rogers        "BriefDescription": "QPI0 BL Credits Empty",
2256*14b4c544SIan Rogers        "EventCode": "0x2d",
2257*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VN1_SNP",
2258*14b4c544SIan Rogers        "PerPkg": "1",
2259*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the BL Ring; VN1 SNP Messages",
2260*14b4c544SIan Rogers        "UMask": "0x20",
2261*14b4c544SIan Rogers        "Unit": "R3QPI"
2262*14b4c544SIan Rogers    },
2263*14b4c544SIan Rogers    {
2264*14b4c544SIan Rogers        "BriefDescription": "QPI0 BL Credits Empty",
2265*14b4c544SIan Rogers        "EventCode": "0x2d",
2266*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI0_BL_CREDITS_EMPTY.VNA",
2267*14b4c544SIan Rogers        "PerPkg": "1",
2268*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI0 on the BL Ring; VNA",
2269*14b4c544SIan Rogers        "UMask": "0x1",
2270*14b4c544SIan Rogers        "Unit": "R3QPI"
2271*14b4c544SIan Rogers    },
2272*14b4c544SIan Rogers    {
2273*14b4c544SIan Rogers        "BriefDescription": "QPI1 AD Credits Empty",
2274*14b4c544SIan Rogers        "EventCode": "0x2a",
2275*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_HOM",
2276*14b4c544SIan Rogers        "PerPkg": "1",
2277*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the AD Ring; VN0 HOM Messages",
2278*14b4c544SIan Rogers        "UMask": "0x2",
2279*14b4c544SIan Rogers        "Unit": "R3QPI"
2280*14b4c544SIan Rogers    },
2281*14b4c544SIan Rogers    {
2282*14b4c544SIan Rogers        "BriefDescription": "QPI1 AD Credits Empty",
2283*14b4c544SIan Rogers        "EventCode": "0x2a",
2284*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_NDR",
2285*14b4c544SIan Rogers        "PerPkg": "1",
2286*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the AD Ring; VN0 NDR Messages",
2287*14b4c544SIan Rogers        "UMask": "0x8",
2288*14b4c544SIan Rogers        "Unit": "R3QPI"
2289*14b4c544SIan Rogers    },
2290*14b4c544SIan Rogers    {
2291*14b4c544SIan Rogers        "BriefDescription": "QPI1 AD Credits Empty",
2292*14b4c544SIan Rogers        "EventCode": "0x2a",
2293*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN0_SNP",
2294*14b4c544SIan Rogers        "PerPkg": "1",
2295*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the AD Ring; VN0 SNP Messages",
2296*14b4c544SIan Rogers        "UMask": "0x4",
2297*14b4c544SIan Rogers        "Unit": "R3QPI"
2298*14b4c544SIan Rogers    },
2299*14b4c544SIan Rogers    {
2300*14b4c544SIan Rogers        "BriefDescription": "QPI1 AD Credits Empty",
2301*14b4c544SIan Rogers        "EventCode": "0x2a",
2302*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_HOM",
2303*14b4c544SIan Rogers        "PerPkg": "1",
2304*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the AD Ring; VN1 HOM Messages",
2305*14b4c544SIan Rogers        "UMask": "0x10",
2306*14b4c544SIan Rogers        "Unit": "R3QPI"
2307*14b4c544SIan Rogers    },
2308*14b4c544SIan Rogers    {
2309*14b4c544SIan Rogers        "BriefDescription": "QPI1 AD Credits Empty",
2310*14b4c544SIan Rogers        "EventCode": "0x2a",
2311*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_NDR",
2312*14b4c544SIan Rogers        "PerPkg": "1",
2313*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the AD Ring; VN1 NDR Messages",
2314*14b4c544SIan Rogers        "UMask": "0x40",
2315*14b4c544SIan Rogers        "Unit": "R3QPI"
2316*14b4c544SIan Rogers    },
2317*14b4c544SIan Rogers    {
2318*14b4c544SIan Rogers        "BriefDescription": "QPI1 AD Credits Empty",
2319*14b4c544SIan Rogers        "EventCode": "0x2a",
2320*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VN1_SNP",
2321*14b4c544SIan Rogers        "PerPkg": "1",
2322*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the AD Ring; VN1 SNP Messages",
2323*14b4c544SIan Rogers        "UMask": "0x20",
2324*14b4c544SIan Rogers        "Unit": "R3QPI"
2325*14b4c544SIan Rogers    },
2326*14b4c544SIan Rogers    {
2327*14b4c544SIan Rogers        "BriefDescription": "QPI1 AD Credits Empty",
2328*14b4c544SIan Rogers        "EventCode": "0x2a",
2329*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_AD_CREDITS_EMPTY.VNA",
2330*14b4c544SIan Rogers        "PerPkg": "1",
2331*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the AD Ring; VNA",
2332*14b4c544SIan Rogers        "UMask": "0x1",
2333*14b4c544SIan Rogers        "Unit": "R3QPI"
2334*14b4c544SIan Rogers    },
2335*14b4c544SIan Rogers    {
2336*14b4c544SIan Rogers        "BriefDescription": "QPI1 BL Credits Empty",
2337*14b4c544SIan Rogers        "EventCode": "0x2e",
2338*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_HOM",
2339*14b4c544SIan Rogers        "PerPkg": "1",
2340*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the BL Ring; VN0 HOM Messages",
2341*14b4c544SIan Rogers        "UMask": "0x2",
2342*14b4c544SIan Rogers        "Unit": "R3QPI"
2343*14b4c544SIan Rogers    },
2344*14b4c544SIan Rogers    {
2345*14b4c544SIan Rogers        "BriefDescription": "QPI1 BL Credits Empty",
2346*14b4c544SIan Rogers        "EventCode": "0x2e",
2347*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_NDR",
2348*14b4c544SIan Rogers        "PerPkg": "1",
2349*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the BL Ring; VN0 NDR Messages",
2350*14b4c544SIan Rogers        "UMask": "0x8",
2351*14b4c544SIan Rogers        "Unit": "R3QPI"
2352*14b4c544SIan Rogers    },
2353*14b4c544SIan Rogers    {
2354*14b4c544SIan Rogers        "BriefDescription": "QPI1 BL Credits Empty",
2355*14b4c544SIan Rogers        "EventCode": "0x2e",
2356*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN0_SNP",
2357*14b4c544SIan Rogers        "PerPkg": "1",
2358*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the BL Ring; VN0 SNP Messages",
2359*14b4c544SIan Rogers        "UMask": "0x4",
2360*14b4c544SIan Rogers        "Unit": "R3QPI"
2361*14b4c544SIan Rogers    },
2362*14b4c544SIan Rogers    {
2363*14b4c544SIan Rogers        "BriefDescription": "QPI1 BL Credits Empty",
2364*14b4c544SIan Rogers        "EventCode": "0x2e",
2365*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_HOM",
2366*14b4c544SIan Rogers        "PerPkg": "1",
2367*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the BL Ring; VN1 HOM Messages",
2368*14b4c544SIan Rogers        "UMask": "0x10",
2369*14b4c544SIan Rogers        "Unit": "R3QPI"
2370*14b4c544SIan Rogers    },
2371*14b4c544SIan Rogers    {
2372*14b4c544SIan Rogers        "BriefDescription": "QPI1 BL Credits Empty",
2373*14b4c544SIan Rogers        "EventCode": "0x2e",
2374*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_NDR",
2375*14b4c544SIan Rogers        "PerPkg": "1",
2376*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the BL Ring; VN1 NDR Messages",
2377*14b4c544SIan Rogers        "UMask": "0x40",
2378*14b4c544SIan Rogers        "Unit": "R3QPI"
2379*14b4c544SIan Rogers    },
2380*14b4c544SIan Rogers    {
2381*14b4c544SIan Rogers        "BriefDescription": "QPI1 BL Credits Empty",
2382*14b4c544SIan Rogers        "EventCode": "0x2e",
2383*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VN1_SNP",
2384*14b4c544SIan Rogers        "PerPkg": "1",
2385*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the BL Ring; VN1 SNP Messages",
2386*14b4c544SIan Rogers        "UMask": "0x20",
2387*14b4c544SIan Rogers        "Unit": "R3QPI"
2388*14b4c544SIan Rogers    },
2389*14b4c544SIan Rogers    {
2390*14b4c544SIan Rogers        "BriefDescription": "QPI1 BL Credits Empty",
2391*14b4c544SIan Rogers        "EventCode": "0x2e",
2392*14b4c544SIan Rogers        "EventName": "UNC_R3_QPI1_BL_CREDITS_EMPTY.VNA",
2393*14b4c544SIan Rogers        "PerPkg": "1",
2394*14b4c544SIan Rogers        "PublicDescription": "No credits available to send to QPI1 on the BL Ring; VNA",
2395*14b4c544SIan Rogers        "UMask": "0x1",
2396*14b4c544SIan Rogers        "Unit": "R3QPI"
2397*14b4c544SIan Rogers    },
2398*14b4c544SIan Rogers    {
2399*14b4c544SIan Rogers        "BriefDescription": "R3 AD Ring in Use; Counterclockwise",
2400*14b4c544SIan Rogers        "EventCode": "0x7",
2401*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AD_USED.CCW",
2402*14b4c544SIan Rogers        "PerPkg": "1",
2403*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AD ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.",
2404*14b4c544SIan Rogers        "UMask": "0xcc",
2405*14b4c544SIan Rogers        "Unit": "R3QPI"
2406*14b4c544SIan Rogers    },
2407*14b4c544SIan Rogers    {
2408*14b4c544SIan Rogers        "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Even on VRing 0",
2409*14b4c544SIan Rogers        "EventCode": "0x7",
2410*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AD_USED.CCW_VR0_EVEN",
2411*14b4c544SIan Rogers        "PerPkg": "1",
2412*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AD ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Counterclockwise and Even ring polarity on Virtual Ring 0.",
2413*14b4c544SIan Rogers        "UMask": "0x4",
2414*14b4c544SIan Rogers        "Unit": "R3QPI"
2415*14b4c544SIan Rogers    },
2416*14b4c544SIan Rogers    {
2417*14b4c544SIan Rogers        "BriefDescription": "R3 AD Ring in Use; Counterclockwise and Odd on VRing 0",
2418*14b4c544SIan Rogers        "EventCode": "0x7",
2419*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AD_USED.CCW_VR0_ODD",
2420*14b4c544SIan Rogers        "PerPkg": "1",
2421*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AD ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Counterclockwise and Odd ring polarity on Virtual Ring 0.",
2422*14b4c544SIan Rogers        "UMask": "0x8",
2423*14b4c544SIan Rogers        "Unit": "R3QPI"
2424*14b4c544SIan Rogers    },
2425*14b4c544SIan Rogers    {
2426*14b4c544SIan Rogers        "BriefDescription": "R3 AD Ring in Use; Clockwise",
2427*14b4c544SIan Rogers        "EventCode": "0x7",
2428*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AD_USED.CW",
2429*14b4c544SIan Rogers        "PerPkg": "1",
2430*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AD ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.",
2431*14b4c544SIan Rogers        "UMask": "0x33",
2432*14b4c544SIan Rogers        "Unit": "R3QPI"
2433*14b4c544SIan Rogers    },
2434*14b4c544SIan Rogers    {
2435*14b4c544SIan Rogers        "BriefDescription": "R3 AD Ring in Use; Clockwise and Even on VRing 0",
2436*14b4c544SIan Rogers        "EventCode": "0x7",
2437*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AD_USED.CW_VR0_EVEN",
2438*14b4c544SIan Rogers        "PerPkg": "1",
2439*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AD ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Clockwise and Even ring polarity on Virtual Ring 0.",
2440*14b4c544SIan Rogers        "UMask": "0x1",
2441*14b4c544SIan Rogers        "Unit": "R3QPI"
2442*14b4c544SIan Rogers    },
2443*14b4c544SIan Rogers    {
2444*14b4c544SIan Rogers        "BriefDescription": "R3 AD Ring in Use; Clockwise and Odd on VRing 0",
2445*14b4c544SIan Rogers        "EventCode": "0x7",
2446*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AD_USED.CW_VR0_ODD",
2447*14b4c544SIan Rogers        "PerPkg": "1",
2448*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AD ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Clockwise and Odd ring polarity on Virtual Ring 0.",
2449*14b4c544SIan Rogers        "UMask": "0x2",
2450*14b4c544SIan Rogers        "Unit": "R3QPI"
2451*14b4c544SIan Rogers    },
2452*14b4c544SIan Rogers    {
2453*14b4c544SIan Rogers        "BriefDescription": "R3 AK Ring in Use; Counterclockwise",
2454*14b4c544SIan Rogers        "EventCode": "0x8",
2455*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AK_USED.CCW",
2456*14b4c544SIan Rogers        "PerPkg": "1",
2457*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AK ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.",
2458*14b4c544SIan Rogers        "UMask": "0xcc",
2459*14b4c544SIan Rogers        "Unit": "R3QPI"
2460*14b4c544SIan Rogers    },
2461*14b4c544SIan Rogers    {
2462*14b4c544SIan Rogers        "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Even on VRing 0",
2463*14b4c544SIan Rogers        "EventCode": "0x8",
2464*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AK_USED.CCW_VR0_EVEN",
2465*14b4c544SIan Rogers        "PerPkg": "1",
2466*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AK ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Counterclockwise and Even ring polarity on Virtual Ring 0.",
2467*14b4c544SIan Rogers        "UMask": "0x4",
2468*14b4c544SIan Rogers        "Unit": "R3QPI"
2469*14b4c544SIan Rogers    },
2470*14b4c544SIan Rogers    {
2471*14b4c544SIan Rogers        "BriefDescription": "R3 AK Ring in Use; Counterclockwise and Odd on VRing 0",
2472*14b4c544SIan Rogers        "EventCode": "0x8",
2473*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AK_USED.CCW_VR0_ODD",
2474*14b4c544SIan Rogers        "PerPkg": "1",
2475*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AK ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Counterclockwise and Odd ring polarity on Virtual Ring 0.",
2476*14b4c544SIan Rogers        "UMask": "0x8",
2477*14b4c544SIan Rogers        "Unit": "R3QPI"
2478*14b4c544SIan Rogers    },
2479*14b4c544SIan Rogers    {
2480*14b4c544SIan Rogers        "BriefDescription": "R3 AK Ring in Use; Clockwise",
2481*14b4c544SIan Rogers        "EventCode": "0x8",
2482*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AK_USED.CW",
2483*14b4c544SIan Rogers        "PerPkg": "1",
2484*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AK ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.",
2485*14b4c544SIan Rogers        "UMask": "0x33",
2486*14b4c544SIan Rogers        "Unit": "R3QPI"
2487*14b4c544SIan Rogers    },
2488*14b4c544SIan Rogers    {
2489*14b4c544SIan Rogers        "BriefDescription": "R3 AK Ring in Use; Clockwise and Even on VRing 0",
2490*14b4c544SIan Rogers        "EventCode": "0x8",
2491*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AK_USED.CW_VR0_EVEN",
2492*14b4c544SIan Rogers        "PerPkg": "1",
2493*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AK ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Clockwise and Even ring polarity on Virtual Ring 0.",
2494*14b4c544SIan Rogers        "UMask": "0x1",
2495*14b4c544SIan Rogers        "Unit": "R3QPI"
2496*14b4c544SIan Rogers    },
2497*14b4c544SIan Rogers    {
2498*14b4c544SIan Rogers        "BriefDescription": "R3 AK Ring in Use; Clockwise and Odd on VRing 0",
2499*14b4c544SIan Rogers        "EventCode": "0x8",
2500*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_AK_USED.CW_VR0_ODD",
2501*14b4c544SIan Rogers        "PerPkg": "1",
2502*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the AK ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Clockwise and Odd ring polarity on Virtual Ring 0.",
2503*14b4c544SIan Rogers        "UMask": "0x2",
2504*14b4c544SIan Rogers        "Unit": "R3QPI"
2505*14b4c544SIan Rogers    },
2506*14b4c544SIan Rogers    {
2507*14b4c544SIan Rogers        "BriefDescription": "R3 BL Ring in Use; Counterclockwise",
2508*14b4c544SIan Rogers        "EventCode": "0x9",
2509*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_BL_USED.CCW",
2510*14b4c544SIan Rogers        "PerPkg": "1",
2511*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the BL ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.",
2512*14b4c544SIan Rogers        "UMask": "0xcc",
2513*14b4c544SIan Rogers        "Unit": "R3QPI"
2514*14b4c544SIan Rogers    },
2515*14b4c544SIan Rogers    {
2516*14b4c544SIan Rogers        "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Even on VRing 0",
2517*14b4c544SIan Rogers        "EventCode": "0x9",
2518*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_BL_USED.CCW_VR0_EVEN",
2519*14b4c544SIan Rogers        "PerPkg": "1",
2520*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the BL ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Counterclockwise and Even ring polarity on Virtual Ring 0.",
2521*14b4c544SIan Rogers        "UMask": "0x4",
2522*14b4c544SIan Rogers        "Unit": "R3QPI"
2523*14b4c544SIan Rogers    },
2524*14b4c544SIan Rogers    {
2525*14b4c544SIan Rogers        "BriefDescription": "R3 BL Ring in Use; Counterclockwise and Odd on VRing 0",
2526*14b4c544SIan Rogers        "EventCode": "0x9",
2527*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_BL_USED.CCW_VR0_ODD",
2528*14b4c544SIan Rogers        "PerPkg": "1",
2529*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the BL ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Counterclockwise and Odd ring polarity on Virtual Ring 0.",
2530*14b4c544SIan Rogers        "UMask": "0x8",
2531*14b4c544SIan Rogers        "Unit": "R3QPI"
2532*14b4c544SIan Rogers    },
2533*14b4c544SIan Rogers    {
2534*14b4c544SIan Rogers        "BriefDescription": "R3 BL Ring in Use; Clockwise",
2535*14b4c544SIan Rogers        "EventCode": "0x9",
2536*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_BL_USED.CW",
2537*14b4c544SIan Rogers        "PerPkg": "1",
2538*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the BL ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.",
2539*14b4c544SIan Rogers        "UMask": "0x33",
2540*14b4c544SIan Rogers        "Unit": "R3QPI"
2541*14b4c544SIan Rogers    },
2542*14b4c544SIan Rogers    {
2543*14b4c544SIan Rogers        "BriefDescription": "R3 BL Ring in Use; Clockwise and Even on VRing 0",
2544*14b4c544SIan Rogers        "EventCode": "0x9",
2545*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_BL_USED.CW_VR0_EVEN",
2546*14b4c544SIan Rogers        "PerPkg": "1",
2547*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the BL ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Clockwise and Even ring polarity on Virtual Ring 0.",
2548*14b4c544SIan Rogers        "UMask": "0x1",
2549*14b4c544SIan Rogers        "Unit": "R3QPI"
2550*14b4c544SIan Rogers    },
2551*14b4c544SIan Rogers    {
2552*14b4c544SIan Rogers        "BriefDescription": "R3 BL Ring in Use; Clockwise and Odd on VRing 0",
2553*14b4c544SIan Rogers        "EventCode": "0x9",
2554*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_BL_USED.CW_VR0_ODD",
2555*14b4c544SIan Rogers        "PerPkg": "1",
2556*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the BL ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sunk, but does not include when packets are being sent from the ring stop.; Filters for the Clockwise and Odd ring polarity on Virtual Ring 0.",
2557*14b4c544SIan Rogers        "UMask": "0x2",
2558*14b4c544SIan Rogers        "Unit": "R3QPI"
2559*14b4c544SIan Rogers    },
2560*14b4c544SIan Rogers    {
2561*14b4c544SIan Rogers        "BriefDescription": "R2 IV Ring in Use; Any",
2562*14b4c544SIan Rogers        "EventCode": "0xA",
2563*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_IV_USED.ANY",
2564*14b4c544SIan Rogers        "PerPkg": "1",
2565*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the IV ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sent, but does not include when packets are being sunk into the ring stop.  The IV ring is unidirectional.  Whether UP or DN is used is dependent on the system programming.  Thereofore, one should generally set both the UP and DN bits for a given polarity (or both) at a given time.; Filters any polarity",
2566*14b4c544SIan Rogers        "UMask": "0xff",
2567*14b4c544SIan Rogers        "Unit": "R3QPI"
2568*14b4c544SIan Rogers    },
2569*14b4c544SIan Rogers    {
2570*14b4c544SIan Rogers        "BriefDescription": "R2 IV Ring in Use; Counterclockwise",
2571*14b4c544SIan Rogers        "EventCode": "0xa",
2572*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_IV_USED.CCW",
2573*14b4c544SIan Rogers        "PerPkg": "1",
2574*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the IV ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sent, but does not include when packets are being sunk into the ring stop.  The IV ring is unidirectional.  Whether UP or DN is used is dependent on the system programming.  Thereofore, one should generally set both the UP and DN bits for a given polarity (or both) at a given time.; Filters for Counterclockwise polarity",
2575*14b4c544SIan Rogers        "UMask": "0xcc",
2576*14b4c544SIan Rogers        "Unit": "R3QPI"
2577*14b4c544SIan Rogers    },
2578*14b4c544SIan Rogers    {
2579*14b4c544SIan Rogers        "BriefDescription": "R2 IV Ring in Use; Clockwise",
2580*14b4c544SIan Rogers        "EventCode": "0xa",
2581*14b4c544SIan Rogers        "EventName": "UNC_R3_RING_IV_USED.CW",
2582*14b4c544SIan Rogers        "PerPkg": "1",
2583*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles that the IV ring is being used at this ring stop.  This includes when packets are passing by and when packets are being sent, but does not include when packets are being sunk into the ring stop.  The IV ring is unidirectional.  Whether UP or DN is used is dependent on the system programming.  Thereofore, one should generally set both the UP and DN bits for a given polarity (or both) at a given time.; Filters for Clockwise polarity",
2584*14b4c544SIan Rogers        "UMask": "0x33",
2585*14b4c544SIan Rogers        "Unit": "R3QPI"
2586*14b4c544SIan Rogers    },
2587*14b4c544SIan Rogers    {
2588*14b4c544SIan Rogers        "BriefDescription": "AD Ingress Bypassed",
2589*14b4c544SIan Rogers        "EventCode": "0x12",
2590*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_AD_BYPASSED",
2591*14b4c544SIan Rogers        "PerPkg": "1",
2592*14b4c544SIan Rogers        "PublicDescription": "Counts the number of times when the AD Ingress was bypassed and an incoming transaction was bypassed directly across the BGF and into the qfclk domain.",
2593*14b4c544SIan Rogers        "Unit": "R3QPI"
2594*14b4c544SIan Rogers    },
2595*14b4c544SIan Rogers    {
2596*14b4c544SIan Rogers        "BriefDescription": "Ingress Bypassed",
2597*14b4c544SIan Rogers        "EventCode": "0x12",
2598*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_BYPASSED.AD",
2599*14b4c544SIan Rogers        "PerPkg": "1",
2600*14b4c544SIan Rogers        "PublicDescription": "Counts the number of times when the Ingress was bypassed and an incoming transaction was bypassed directly across the BGF and into the qfclk domain.",
2601*14b4c544SIan Rogers        "UMask": "0x1",
2602*14b4c544SIan Rogers        "Unit": "R3QPI"
2603*14b4c544SIan Rogers    },
2604*14b4c544SIan Rogers    {
2605*14b4c544SIan Rogers        "BriefDescription": "Ingress Cycles Not Empty; HOM",
2606*14b4c544SIan Rogers        "EventCode": "0x10",
2607*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_CYCLES_NE.HOM",
2608*14b4c544SIan Rogers        "PerPkg": "1",
2609*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when the QPI Ingress is not empty.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue occupancy.  Multiple ingress buffers can be tracked at a given time using multiple counters.; HOM Ingress Queue",
2610*14b4c544SIan Rogers        "UMask": "0x1",
2611*14b4c544SIan Rogers        "Unit": "R3QPI"
2612*14b4c544SIan Rogers    },
2613*14b4c544SIan Rogers    {
2614*14b4c544SIan Rogers        "BriefDescription": "Ingress Cycles Not Empty; NDR",
2615*14b4c544SIan Rogers        "EventCode": "0x10",
2616*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_CYCLES_NE.NDR",
2617*14b4c544SIan Rogers        "PerPkg": "1",
2618*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when the QPI Ingress is not empty.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue occupancy.  Multiple ingress buffers can be tracked at a given time using multiple counters.; NDR Ingress Queue",
2619*14b4c544SIan Rogers        "UMask": "0x4",
2620*14b4c544SIan Rogers        "Unit": "R3QPI"
2621*14b4c544SIan Rogers    },
2622*14b4c544SIan Rogers    {
2623*14b4c544SIan Rogers        "BriefDescription": "Ingress Cycles Not Empty; SNP",
2624*14b4c544SIan Rogers        "EventCode": "0x10",
2625*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_CYCLES_NE.SNP",
2626*14b4c544SIan Rogers        "PerPkg": "1",
2627*14b4c544SIan Rogers        "PublicDescription": "Counts the number of cycles when the QPI Ingress is not empty.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue occupancy.  Multiple ingress buffers can be tracked at a given time using multiple counters.; SNP Ingress Queue",
2628*14b4c544SIan Rogers        "UMask": "0x2",
2629*14b4c544SIan Rogers        "Unit": "R3QPI"
2630*14b4c544SIan Rogers    },
2631*14b4c544SIan Rogers    {
2632*14b4c544SIan Rogers        "BriefDescription": "Ingress Allocations; DRS",
2633*14b4c544SIan Rogers        "EventCode": "0x11",
2634*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_INSERTS.DRS",
2635*14b4c544SIan Rogers        "PerPkg": "1",
2636*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the QPI Ingress.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue latency.  Multiple ingress buffers can be tracked at a given time using multiple counters.; DRS Ingress Queue",
2637*14b4c544SIan Rogers        "UMask": "0x8",
2638*14b4c544SIan Rogers        "Unit": "R3QPI"
2639*14b4c544SIan Rogers    },
2640*14b4c544SIan Rogers    {
2641*14b4c544SIan Rogers        "BriefDescription": "Ingress Allocations; HOM",
2642*14b4c544SIan Rogers        "EventCode": "0x11",
2643*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_INSERTS.HOM",
2644*14b4c544SIan Rogers        "PerPkg": "1",
2645*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the QPI Ingress.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue latency.  Multiple ingress buffers can be tracked at a given time using multiple counters.; HOM Ingress Queue",
2646*14b4c544SIan Rogers        "UMask": "0x1",
2647*14b4c544SIan Rogers        "Unit": "R3QPI"
2648*14b4c544SIan Rogers    },
2649*14b4c544SIan Rogers    {
2650*14b4c544SIan Rogers        "BriefDescription": "Ingress Allocations; NCB",
2651*14b4c544SIan Rogers        "EventCode": "0x11",
2652*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_INSERTS.NCB",
2653*14b4c544SIan Rogers        "PerPkg": "1",
2654*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the QPI Ingress.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue latency.  Multiple ingress buffers can be tracked at a given time using multiple counters.; NCB Ingress Queue",
2655*14b4c544SIan Rogers        "UMask": "0x10",
2656*14b4c544SIan Rogers        "Unit": "R3QPI"
2657*14b4c544SIan Rogers    },
2658*14b4c544SIan Rogers    {
2659*14b4c544SIan Rogers        "BriefDescription": "Ingress Allocations; NCS",
2660*14b4c544SIan Rogers        "EventCode": "0x11",
2661*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_INSERTS.NCS",
2662*14b4c544SIan Rogers        "PerPkg": "1",
2663*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the QPI Ingress.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue latency.  Multiple ingress buffers can be tracked at a given time using multiple counters.; NCS Ingress Queue",
2664*14b4c544SIan Rogers        "UMask": "0x20",
2665*14b4c544SIan Rogers        "Unit": "R3QPI"
2666*14b4c544SIan Rogers    },
2667*14b4c544SIan Rogers    {
2668*14b4c544SIan Rogers        "BriefDescription": "Ingress Allocations; NDR",
2669*14b4c544SIan Rogers        "EventCode": "0x11",
2670*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_INSERTS.NDR",
2671*14b4c544SIan Rogers        "PerPkg": "1",
2672*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the QPI Ingress.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue latency.  Multiple ingress buffers can be tracked at a given time using multiple counters.; NDR Ingress Queue",
2673*14b4c544SIan Rogers        "UMask": "0x4",
2674*14b4c544SIan Rogers        "Unit": "R3QPI"
2675*14b4c544SIan Rogers    },
2676*14b4c544SIan Rogers    {
2677*14b4c544SIan Rogers        "BriefDescription": "Ingress Allocations; SNP",
2678*14b4c544SIan Rogers        "EventCode": "0x11",
2679*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_INSERTS.SNP",
2680*14b4c544SIan Rogers        "PerPkg": "1",
2681*14b4c544SIan Rogers        "PublicDescription": "Counts the number of allocations into the QPI Ingress.  This tracks one of the three rings that are used by the QPI agent.  This can be used in conjunction with the QPI Ingress Occupancy Accumulator event in order to calculate average queue latency.  Multiple ingress buffers can be tracked at a given time using multiple counters.; SNP Ingress Queue",
2682*14b4c544SIan Rogers        "UMask": "0x2",
2683*14b4c544SIan Rogers        "Unit": "R3QPI"
2684*14b4c544SIan Rogers    },
2685*14b4c544SIan Rogers    {
2686*14b4c544SIan Rogers        "BriefDescription": "Ingress Occupancy Accumulator; DRS",
2687*14b4c544SIan Rogers        "EventCode": "0x13",
2688*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_OCCUPANCY.DRS",
2689*14b4c544SIan Rogers        "PerPkg": "1",
2690*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of a given QPI Ingress queue in each cycles.  This tracks one of the three ring Ingress buffers.  This can be used with the QPI Ingress Not Empty event to calculate average occupancy or the QPI Ingress Allocations event in order to calculate average queuing latency.; DRS Ingress Queue",
2691*14b4c544SIan Rogers        "UMask": "0x8",
2692*14b4c544SIan Rogers        "Unit": "R3QPI"
2693*14b4c544SIan Rogers    },
2694*14b4c544SIan Rogers    {
2695*14b4c544SIan Rogers        "BriefDescription": "Ingress Occupancy Accumulator; HOM",
2696*14b4c544SIan Rogers        "EventCode": "0x13",
2697*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_OCCUPANCY.HOM",
2698*14b4c544SIan Rogers        "PerPkg": "1",
2699*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of a given QPI Ingress queue in each cycles.  This tracks one of the three ring Ingress buffers.  This can be used with the QPI Ingress Not Empty event to calculate average occupancy or the QPI Ingress Allocations event in order to calculate average queuing latency.; HOM Ingress Queue",
2700*14b4c544SIan Rogers        "UMask": "0x1",
2701*14b4c544SIan Rogers        "Unit": "R3QPI"
2702*14b4c544SIan Rogers    },
2703*14b4c544SIan Rogers    {
2704*14b4c544SIan Rogers        "BriefDescription": "Ingress Occupancy Accumulator; NCB",
2705*14b4c544SIan Rogers        "EventCode": "0x13",
2706*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_OCCUPANCY.NCB",
2707*14b4c544SIan Rogers        "PerPkg": "1",
2708*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of a given QPI Ingress queue in each cycles.  This tracks one of the three ring Ingress buffers.  This can be used with the QPI Ingress Not Empty event to calculate average occupancy or the QPI Ingress Allocations event in order to calculate average queuing latency.; NCB Ingress Queue",
2709*14b4c544SIan Rogers        "UMask": "0x10",
2710*14b4c544SIan Rogers        "Unit": "R3QPI"
2711*14b4c544SIan Rogers    },
2712*14b4c544SIan Rogers    {
2713*14b4c544SIan Rogers        "BriefDescription": "Ingress Occupancy Accumulator; NCS",
2714*14b4c544SIan Rogers        "EventCode": "0x13",
2715*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_OCCUPANCY.NCS",
2716*14b4c544SIan Rogers        "PerPkg": "1",
2717*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of a given QPI Ingress queue in each cycles.  This tracks one of the three ring Ingress buffers.  This can be used with the QPI Ingress Not Empty event to calculate average occupancy or the QPI Ingress Allocations event in order to calculate average queuing latency.; NCS Ingress Queue",
2718*14b4c544SIan Rogers        "UMask": "0x20",
2719*14b4c544SIan Rogers        "Unit": "R3QPI"
2720*14b4c544SIan Rogers    },
2721*14b4c544SIan Rogers    {
2722*14b4c544SIan Rogers        "BriefDescription": "Ingress Occupancy Accumulator; NDR",
2723*14b4c544SIan Rogers        "EventCode": "0x13",
2724*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_OCCUPANCY.NDR",
2725*14b4c544SIan Rogers        "PerPkg": "1",
2726*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of a given QPI Ingress queue in each cycles.  This tracks one of the three ring Ingress buffers.  This can be used with the QPI Ingress Not Empty event to calculate average occupancy or the QPI Ingress Allocations event in order to calculate average queuing latency.; NDR Ingress Queue",
2727*14b4c544SIan Rogers        "UMask": "0x4",
2728*14b4c544SIan Rogers        "Unit": "R3QPI"
2729*14b4c544SIan Rogers    },
2730*14b4c544SIan Rogers    {
2731*14b4c544SIan Rogers        "BriefDescription": "Ingress Occupancy Accumulator; SNP",
2732*14b4c544SIan Rogers        "EventCode": "0x13",
2733*14b4c544SIan Rogers        "EventName": "UNC_R3_RxR_OCCUPANCY.SNP",
2734*14b4c544SIan Rogers        "PerPkg": "1",
2735*14b4c544SIan Rogers        "PublicDescription": "Accumulates the occupancy of a given QPI Ingress queue in each cycles.  This tracks one of the three ring Ingress buffers.  This can be used with the QPI Ingress Not Empty event to calculate average occupancy or the QPI Ingress Allocations event in order to calculate average queuing latency.; SNP Ingress Queue",
2736*14b4c544SIan Rogers        "UMask": "0x2",
2737*14b4c544SIan Rogers        "Unit": "R3QPI"
2738*14b4c544SIan Rogers    },
2739*14b4c544SIan Rogers    {
2740*14b4c544SIan Rogers        "BriefDescription": "Egress NACK; AK CCW",
2741*14b4c544SIan Rogers        "EventCode": "0x28",
2742*14b4c544SIan Rogers        "EventName": "UNC_R3_TxR_NACK_CCW.AD",
2743*14b4c544SIan Rogers        "PerPkg": "1",
2744*14b4c544SIan Rogers        "PublicDescription": "BL CounterClockwise Egress Queue",
2745*14b4c544SIan Rogers        "UMask": "0x1",
2746*14b4c544SIan Rogers        "Unit": "R3QPI"
2747*14b4c544SIan Rogers    },
2748*14b4c544SIan Rogers    {
2749*14b4c544SIan Rogers        "BriefDescription": "Egress NACK; BL CW",
2750*14b4c544SIan Rogers        "EventCode": "0x28",
2751*14b4c544SIan Rogers        "EventName": "UNC_R3_TxR_NACK_CCW.AK",
2752*14b4c544SIan Rogers        "PerPkg": "1",
2753*14b4c544SIan Rogers        "PublicDescription": "AD Clockwise Egress Queue",
2754*14b4c544SIan Rogers        "UMask": "0x2",
2755*14b4c544SIan Rogers        "Unit": "R3QPI"
2756*14b4c544SIan Rogers    },
2757*14b4c544SIan Rogers    {
2758*14b4c544SIan Rogers        "BriefDescription": "Egress NACK; BL CCW",
2759*14b4c544SIan Rogers        "EventCode": "0x28",
2760*14b4c544SIan Rogers        "EventName": "UNC_R3_TxR_NACK_CCW.BL",
2761*14b4c544SIan Rogers        "PerPkg": "1",
2762*14b4c544SIan Rogers        "PublicDescription": "AD CounterClockwise Egress Queue",
2763*14b4c544SIan Rogers        "UMask": "0x4",
2764*14b4c544SIan Rogers        "Unit": "R3QPI"
2765*14b4c544SIan Rogers    },
2766*14b4c544SIan Rogers    {
2767*14b4c544SIan Rogers        "BriefDescription": "Egress NACK; AD CW",
2768*14b4c544SIan Rogers        "EventCode": "0x26",
2769*14b4c544SIan Rogers        "EventName": "UNC_R3_TxR_NACK_CW.AD",
2770*14b4c544SIan Rogers        "PerPkg": "1",
2771*14b4c544SIan Rogers        "PublicDescription": "AD Clockwise Egress Queue",
2772*14b4c544SIan Rogers        "UMask": "0x1",
2773*14b4c544SIan Rogers        "Unit": "R3QPI"
2774*14b4c544SIan Rogers    },
2775*14b4c544SIan Rogers    {
2776*14b4c544SIan Rogers        "BriefDescription": "Egress NACK; AD CCW",
2777*14b4c544SIan Rogers        "EventCode": "0x26",
2778*14b4c544SIan Rogers        "EventName": "UNC_R3_TxR_NACK_CW.AK",
2779*14b4c544SIan Rogers        "PerPkg": "1",
2780*14b4c544SIan Rogers        "PublicDescription": "AD CounterClockwise Egress Queue",
2781*14b4c544SIan Rogers        "UMask": "0x2",
2782*14b4c544SIan Rogers        "Unit": "R3QPI"
2783*14b4c544SIan Rogers    },
2784*14b4c544SIan Rogers    {
2785*14b4c544SIan Rogers        "BriefDescription": "Egress NACK; AK CW",
2786*14b4c544SIan Rogers        "EventCode": "0x26",
2787*14b4c544SIan Rogers        "EventName": "UNC_R3_TxR_NACK_CW.BL",
2788*14b4c544SIan Rogers        "PerPkg": "1",
2789*14b4c544SIan Rogers        "PublicDescription": "BL Clockwise Egress Queue",
2790*14b4c544SIan Rogers        "UMask": "0x4",
2791*14b4c544SIan Rogers        "Unit": "R3QPI"
2792*14b4c544SIan Rogers    },
2793*14b4c544SIan Rogers    {
2794*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Acquisition Failed on DRS; DRS Message Class",
2795*14b4c544SIan Rogers        "EventCode": "0x37",
2796*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_REJECT.DRS",
2797*14b4c544SIan Rogers        "PerPkg": "1",
2798*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a DRS VN0 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN0 credit and is delayed.  This should generally be a rare situation.; Filter for Data Response (DRS).  DRS is generally used to transmit data with coherency.  For example, remote reads and writes, or cache to cache transfers will transmit their data using DRS.",
2799*14b4c544SIan Rogers        "UMask": "0x8",
2800*14b4c544SIan Rogers        "Unit": "R3QPI"
2801*14b4c544SIan Rogers    },
2802*14b4c544SIan Rogers    {
2803*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Acquisition Failed on DRS; HOM Message Class",
2804*14b4c544SIan Rogers        "EventCode": "0x37",
2805*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_REJECT.HOM",
2806*14b4c544SIan Rogers        "PerPkg": "1",
2807*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a DRS VN0 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN0 credit and is delayed.  This should generally be a rare situation.; Filter for the Home (HOM) message class.  HOM is generally used to send requests, request responses, and snoop responses.",
2808*14b4c544SIan Rogers        "UMask": "0x1",
2809*14b4c544SIan Rogers        "Unit": "R3QPI"
2810*14b4c544SIan Rogers    },
2811*14b4c544SIan Rogers    {
2812*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCB Message Class",
2813*14b4c544SIan Rogers        "EventCode": "0x37",
2814*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCB",
2815*14b4c544SIan Rogers        "PerPkg": "1",
2816*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a DRS VN0 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN0 credit and is delayed.  This should generally be a rare situation.; Filter for Non-Coherent Broadcast (NCB).  NCB is generally used to transmit data without coherency.  For example, non-coherent read data returns.",
2817*14b4c544SIan Rogers        "UMask": "0x10",
2818*14b4c544SIan Rogers        "Unit": "R3QPI"
2819*14b4c544SIan Rogers    },
2820*14b4c544SIan Rogers    {
2821*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NCS Message Class",
2822*14b4c544SIan Rogers        "EventCode": "0x37",
2823*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_REJECT.NCS",
2824*14b4c544SIan Rogers        "PerPkg": "1",
2825*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a DRS VN0 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN0 credit and is delayed.  This should generally be a rare situation.; Filter for Non-Coherent Standard (NCS).  NCS is commonly used for ?",
2826*14b4c544SIan Rogers        "UMask": "0x20",
2827*14b4c544SIan Rogers        "Unit": "R3QPI"
2828*14b4c544SIan Rogers    },
2829*14b4c544SIan Rogers    {
2830*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Acquisition Failed on DRS; NDR Message Class",
2831*14b4c544SIan Rogers        "EventCode": "0x37",
2832*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_REJECT.NDR",
2833*14b4c544SIan Rogers        "PerPkg": "1",
2834*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a DRS VN0 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN0 credit and is delayed.  This should generally be a rare situation.; NDR packets are used to transmit a variety of protocol flits including grants and completions (CMP).",
2835*14b4c544SIan Rogers        "UMask": "0x4",
2836*14b4c544SIan Rogers        "Unit": "R3QPI"
2837*14b4c544SIan Rogers    },
2838*14b4c544SIan Rogers    {
2839*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Acquisition Failed on DRS; SNP Message Class",
2840*14b4c544SIan Rogers        "EventCode": "0x37",
2841*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_REJECT.SNP",
2842*14b4c544SIan Rogers        "PerPkg": "1",
2843*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a DRS VN0 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN0 credit and is delayed.  This should generally be a rare situation.; Filter for Snoop (SNP) message class.  SNP is used for outgoing snoops.  Note that snoop responses flow on the HOM message class.",
2844*14b4c544SIan Rogers        "UMask": "0x2",
2845*14b4c544SIan Rogers        "Unit": "R3QPI"
2846*14b4c544SIan Rogers    },
2847*14b4c544SIan Rogers    {
2848*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Used; DRS Message Class",
2849*14b4c544SIan Rogers        "EventCode": "0x36",
2850*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_USED.DRS",
2851*14b4c544SIan Rogers        "PerPkg": "1",
2852*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN0 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This counts the number of times a VN0 credit was used.  Note that a single VN0 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN0 will only count a single credit even though it may use multiple buffers.; Filter for Data Response (DRS).  DRS is generally used to transmit data with coherency.  For example, remote reads and writes, or cache to cache transfers will transmit their data using DRS.",
2853*14b4c544SIan Rogers        "UMask": "0x8",
2854*14b4c544SIan Rogers        "Unit": "R3QPI"
2855*14b4c544SIan Rogers    },
2856*14b4c544SIan Rogers    {
2857*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Used; HOM Message Class",
2858*14b4c544SIan Rogers        "EventCode": "0x36",
2859*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_USED.HOM",
2860*14b4c544SIan Rogers        "PerPkg": "1",
2861*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN0 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This counts the number of times a VN0 credit was used.  Note that a single VN0 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN0 will only count a single credit even though it may use multiple buffers.; Filter for the Home (HOM) message class.  HOM is generally used to send requests, request responses, and snoop responses.",
2862*14b4c544SIan Rogers        "UMask": "0x1",
2863*14b4c544SIan Rogers        "Unit": "R3QPI"
2864*14b4c544SIan Rogers    },
2865*14b4c544SIan Rogers    {
2866*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Used; NCB Message Class",
2867*14b4c544SIan Rogers        "EventCode": "0x36",
2868*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_USED.NCB",
2869*14b4c544SIan Rogers        "PerPkg": "1",
2870*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN0 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This counts the number of times a VN0 credit was used.  Note that a single VN0 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN0 will only count a single credit even though it may use multiple buffers.; Filter for Non-Coherent Broadcast (NCB).  NCB is generally used to transmit data without coherency.  For example, non-coherent read data returns.",
2871*14b4c544SIan Rogers        "UMask": "0x10",
2872*14b4c544SIan Rogers        "Unit": "R3QPI"
2873*14b4c544SIan Rogers    },
2874*14b4c544SIan Rogers    {
2875*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Used; NCS Message Class",
2876*14b4c544SIan Rogers        "EventCode": "0x36",
2877*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_USED.NCS",
2878*14b4c544SIan Rogers        "PerPkg": "1",
2879*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN0 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This counts the number of times a VN0 credit was used.  Note that a single VN0 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN0 will only count a single credit even though it may use multiple buffers.; Filter for Non-Coherent Standard (NCS).  NCS is commonly used for ?",
2880*14b4c544SIan Rogers        "UMask": "0x20",
2881*14b4c544SIan Rogers        "Unit": "R3QPI"
2882*14b4c544SIan Rogers    },
2883*14b4c544SIan Rogers    {
2884*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Used; NDR Message Class",
2885*14b4c544SIan Rogers        "EventCode": "0x36",
2886*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_USED.NDR",
2887*14b4c544SIan Rogers        "PerPkg": "1",
2888*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN0 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This counts the number of times a VN0 credit was used.  Note that a single VN0 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN0 will only count a single credit even though it may use multiple buffers.; NDR packets are used to transmit a variety of protocol flits including grants and completions (CMP).",
2889*14b4c544SIan Rogers        "UMask": "0x4",
2890*14b4c544SIan Rogers        "Unit": "R3QPI"
2891*14b4c544SIan Rogers    },
2892*14b4c544SIan Rogers    {
2893*14b4c544SIan Rogers        "BriefDescription": "VN0 Credit Used; SNP Message Class",
2894*14b4c544SIan Rogers        "EventCode": "0x36",
2895*14b4c544SIan Rogers        "EventName": "UNC_R3_VN0_CREDITS_USED.SNP",
2896*14b4c544SIan Rogers        "PerPkg": "1",
2897*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN0 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN0.  VNA is a shared pool used to achieve high performance.  The VN0 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN0 if they fail.  This counts the number of times a VN0 credit was used.  Note that a single VN0 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN0 will only count a single credit even though it may use multiple buffers.; Filter for Snoop (SNP) message class.  SNP is used for outgoing snoops.  Note that snoop responses flow on the HOM message class.",
2898*14b4c544SIan Rogers        "UMask": "0x2",
2899*14b4c544SIan Rogers        "Unit": "R3QPI"
2900*14b4c544SIan Rogers    },
2901*14b4c544SIan Rogers    {
2902*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Acquisition Failed on DRS; DRS Message Class",
2903*14b4c544SIan Rogers        "EventCode": "0x39",
2904*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_REJECT.DRS",
2905*14b4c544SIan Rogers        "PerPkg": "1",
2906*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a VN1 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN1 credit and is delayed.  This should generally be a rare situation.; Filter for Data Response (DRS).  DRS is generally used to transmit data with coherency.  For example, remote reads and writes, or cache to cache transfers will transmit their data using DRS.",
2907*14b4c544SIan Rogers        "UMask": "0x8",
2908*14b4c544SIan Rogers        "Unit": "R3QPI"
2909*14b4c544SIan Rogers    },
2910*14b4c544SIan Rogers    {
2911*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Acquisition Failed on DRS; HOM Message Class",
2912*14b4c544SIan Rogers        "EventCode": "0x39",
2913*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_REJECT.HOM",
2914*14b4c544SIan Rogers        "PerPkg": "1",
2915*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a VN1 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN1 credit and is delayed.  This should generally be a rare situation.; Filter for the Home (HOM) message class.  HOM is generally used to send requests, request responses, and snoop responses.",
2916*14b4c544SIan Rogers        "UMask": "0x1",
2917*14b4c544SIan Rogers        "Unit": "R3QPI"
2918*14b4c544SIan Rogers    },
2919*14b4c544SIan Rogers    {
2920*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCB Message Class",
2921*14b4c544SIan Rogers        "EventCode": "0x39",
2922*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCB",
2923*14b4c544SIan Rogers        "PerPkg": "1",
2924*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a VN1 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN1 credit and is delayed.  This should generally be a rare situation.; Filter for Non-Coherent Broadcast (NCB).  NCB is generally used to transmit data without coherency.  For example, non-coherent read data returns.",
2925*14b4c544SIan Rogers        "UMask": "0x10",
2926*14b4c544SIan Rogers        "Unit": "R3QPI"
2927*14b4c544SIan Rogers    },
2928*14b4c544SIan Rogers    {
2929*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NCS Message Class",
2930*14b4c544SIan Rogers        "EventCode": "0x39",
2931*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_REJECT.NCS",
2932*14b4c544SIan Rogers        "PerPkg": "1",
2933*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a VN1 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN1 credit and is delayed.  This should generally be a rare situation.; Filter for Non-Coherent Standard (NCS).  NCS is commonly used for ?",
2934*14b4c544SIan Rogers        "UMask": "0x20",
2935*14b4c544SIan Rogers        "Unit": "R3QPI"
2936*14b4c544SIan Rogers    },
2937*14b4c544SIan Rogers    {
2938*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Acquisition Failed on DRS; NDR Message Class",
2939*14b4c544SIan Rogers        "EventCode": "0x39",
2940*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_REJECT.NDR",
2941*14b4c544SIan Rogers        "PerPkg": "1",
2942*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a VN1 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN1 credit and is delayed.  This should generally be a rare situation.; NDR packets are used to transmit a variety of protocol flits including grants and completions (CMP).",
2943*14b4c544SIan Rogers        "UMask": "0x4",
2944*14b4c544SIan Rogers        "Unit": "R3QPI"
2945*14b4c544SIan Rogers    },
2946*14b4c544SIan Rogers    {
2947*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Acquisition Failed on DRS; SNP Message Class",
2948*14b4c544SIan Rogers        "EventCode": "0x39",
2949*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_REJECT.SNP",
2950*14b4c544SIan Rogers        "PerPkg": "1",
2951*14b4c544SIan Rogers        "PublicDescription": "Number of times a request failed to acquire a VN1 credit.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This therefore counts the number of times when a request failed to acquire either a VNA or VN1 credit and is delayed.  This should generally be a rare situation.; Filter for Snoop (SNP) message class.  SNP is used for outgoing snoops.  Note that snoop responses flow on the HOM message class.",
2952*14b4c544SIan Rogers        "UMask": "0x2",
2953*14b4c544SIan Rogers        "Unit": "R3QPI"
2954*14b4c544SIan Rogers    },
2955*14b4c544SIan Rogers    {
2956*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Used; DRS Message Class",
2957*14b4c544SIan Rogers        "EventCode": "0x38",
2958*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_USED.DRS",
2959*14b4c544SIan Rogers        "PerPkg": "1",
2960*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN1 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This counts the number of times a VN1 credit was used.  Note that a single VN1 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN1 will only count a single credit even though it may use multiple buffers.; Filter for Data Response (DRS).  DRS is generally used to transmit data with coherency.  For example, remote reads and writes, or cache to cache transfers will transmit their data using DRS.",
2961*14b4c544SIan Rogers        "UMask": "0x8",
2962*14b4c544SIan Rogers        "Unit": "R3QPI"
2963*14b4c544SIan Rogers    },
2964*14b4c544SIan Rogers    {
2965*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Used; HOM Message Class",
2966*14b4c544SIan Rogers        "EventCode": "0x38",
2967*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_USED.HOM",
2968*14b4c544SIan Rogers        "PerPkg": "1",
2969*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN1 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This counts the number of times a VN1 credit was used.  Note that a single VN1 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN1 will only count a single credit even though it may use multiple buffers.; Filter for the Home (HOM) message class.  HOM is generally used to send requests, request responses, and snoop responses.",
2970*14b4c544SIan Rogers        "UMask": "0x1",
2971*14b4c544SIan Rogers        "Unit": "R3QPI"
2972*14b4c544SIan Rogers    },
2973*14b4c544SIan Rogers    {
2974*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Used; NCB Message Class",
2975*14b4c544SIan Rogers        "EventCode": "0x38",
2976*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_USED.NCB",
2977*14b4c544SIan Rogers        "PerPkg": "1",
2978*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN1 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This counts the number of times a VN1 credit was used.  Note that a single VN1 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN1 will only count a single credit even though it may use multiple buffers.; Filter for Non-Coherent Broadcast (NCB).  NCB is generally used to transmit data without coherency.  For example, non-coherent read data returns.",
2979*14b4c544SIan Rogers        "UMask": "0x10",
2980*14b4c544SIan Rogers        "Unit": "R3QPI"
2981*14b4c544SIan Rogers    },
2982*14b4c544SIan Rogers    {
2983*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Used; NCS Message Class",
2984*14b4c544SIan Rogers        "EventCode": "0x38",
2985*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_USED.NCS",
2986*14b4c544SIan Rogers        "PerPkg": "1",
2987*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN1 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This counts the number of times a VN1 credit was used.  Note that a single VN1 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN1 will only count a single credit even though it may use multiple buffers.; Filter for Non-Coherent Standard (NCS).  NCS is commonly used for ?",
2988*14b4c544SIan Rogers        "UMask": "0x20",
2989*14b4c544SIan Rogers        "Unit": "R3QPI"
2990*14b4c544SIan Rogers    },
2991*14b4c544SIan Rogers    {
2992*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Used; NDR Message Class",
2993*14b4c544SIan Rogers        "EventCode": "0x38",
2994*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_USED.NDR",
2995*14b4c544SIan Rogers        "PerPkg": "1",
2996*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN1 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This counts the number of times a VN1 credit was used.  Note that a single VN1 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN1 will only count a single credit even though it may use multiple buffers.; NDR packets are used to transmit a variety of protocol flits including grants and completions (CMP).",
2997*14b4c544SIan Rogers        "UMask": "0x4",
2998*14b4c544SIan Rogers        "Unit": "R3QPI"
2999*14b4c544SIan Rogers    },
3000*14b4c544SIan Rogers    {
3001*14b4c544SIan Rogers        "BriefDescription": "VN1 Credit Used; SNP Message Class",
3002*14b4c544SIan Rogers        "EventCode": "0x38",
3003*14b4c544SIan Rogers        "EventName": "UNC_R3_VN1_CREDITS_USED.SNP",
3004*14b4c544SIan Rogers        "PerPkg": "1",
3005*14b4c544SIan Rogers        "PublicDescription": "Number of times a VN1 credit was used on the DRS message channel.  In order for a request to be transferred across QPI, it must be guaranteed to have a flit buffer on the remote socket to sink into.  There are two credit pools, VNA and VN1.  VNA is a shared pool used to achieve high performance.  The VN1 pool has reserved entries for each message class and is used to prevent deadlock.  Requests first attempt to acquire a VNA credit, and then fall back to VN1 if they fail.  This counts the number of times a VN1 credit was used.  Note that a single VN1 credit holds access to potentially multiple flit buffers.  For example, a transfer that uses VNA could use 9 flit buffers and in that case uses 9 credits.  A transfer on VN1 will only count a single credit even though it may use multiple buffers.; Filter for Snoop (SNP) message class.  SNP is used for outgoing snoops.  Note that snoop responses flow on the HOM message class.",
3006*14b4c544SIan Rogers        "UMask": "0x2",
3007*14b4c544SIan Rogers        "Unit": "R3QPI"
3008*14b4c544SIan Rogers    },
3009*14b4c544SIan Rogers    {
3010*14b4c544SIan Rogers        "BriefDescription": "VNA credit Acquisitions",
3011*14b4c544SIan Rogers        "EventCode": "0x33",
3012*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED",
3013*14b4c544SIan Rogers        "PerPkg": "1",
3014*14b4c544SIan Rogers        "PublicDescription": "Number of QPI VNA Credit acquisitions.  This event can be used in conjunction with the VNA In-Use Accumulator to calculate the average lifetime of a credit holder.  VNA credits are used by all message classes in order to communicate across QPI.  If a packet is unable to acquire credits, it will then attempt to use credits from the VN0 pool.  Note that a single packet may require multiple flit buffers (i.e. when data is being transferred).  Therefore, this event will increment by the number of credits acquired in each cycle.  Filtering based on message class is not provided.  One can count the number of packets transferred in a given message class using an qfclk event.",
3015*14b4c544SIan Rogers        "Unit": "R3QPI"
3016*14b4c544SIan Rogers    },
3017*14b4c544SIan Rogers    {
3018*14b4c544SIan Rogers        "BriefDescription": "VNA credit Acquisitions; HOM Message Class",
3019*14b4c544SIan Rogers        "EventCode": "0x33",
3020*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.AD",
3021*14b4c544SIan Rogers        "PerPkg": "1",
3022*14b4c544SIan Rogers        "PublicDescription": "Number of QPI VNA Credit acquisitions.  This event can be used in conjunction with the VNA In-Use Accumulator to calculate the average lifetime of a credit holder.  VNA credits are used by all message classes in order to communicate across QPI.  If a packet is unable to acquire credits, it will then attempt to use credits from the VN0 pool.  Note that a single packet may require multiple flit buffers (i.e. when data is being transferred).  Therefore, this event will increment by the number of credits acquired in each cycle.  Filtering based on message class is not provided.  One can count the number of packets transferred in a given message class using an qfclk event.; Filter for the Home (HOM) message class.  HOM is generally used to send requests, request responses, and snoop responses.",
3023*14b4c544SIan Rogers        "UMask": "0x1",
3024*14b4c544SIan Rogers        "Unit": "R3QPI"
3025*14b4c544SIan Rogers    },
3026*14b4c544SIan Rogers    {
3027*14b4c544SIan Rogers        "BriefDescription": "VNA credit Acquisitions; HOM Message Class",
3028*14b4c544SIan Rogers        "EventCode": "0x33",
3029*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_ACQUIRED.BL",
3030*14b4c544SIan Rogers        "PerPkg": "1",
3031*14b4c544SIan Rogers        "PublicDescription": "Number of QPI VNA Credit acquisitions.  This event can be used in conjunction with the VNA In-Use Accumulator to calculate the average lifetime of a credit holder.  VNA credits are used by all message classes in order to communicate across QPI.  If a packet is unable to acquire credits, it will then attempt to use credits from the VN0 pool.  Note that a single packet may require multiple flit buffers (i.e. when data is being transferred).  Therefore, this event will increment by the number of credits acquired in each cycle.  Filtering based on message class is not provided.  One can count the number of packets transferred in a given message class using an qfclk event.; Filter for the Home (HOM) message class.  HOM is generally used to send requests, request responses, and snoop responses.",
3032*14b4c544SIan Rogers        "UMask": "0x4",
3033*14b4c544SIan Rogers        "Unit": "R3QPI"
3034*14b4c544SIan Rogers    },
3035*14b4c544SIan Rogers    {
3036*14b4c544SIan Rogers        "BriefDescription": "VNA Credit Reject; DRS Message Class",
3037*14b4c544SIan Rogers        "EventCode": "0x34",
3038*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_REJECT.DRS",
3039*14b4c544SIan Rogers        "PerPkg": "1",
3040*14b4c544SIan Rogers        "PublicDescription": "Number of attempted VNA credit acquisitions that were rejected because the VNA credit pool was full (or almost full).  It is possible to filter this event by message class.  Some packets use more than one flit buffer, and therefore must acquire multiple credits.  Therefore, one could get a reject even if the VNA credits were not fully used up.  The VNA pool is generally used to provide the bulk of the QPI bandwidth (as opposed to the VN0 pool which is used to guarantee forward progress).  VNA credits can run out if the flit buffer on the receiving side starts to queue up substantially.  This can happen if the rest of the uncore is unable to drain the requests fast enough.; Filter for Data Response (DRS).  DRS is generally used to transmit data with coherency.  For example, remote reads and writes, or cache to cache transfers will transmit their data using DRS.",
3041*14b4c544SIan Rogers        "UMask": "0x8",
3042*14b4c544SIan Rogers        "Unit": "R3QPI"
3043*14b4c544SIan Rogers    },
3044*14b4c544SIan Rogers    {
3045*14b4c544SIan Rogers        "BriefDescription": "VNA Credit Reject; HOM Message Class",
3046*14b4c544SIan Rogers        "EventCode": "0x34",
3047*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_REJECT.HOM",
3048*14b4c544SIan Rogers        "PerPkg": "1",
3049*14b4c544SIan Rogers        "PublicDescription": "Number of attempted VNA credit acquisitions that were rejected because the VNA credit pool was full (or almost full).  It is possible to filter this event by message class.  Some packets use more than one flit buffer, and therefore must acquire multiple credits.  Therefore, one could get a reject even if the VNA credits were not fully used up.  The VNA pool is generally used to provide the bulk of the QPI bandwidth (as opposed to the VN0 pool which is used to guarantee forward progress).  VNA credits can run out if the flit buffer on the receiving side starts to queue up substantially.  This can happen if the rest of the uncore is unable to drain the requests fast enough.; Filter for the Home (HOM) message class.  HOM is generally used to send requests, request responses, and snoop responses.",
3050*14b4c544SIan Rogers        "UMask": "0x1",
3051*14b4c544SIan Rogers        "Unit": "R3QPI"
3052*14b4c544SIan Rogers    },
3053*14b4c544SIan Rogers    {
3054*14b4c544SIan Rogers        "BriefDescription": "VNA Credit Reject; NCB Message Class",
3055*14b4c544SIan Rogers        "EventCode": "0x34",
3056*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCB",
3057*14b4c544SIan Rogers        "PerPkg": "1",
3058*14b4c544SIan Rogers        "PublicDescription": "Number of attempted VNA credit acquisitions that were rejected because the VNA credit pool was full (or almost full).  It is possible to filter this event by message class.  Some packets use more than one flit buffer, and therefore must acquire multiple credits.  Therefore, one could get a reject even if the VNA credits were not fully used up.  The VNA pool is generally used to provide the bulk of the QPI bandwidth (as opposed to the VN0 pool which is used to guarantee forward progress).  VNA credits can run out if the flit buffer on the receiving side starts to queue up substantially.  This can happen if the rest of the uncore is unable to drain the requests fast enough.; Filter for Non-Coherent Broadcast (NCB).  NCB is generally used to transmit data without coherency.  For example, non-coherent read data returns.",
3059*14b4c544SIan Rogers        "UMask": "0x10",
3060*14b4c544SIan Rogers        "Unit": "R3QPI"
3061*14b4c544SIan Rogers    },
3062*14b4c544SIan Rogers    {
3063*14b4c544SIan Rogers        "BriefDescription": "VNA Credit Reject; NCS Message Class",
3064*14b4c544SIan Rogers        "EventCode": "0x34",
3065*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_REJECT.NCS",
3066*14b4c544SIan Rogers        "PerPkg": "1",
3067*14b4c544SIan Rogers        "PublicDescription": "Number of attempted VNA credit acquisitions that were rejected because the VNA credit pool was full (or almost full).  It is possible to filter this event by message class.  Some packets use more than one flit buffer, and therefore must acquire multiple credits.  Therefore, one could get a reject even if the VNA credits were not fully used up.  The VNA pool is generally used to provide the bulk of the QPI bandwidth (as opposed to the VN0 pool which is used to guarantee forward progress).  VNA credits can run out if the flit buffer on the receiving side starts to queue up substantially.  This can happen if the rest of the uncore is unable to drain the requests fast enough.; Filter for Non-Coherent Standard (NCS).",
3068*14b4c544SIan Rogers        "UMask": "0x20",
3069*14b4c544SIan Rogers        "Unit": "R3QPI"
3070*14b4c544SIan Rogers    },
3071*14b4c544SIan Rogers    {
3072*14b4c544SIan Rogers        "BriefDescription": "VNA Credit Reject; NDR Message Class",
3073*14b4c544SIan Rogers        "EventCode": "0x34",
3074*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_REJECT.NDR",
3075*14b4c544SIan Rogers        "PerPkg": "1",
3076*14b4c544SIan Rogers        "PublicDescription": "Number of attempted VNA credit acquisitions that were rejected because the VNA credit pool was full (or almost full).  It is possible to filter this event by message class.  Some packets use more than one flit buffer, and therefore must acquire multiple credits.  Therefore, one could get a reject even if the VNA credits were not fully used up.  The VNA pool is generally used to provide the bulk of the QPI bandwidth (as opposed to the VN0 pool which is used to guarantee forward progress).  VNA credits can run out if the flit buffer on the receiving side starts to queue up substantially.  This can happen if the rest of the uncore is unable to drain the requests fast enough.; NDR packets are used to transmit a variety of protocol flits including grants and completions (CMP).",
3077*14b4c544SIan Rogers        "UMask": "0x4",
3078*14b4c544SIan Rogers        "Unit": "R3QPI"
3079*14b4c544SIan Rogers    },
3080*14b4c544SIan Rogers    {
3081*14b4c544SIan Rogers        "BriefDescription": "VNA Credit Reject; SNP Message Class",
3082*14b4c544SIan Rogers        "EventCode": "0x34",
3083*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDITS_REJECT.SNP",
3084*14b4c544SIan Rogers        "PerPkg": "1",
3085*14b4c544SIan Rogers        "PublicDescription": "Number of attempted VNA credit acquisitions that were rejected because the VNA credit pool was full (or almost full).  It is possible to filter this event by message class.  Some packets use more than one flit buffer, and therefore must acquire multiple credits.  Therefore, one could get a reject even if the VNA credits were not fully used up.  The VNA pool is generally used to provide the bulk of the QPI bandwidth (as opposed to the VN0 pool which is used to guarantee forward progress).  VNA credits can run out if the flit buffer on the receiving side starts to queue up substantially.  This can happen if the rest of the uncore is unable to drain the requests fast enough.; Filter for Snoop (SNP) message class.  SNP is used for outgoing snoops.  Note that snoop responses flow on the HOM message class.",
3086*14b4c544SIan Rogers        "UMask": "0x2",
3087*14b4c544SIan Rogers        "Unit": "R3QPI"
3088*14b4c544SIan Rogers    },
3089*14b4c544SIan Rogers    {
3090*14b4c544SIan Rogers        "BriefDescription": "Cycles with no VNA credits available",
3091*14b4c544SIan Rogers        "EventCode": "0x31",
3092*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDIT_CYCLES_OUT",
3093*14b4c544SIan Rogers        "PerPkg": "1",
3094*14b4c544SIan Rogers        "PublicDescription": "Number of QPI uclk cycles when the transmitted has no VNA credits available and therefore cannot send any requests on this channel.  Note that this does not mean that no flits can be transmitted, as those holding VN0 credits will still (potentially) be able to transmit.  Generally it is the goal of the uncore that VNA credits should not run out, as this can substantially throttle back useful QPI bandwidth.",
3095*14b4c544SIan Rogers        "Unit": "R3QPI"
3096*14b4c544SIan Rogers    },
3097*14b4c544SIan Rogers    {
3098*14b4c544SIan Rogers        "BriefDescription": "Cycles with 1 or more VNA credits in use",
3099*14b4c544SIan Rogers        "EventCode": "0x32",
3100*14b4c544SIan Rogers        "EventName": "UNC_R3_VNA_CREDIT_CYCLES_USED",
3101*14b4c544SIan Rogers        "PerPkg": "1",
3102*14b4c544SIan Rogers        "PublicDescription": "Number of QPI uclk cycles with one or more VNA credits in use.  This event can be used in conjunction with the VNA In-Use Accumulator to calculate the average number of used VNA credits.",
3103*14b4c544SIan Rogers        "Unit": "R3QPI"
3104*14b4c544SIan Rogers    },
3105*14b4c544SIan Rogers    {
3106*14b4c544SIan Rogers        "EventName": "UNC_U_CLOCKTICKS",
3107*14b4c544SIan Rogers        "PerPkg": "1",
3108*14b4c544SIan Rogers        "Unit": "UBOX"
3109*14b4c544SIan Rogers    },
3110*14b4c544SIan Rogers    {
3111*14b4c544SIan Rogers        "BriefDescription": "VLW Received",
3112*14b4c544SIan Rogers        "EventCode": "0x42",
3113*14b4c544SIan Rogers        "EventName": "UNC_U_EVENT_MSG.DOORBELL_RCVD",
3114*14b4c544SIan Rogers        "PerPkg": "1",
3115*14b4c544SIan Rogers        "PublicDescription": "Virtual Logical Wire (legacy) message were received from Uncore.   Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3116*14b4c544SIan Rogers        "UMask": "0x8",
3117*14b4c544SIan Rogers        "Unit": "UBOX"
3118*14b4c544SIan Rogers    },
3119*14b4c544SIan Rogers    {
3120*14b4c544SIan Rogers        "BriefDescription": "VLW Received",
3121*14b4c544SIan Rogers        "EventCode": "0x42",
3122*14b4c544SIan Rogers        "EventName": "UNC_U_EVENT_MSG.INT_PRIO",
3123*14b4c544SIan Rogers        "PerPkg": "1",
3124*14b4c544SIan Rogers        "PublicDescription": "Virtual Logical Wire (legacy) message were received from Uncore.   Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3125*14b4c544SIan Rogers        "UMask": "0x10",
3126*14b4c544SIan Rogers        "Unit": "UBOX"
3127*14b4c544SIan Rogers    },
3128*14b4c544SIan Rogers    {
3129*14b4c544SIan Rogers        "BriefDescription": "VLW Received",
3130*14b4c544SIan Rogers        "EventCode": "0x42",
3131*14b4c544SIan Rogers        "EventName": "UNC_U_EVENT_MSG.IPI_RCVD",
3132*14b4c544SIan Rogers        "PerPkg": "1",
3133*14b4c544SIan Rogers        "PublicDescription": "Virtual Logical Wire (legacy) message were received from Uncore.   Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3134*14b4c544SIan Rogers        "UMask": "0x4",
3135*14b4c544SIan Rogers        "Unit": "UBOX"
3136*14b4c544SIan Rogers    },
3137*14b4c544SIan Rogers    {
3138*14b4c544SIan Rogers        "BriefDescription": "VLW Received",
3139*14b4c544SIan Rogers        "EventCode": "0x42",
3140*14b4c544SIan Rogers        "EventName": "UNC_U_EVENT_MSG.MSI_RCVD",
3141*14b4c544SIan Rogers        "PerPkg": "1",
3142*14b4c544SIan Rogers        "PublicDescription": "Virtual Logical Wire (legacy) message were received from Uncore.   Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3143*14b4c544SIan Rogers        "UMask": "0x2",
3144*14b4c544SIan Rogers        "Unit": "UBOX"
3145*14b4c544SIan Rogers    },
3146*14b4c544SIan Rogers    {
3147*14b4c544SIan Rogers        "BriefDescription": "VLW Received",
3148*14b4c544SIan Rogers        "EventCode": "0x42",
3149*14b4c544SIan Rogers        "EventName": "UNC_U_EVENT_MSG.VLW_RCVD",
3150*14b4c544SIan Rogers        "PerPkg": "1",
3151*14b4c544SIan Rogers        "PublicDescription": "Virtual Logical Wire (legacy) message were received from Uncore.   Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3152*14b4c544SIan Rogers        "UMask": "0x1",
3153*14b4c544SIan Rogers        "Unit": "UBOX"
3154*14b4c544SIan Rogers    },
3155*14b4c544SIan Rogers    {
3156*14b4c544SIan Rogers        "BriefDescription": "Filter Match",
3157*14b4c544SIan Rogers        "EventCode": "0x41",
3158*14b4c544SIan Rogers        "EventName": "UNC_U_FILTER_MATCH.DISABLE",
3159*14b4c544SIan Rogers        "PerPkg": "1",
3160*14b4c544SIan Rogers        "PublicDescription": "Filter match per thread (w/ or w/o Filter Enable).  Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3161*14b4c544SIan Rogers        "UMask": "0x2",
3162*14b4c544SIan Rogers        "Unit": "UBOX"
3163*14b4c544SIan Rogers    },
3164*14b4c544SIan Rogers    {
3165*14b4c544SIan Rogers        "BriefDescription": "Filter Match",
3166*14b4c544SIan Rogers        "EventCode": "0x41",
3167*14b4c544SIan Rogers        "EventName": "UNC_U_FILTER_MATCH.ENABLE",
3168*14b4c544SIan Rogers        "PerPkg": "1",
3169*14b4c544SIan Rogers        "PublicDescription": "Filter match per thread (w/ or w/o Filter Enable).  Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3170*14b4c544SIan Rogers        "UMask": "0x1",
3171*14b4c544SIan Rogers        "Unit": "UBOX"
3172*14b4c544SIan Rogers    },
3173*14b4c544SIan Rogers    {
3174*14b4c544SIan Rogers        "BriefDescription": "Filter Match",
3175*14b4c544SIan Rogers        "EventCode": "0x41",
3176*14b4c544SIan Rogers        "EventName": "UNC_U_FILTER_MATCH.U2C_DISABLE",
3177*14b4c544SIan Rogers        "PerPkg": "1",
3178*14b4c544SIan Rogers        "PublicDescription": "Filter match per thread (w/ or w/o Filter Enable).  Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3179*14b4c544SIan Rogers        "UMask": "0x8",
3180*14b4c544SIan Rogers        "Unit": "UBOX"
3181*14b4c544SIan Rogers    },
3182*14b4c544SIan Rogers    {
3183*14b4c544SIan Rogers        "BriefDescription": "Filter Match",
3184*14b4c544SIan Rogers        "EventCode": "0x41",
3185*14b4c544SIan Rogers        "EventName": "UNC_U_FILTER_MATCH.U2C_ENABLE",
3186*14b4c544SIan Rogers        "PerPkg": "1",
3187*14b4c544SIan Rogers        "PublicDescription": "Filter match per thread (w/ or w/o Filter Enable).  Specify the thread to filter on using NCUPMONCTRLGLCTR.ThreadID.",
3188*14b4c544SIan Rogers        "UMask": "0x4",
3189*14b4c544SIan Rogers        "Unit": "UBOX"
3190*14b4c544SIan Rogers    },
3191*14b4c544SIan Rogers    {
3192*14b4c544SIan Rogers        "BriefDescription": "IDI Lock/SplitLock Cycles",
3193*14b4c544SIan Rogers        "EventCode": "0x44",
3194*14b4c544SIan Rogers        "EventName": "UNC_U_LOCK_CYCLES",
3195*14b4c544SIan Rogers        "PerPkg": "1",
3196*14b4c544SIan Rogers        "PublicDescription": "Number of times an IDI Lock/SplitLock sequence was started",
3197*14b4c544SIan Rogers        "Unit": "UBOX"
3198*14b4c544SIan Rogers    },
3199*14b4c544SIan Rogers    {
3200*14b4c544SIan Rogers        "BriefDescription": "Cycles PHOLD Assert to Ack; Assert to ACK",
3201*14b4c544SIan Rogers        "EventCode": "0x45",
3202*14b4c544SIan Rogers        "EventName": "UNC_U_PHOLD_CYCLES.ASSERT_TO_ACK",
3203*14b4c544SIan Rogers        "PerPkg": "1",
3204*14b4c544SIan Rogers        "PublicDescription": "PHOLD cycles.  Filter from source CoreID.",
3205*14b4c544SIan Rogers        "UMask": "0x1",
3206*14b4c544SIan Rogers        "Unit": "UBOX"
3207*14b4c544SIan Rogers    },
3208*14b4c544SIan Rogers    {
3209*14b4c544SIan Rogers        "BriefDescription": "RACU Request",
3210*14b4c544SIan Rogers        "EventCode": "0x46",
3211*14b4c544SIan Rogers        "EventName": "UNC_U_RACU_REQUESTS",
3212*14b4c544SIan Rogers        "PerPkg": "1",
3213*14b4c544SIan Rogers        "Unit": "UBOX"
3214*14b4c544SIan Rogers    },
3215*14b4c544SIan Rogers    {
3216*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; Correctable Machine Check",
3217*14b4c544SIan Rogers        "EventCode": "0x43",
3218*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.CMC",
3219*14b4c544SIan Rogers        "PerPkg": "1",
3220*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores",
3221*14b4c544SIan Rogers        "UMask": "0x10",
3222*14b4c544SIan Rogers        "Unit": "UBOX"
3223*14b4c544SIan Rogers    },
3224*14b4c544SIan Rogers    {
3225*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; Livelock",
3226*14b4c544SIan Rogers        "EventCode": "0x43",
3227*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.LIVELOCK",
3228*14b4c544SIan Rogers        "PerPkg": "1",
3229*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores; Filter by core",
3230*14b4c544SIan Rogers        "UMask": "0x4",
3231*14b4c544SIan Rogers        "Unit": "UBOX"
3232*14b4c544SIan Rogers    },
3233*14b4c544SIan Rogers    {
3234*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; LTError",
3235*14b4c544SIan Rogers        "EventCode": "0x43",
3236*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.LTERROR",
3237*14b4c544SIan Rogers        "PerPkg": "1",
3238*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores; Filter by core",
3239*14b4c544SIan Rogers        "UMask": "0x8",
3240*14b4c544SIan Rogers        "Unit": "UBOX"
3241*14b4c544SIan Rogers    },
3242*14b4c544SIan Rogers    {
3243*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; Monitor T0",
3244*14b4c544SIan Rogers        "EventCode": "0x43",
3245*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.MONITOR_T0",
3246*14b4c544SIan Rogers        "PerPkg": "1",
3247*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores; Filter by core",
3248*14b4c544SIan Rogers        "UMask": "0x1",
3249*14b4c544SIan Rogers        "Unit": "UBOX"
3250*14b4c544SIan Rogers    },
3251*14b4c544SIan Rogers    {
3252*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; Monitor T1",
3253*14b4c544SIan Rogers        "EventCode": "0x43",
3254*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.MONITOR_T1",
3255*14b4c544SIan Rogers        "PerPkg": "1",
3256*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores; Filter by core",
3257*14b4c544SIan Rogers        "UMask": "0x2",
3258*14b4c544SIan Rogers        "Unit": "UBOX"
3259*14b4c544SIan Rogers    },
3260*14b4c544SIan Rogers    {
3261*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; Other",
3262*14b4c544SIan Rogers        "EventCode": "0x43",
3263*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.OTHER",
3264*14b4c544SIan Rogers        "PerPkg": "1",
3265*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores; PREQ, PSMI, P2U, Thermal, PCUSMI, PMI",
3266*14b4c544SIan Rogers        "UMask": "0x80",
3267*14b4c544SIan Rogers        "Unit": "UBOX"
3268*14b4c544SIan Rogers    },
3269*14b4c544SIan Rogers    {
3270*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; Trap",
3271*14b4c544SIan Rogers        "EventCode": "0x43",
3272*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.TRAP",
3273*14b4c544SIan Rogers        "PerPkg": "1",
3274*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores",
3275*14b4c544SIan Rogers        "UMask": "0x40",
3276*14b4c544SIan Rogers        "Unit": "UBOX"
3277*14b4c544SIan Rogers    },
3278*14b4c544SIan Rogers    {
3279*14b4c544SIan Rogers        "BriefDescription": "Monitor Sent to T0; Uncorrectable Machine Check",
3280*14b4c544SIan Rogers        "EventCode": "0x43",
3281*14b4c544SIan Rogers        "EventName": "UNC_U_U2C_EVENTS.UMC",
3282*14b4c544SIan Rogers        "PerPkg": "1",
3283*14b4c544SIan Rogers        "PublicDescription": "Events coming from Uncore can be sent to one or all cores",
3284*14b4c544SIan Rogers        "UMask": "0x20",
3285*14b4c544SIan Rogers        "Unit": "UBOX"
32866b138c7bSAndi Kleen    }
32876b138c7bSAndi Kleen]
3288