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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dpll.c257 info->vco1.min_freq = nvbios_rd32(bios, data + 0); in nvbios_pll_parse()
258 info->vco1.max_freq = nvbios_rd32(bios, data + 4); in nvbios_pll_parse()
261 info->vco1.min_inputfreq = nvbios_rd32(bios, data + 16); in nvbios_pll_parse()
263 info->vco1.max_inputfreq = INT_MAX; in nvbios_pll_parse()
272 info->vco1.min_n = 0x5; in nvbios_pll_parse()
275 info->vco1.min_n = 0x1; in nvbios_pll_parse()
278 info->vco1.max_n = 0xff; in nvbios_pll_parse()
279 info->vco1.min_m = 0x1; in nvbios_pll_parse()
280 info->vco1.max_m = 0xd; in nvbios_pll_parse()
303 info->vco1.min_freq = nvbios_rd16(bios, data + 4) * 1000; in nvbios_pll_parse()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpllnv04.c41 int minvco = info->vco1.min_freq, maxvco = info->vco1.max_freq; in getMNP_single()
42 int minM = info->vco1.min_m, maxM = info->vco1.max_m; in getMNP_single()
43 int minN = info->vco1.min_n, maxN = info->vco1.max_n; in getMNP_single()
44 int minU = info->vco1.min_inputfreq; in getMNP_single()
45 int maxU = info->vco1.max_inputfreq; in getMNP_single()
140 int minvco1 = info->vco1.min_freq, maxvco1 = info->vco1.max_freq; in getMNP_double()
142 int minU1 = info->vco1.min_inputfreq, minU2 = info->vco2.min_inputfreq; in getMNP_double()
143 int maxU1 = info->vco1.max_inputfreq, maxU2 = info->vco2.max_inputfreq; in getMNP_double()
144 int minM1 = info->vco1.min_m, maxM1 = info->vco1.max_m; in getMNP_double()
145 int minN1 = info->vco1.min_n, maxN1 = info->vco1.max_n; in getMNP_double()
H A Dpllgt215.c36 *P = info->vco1.max_freq / freq; in gt215_pll_calc()
42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
43 lM = max(lM, (int)info->vco1.min_m); in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
45 hM = min(hM, (int)info->vco1.max_m); in gt215_pll_calc()
62 if (N < info->vco1.min_n) in gt215_pll_calc()
64 if (N > info->vco1.max_n) in gt215_pll_calc()
H A Dnv40.c135 if (khz < pll.vco1.max_freq) in nv40_clk_calc_pll()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Darm,syscon-icst.yaml69 - arm,impd1-vco1
101 vco1: clock {
102 compatible = "arm,impd1-vco1";
107 clock-output-names = "IM-PD1-VCO1";
/openbmc/linux/drivers/clk/imx/
H A Dclk-sscg-pll.c76 uint64_t vco1; member
135 temp_setup->vco2 = temp_setup->vco1; in clk_sscg_divq_lookup()
177 temp_setup->ref_div2 = temp_setup->vco1; in clk_sscg_divr2_lookup()
199 temp_setup->vco1 = ref; in clk_sscg_pll2_find_setup()
212 uint64_t vco1 = temp_setup->ref; in clk_sscg_divf1_lookup() local
214 do_div(vco1, temp_setup->divr1 + 1); in clk_sscg_divf1_lookup()
215 vco1 *= 2; in clk_sscg_divf1_lookup()
216 vco1 *= temp_setup->divf1 + 1; in clk_sscg_divf1_lookup()
218 ret = clk_sscg_pll2_find_setup(setup, temp_setup, vco1); in clk_sscg_divf1_lookup()
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_arria10.c81 { "vco1-denom", offsetof(struct mainpll_cfg, vco1_denom) },
82 { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) },
108 { "vco1-denom", offsetof(struct perpll_cfg, vco1_denom) },
109 { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) },
554 &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main()
559 main_cfg->vco1_numer, &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main()
584 &clock_manager_base->per_pll.vco1); in cm_pll_ramp_periph()
589 per_cfg->vco1_numer, &clock_manager_base->per_pll.vco1); in cm_pll_ramp_periph()
667 writel(CLKMGR_MAINPLL_VCO1_RESET, &clock_manager_base->main_pll.vco1); in cm_full_cfg()
668 writel(CLKMGR_PERPLL_VCO1_RESET, &clock_manager_base->per_pll.vco1); in cm_full_cfg()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi74 vco1-denom = <1>; /* Field: vco1.denom */
75 vco1-numer = <191>; /* Field: vco1.numer */
103 vco1-denom = <1>; /* Field: vco1.denom */
104 vco1-numer = <159>; /* Field: vco1.numer */
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dintegratorap-im-pd1.dts35 vco1: clock-controller@0 { label
36 compatible = "arm,impd1-vco1";
42 clock-output-names = "IM-PD1-VCO1";
247 clocks = <&vco1>, <&sysclk>;
/openbmc/linux/drivers/clk/socfpga/
H A Dclk-pll-s10.c47 /* read VCO1 reg for numerator and denominator */ in n5x_clk_pll_recalc_rate()
68 /* read VCO1 reg for numerator and denominator */ in agilex_clk_pll_recalc_rate()
91 /* read VCO1 reg for numerator and denominator */ in clk_pll_recalc_rate()
H A Dclk-pll-a10.c41 /* read VCO1 reg for numerator and denominator */ in clk_pll_recalc_rate()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h13 u32 vco1; member
40 u32 vco1; member
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h72 } vco1, vco2; member
/openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c272 if (pv.M1 >= pll_lim.vco1.min_m && pv.M1 <= pll_lim.vco1.max_m && in nouveau_hw_fix_bad_vpll()
273 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n && in nouveau_hw_fix_bad_vpll()
280 pv.M1 = pll_lim.vco1.max_m; in nouveau_hw_fix_bad_vpll()
281 pv.N1 = pll_lim.vco1.min_n; in nouveau_hw_fix_bad_vpll()
H A Dcrtc.c139 * assumed the threshold is given by vco1 maxfreq/2 in nv_crtc_calc_state_ext()
146 if (drm->client.device.info.chipset > 0x40 && dot_clock <= (pll_lim.vco1.max_freq / 2)) in nv_crtc_calc_state_ext()
/openbmc/linux/include/linux/platform_data/
H A Dsi5351.h25 * @SI5351_MULTISYNTH_SRC_VCO1: multisynth source clock is VCO1/VXCO
/openbmc/u-boot/drivers/clk/altera/
H A Dclk-arria10.c131 reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ in socfpga_a10_clk_get_rate()
139 reg = readl(plat->regs + plat->ctl_reg + 4); /* VCO1 */ in socfpga_a10_clk_get_rate()
/openbmc/linux/drivers/clk/versatile/
H A Dclk-impd1.c79 if (of_device_is_compatible(np, "arm,impd1-vco1")) { in integrator_impd1_clk_spawn()
/openbmc/linux/include/linux/iio/frequency/
H A Dad9523.h131 * @pll2_vco_div_m1: VCO1 divider, range 3..5.
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dst,stm32h7-rcc.txt45 vco1@58024430 {
/openbmc/linux/drivers/clk/
H A Dclk-stm32h7.c661 { "vco1", "pllsrc", CLK_IGNORE_UNUSED, &stm32h7_pll1 },
956 M_ODF_F("pll1_p", "vco1", RCC_PLLCFGR, 16, RCC_PLL1DIVR, 9, 7,
958 M_ODF_F("pll1_q", "vco1", RCC_PLLCFGR, 17, RCC_PLL1DIVR, 16, 7,
960 M_ODF_F("pll1_r", "vco1", RCC_PLLCFGR, 18, RCC_PLL1DIVR, 24, 7,
H A Dclk-lmk04832.c190 * @vco1_range: {min, max} of the VCO1 operating range (in MHz)
/openbmc/linux/drivers/media/i2c/
H A Dar0521.c294 * - mclk -> / pre_div1 * pre_mul1 = VCO1 = COUNTER_CLOCK in ar0521_calc_pll()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgk104.c1052 ram->mode = (next->freq > fuc->refpll.vco1.max_freq) ? 2 : 1; in gk104_ram_calc_xits()