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Searched +full:uniphier +full:- +full:ld20 +full:- +full:reset (Results 1 – 25 of 31) sorted by relevance

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/openbmc/u-boot/arch/arm/dts/
H A Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
15 compatible = "socionext,uniphier-ld20";
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&gic>;
[all …]
H A Duniphier-ld20-global.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 Global Board
5 // Copyright (C) 2015-2017 Socionext Inc.
9 /dts-v1/;
10 #include <dt-bindings/gpio/uniphier-gpio.h>
11 #include "uniphier-ld20.dtsi"
14 model = "UniPhier LD20 Global Board (REF_LD20_GP)";
15 compatible = "socionext,uniphier-ld20-global",
16 "socionext,uniphier-ld20";
19 stdout-path = "serial0:115200n8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dsocionext,uniphier-reset.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier reset controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - description: System reset
17 - socionext,uniphier-ld4-reset
18 - socionext,uniphier-pro4-reset
19 - socionext,uniphier-sld8-reset
[all …]
H A Dsocionext,uniphier-glue-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-glue-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier peripheral core reset in glue layer
10 Some peripheral core reset belongs to its own glue layer. Before using
11 this core reset, it is necessary to control the clocks and resets to
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-reset
22 - socionext,uniphier-pro5-usb3-reset
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/socionext/
H A Dsocionext,uniphier-dwc3-glue.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC DWC3 USB3.0 glue layer
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is
20 - enum:
21 - socionext,uniphier-pro4-dwc3-glue
22 - socionext,uniphier-pro5-dwc3-glue
[all …]
H A Dsocionext,uniphier-sysctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier system controller
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 System controller implemented on Socionext UniPhier SoCs has multiple
14 functions such as clock control, reset control, internal watchdog timer,
20 - enum:
21 - socionext,uniphier-ld4-sysctrl
[all …]
H A Dsocionext,uniphier-sdctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sdctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SD interface logic
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 SD interface logic implemented on Socionext UniPhier SoCs is
15 clock control, reset control, mode switch, and so on.
20 - enum:
21 - socionext,uniphier-pro5-sdctrl
[all …]
H A Dsocionext,uniphier-perictrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier peripheral block controller
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 Peripheral block implemented on Socionext UniPhier SoCs is an integrated
20 - enum:
21 - socionext,uniphier-ld4-perictrl
22 - socionext,uniphier-pro4-perictrl
[all …]
H A Dsocionext,uniphier-adamv.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-adamv.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier ADAMV block
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 ADAMV block implemented on Socionext UniPhier SoCs is an analog signal
16 This block is defined for controlling audio I/O reset only.
21 - enum:
22 - socionext,uniphier-ld11-adamv
[all …]
/openbmc/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 SoC
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-ld20";
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
H A Duniphier-ld20-global.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 // Device Tree Source for UniPhier LD20 Global Board
5 // Copyright (C) 2015-2017 Socionext Inc.
9 /dts-v1/;
10 #include <dt-bindings/gpio/uniphier-gpio.h>
11 #include "uniphier-ld20.dtsi"
14 model = "UniPhier LD20 Global Board (REF_LD20_GP)";
15 compatible = "socionext,uniphier-ld20-global",
16 "socionext,uniphier-ld20";
19 stdout-path = "serial0:115200n8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dsocionext,uniphier-usb3hs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3hs-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 High-Speed (HS) PHY
11 USB3 controller implemented on Socionext UniPhier SoCs.
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about High-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro5-usb3-hsphy
[all …]
H A Dsocionext,uniphier-usb3ss-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 Super-Speed (SS) PHY
11 USB3 controller implemented on Socionext UniPhier SoCs.
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about Super-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-ssphy
[all …]
H A Dsocionext,uniphier-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier PCIe PHY
11 PCIe controller implemented on Socionext UniPhier SoCs.
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - socionext,uniphier-pro5-pcie-phy
20 - socionext,uniphier-ld20-pcie-phy
21 - socionext,uniphier-pxs3-pcie-phy
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dsocionext,uniphier-aio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/sound/socionext,uniphier-aio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier AIO audio system
10 - <alsa-devel@alsa-project.org>
13 - $ref: dai-common.yaml#
18 - socionext,uniphier-ld11-aio
19 - socionext,uniphier-ld20-aio
20 - socionext,uniphier-pxs2-aio
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dsocionext,uniphier-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/socionext,uniphier-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier regulator controller
15 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
22 - socionext,uniphier-pro4-usb3-regulator
23 - socionext,uniphier-pro5-usb3-regulator
24 - socionext,uniphier-pxs2-usb3-regulator
25 - socionext,uniphier-ld20-usb3-regulator
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dsocionext,uniphier-ave4.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/socionext,uniphier-ave4.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
14 implemented on Socionext UniPhier SoCs.
19 - socionext,uniphier-pro4-ave4
20 - socionext,uniphier-pxs2-ave4
21 - socionext,uniphier-ld11-ave4
22 - socionext,uniphier-ld20-ave4
[all …]
/openbmc/u-boot/drivers/reset/
H A Dreset-uniphier.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <reset-uclass.h>
22 #define UNIPHIER_RESET_ID_END (unsigned int)(-1)
42 /* System reset data */
59 UNIPHIER_RESETX(16, 0x2014, 4), /* USB30-PHY0 */
60 UNIPHIER_RESETX(17, 0x2014, 0), /* USB30-PHY1 */
61 UNIPHIER_RESETX(18, 0x2014, 2), /* USB30-PHY2 */
62 UNIPHIER_RESETX(20, 0x2014, 5), /* USB31-PHY0 */
63 UNIPHIER_RESETX(21, 0x2014, 1), /* USB31-PHY1 */
65 UNIPHIER_RESET(29, 0x2014, 8), /* SATA-PHY (active high) */
[all …]
/openbmc/u-boot/doc/
H A DREADME.uniphier1 U-Boot for UniPhier SoC family
6 ----------------------
8 The UniPhier platform is well tested with Linaro toolchains.
9 You can download pre-built toolchains from:
15 ------------------
20 $ make CROSS_COMPILE=<toolchain-prefix> DEVICE_TREE=<device-tree>
22 The recommended <toolchain-prefix> is `arm-linux-gnueabihf-` for 32bit SoCs,
23 `aarch64-linux-gnu-` for 64bit SoCs, but you may wish to change it to use your
26 The following tables show <defconfig> and <device-tree> for each board.
30 Board | <defconfig> | <device-tree>
[all …]
/openbmc/linux/drivers/reset/
H A Dreset-uniphier.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <linux/reset-controller.h>
22 #define UNIPHIER_RESET_ID_END ((unsigned int)(-1))
42 /* System reset data */
58 UNIPHIER_RESETX(30, 0x2000, 19), /* SATA-PHY */
80 UNIPHIER_RESETX(16, 0x2014, 4), /* USB30-PHY0 */
81 UNIPHIER_RESETX(17, 0x2014, 0), /* USB30-PHY1 */
82 UNIPHIER_RESETX(18, 0x2014, 2), /* USB30-PHY2 */
83 UNIPHIER_RESETX(20, 0x2014, 5), /* USB31-PHY0 */
84 UNIPHIER_RESETX(21, 0x2014, 1), /* USB31-PHY1 */
[all …]
H A Dreset-uniphier-glue.c1 // SPDX-License-Identifier: GPL-2.0
3 // reset-uniphier-glue.c - Glue layer reset driver for UniPhier
11 #include <linux/reset.h>
12 #include <linux/reset/reset-simple.h>
35 clk_bulk_disable_unprepare(priv->data->nclks, priv->clk); in uniphier_clk_disable()
42 reset_control_bulk_assert(priv->data->nrsts, priv->rst); in uniphier_rst_assert()
47 struct device *dev = &pdev->dev; in uniphier_glue_reset_probe()
54 return -ENOMEM; in uniphier_glue_reset_probe()
56 priv->data = of_device_get_match_data(dev); in uniphier_glue_reset_probe()
57 if (WARN_ON(!priv->data || priv->data->nclks > MAX_CLKS || in uniphier_glue_reset_probe()
[all …]
/openbmc/u-boot/arch/arm/mach-uniphier/
H A DKconfig4 default "uniphier"
14 prompt "UniPhier SoC select"
18 bool "UniPhier LD4/sLD8 SoCs"
22 bool "UniPhier Pro4/Pro5/PXs2/LD6b SoCs"
26 bool "UniPhier V8 SoCs"
34 bool "Enable UniPhier LD4 SoC support"
39 bool "Enable UniPhier sLD8 SoC support"
44 bool "Enable UniPhier Pro4 SoC support"
49 bool "Enable UniPhier Pro5 SoC support"
54 bool "Enable UniPhier Pxs2 SoC support"
[all …]
/openbmc/linux/drivers/regulator/
H A Duniphier-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 // Regulator controller driver for UniPhier SoC
15 #include <linux/reset.h>
43 struct device *dev = &pdev->dev; in uniphier_regulator_probe()
54 return -ENOMEM; in uniphier_regulator_probe()
56 priv->data = of_device_get_match_data(dev); in uniphier_regulator_probe()
57 if (WARN_ON(!priv->data)) in uniphier_regulator_probe()
58 return -EINVAL; in uniphier_regulator_probe()
64 for (i = 0; i < priv->data->nclks; i++) in uniphier_regulator_probe()
65 priv->clk[i].id = priv->data->clock_names[i]; in uniphier_regulator_probe()
[all …]
/openbmc/linux/drivers/phy/socionext/
H A Dphy-uniphier-pcie.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-uniphier-pcie.c - PHY driver for UniPhier PCIe controller
18 #include <linux/reset.h>
80 writel(data, priv->base + PCL_PHY_TEST_I); in uniphier_pciephy_testio_write()
81 readl(priv->base + PCL_PHY_TEST_O); in uniphier_pciephy_testio_write()
82 readl(priv->base + PCL_PHY_TEST_O); in uniphier_pciephy_testio_write()
87 u32 val = readl(priv->base + PCL_PHY_TEST_O); in uniphier_pciephy_testio_read()
126 val = readl(priv->base + PCL_PHY_RESET); in uniphier_pciephy_assert()
129 writel(val, priv->base + PCL_PHY_RESET); in uniphier_pciephy_assert()
136 val = readl(priv->base + PCL_PHY_RESET); in uniphier_pciephy_deassert()
[all …]
H A Dphy-uniphier-usb3ss.c1 // SPDX-License-Identifier: GPL-2.0
3 * phy-uniphier-usb3ss.c - SS-PHY driver for Socionext UniPhier USB3 controller
4 * Copyright 2015-2018 Socionext Inc.
22 #include <linux/reset.h>
73 writel(data, priv->base + SSPHY_TESTI); in uniphier_u3ssphy_testio_write()
74 readl(priv->base + SSPHY_TESTO); in uniphier_u3ssphy_testio_write()
75 readl(priv->base + SSPHY_TESTO); in uniphier_u3ssphy_testio_write()
82 u8 field_mask = GENMASK(p->field.msb, p->field.lsb); in uniphier_u3ssphy_set_param()
87 val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no); in uniphier_u3ssphy_set_param()
89 val = readl(priv->base + SSPHY_TESTO) & TESTO_DAT_MASK; in uniphier_u3ssphy_set_param()
[all …]

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