1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
254e991b5SMasahiro Yamada /*
354e991b5SMasahiro Yamada * Copyright (C) 2016 Socionext Inc.
454e991b5SMasahiro Yamada * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
554e991b5SMasahiro Yamada */
654e991b5SMasahiro Yamada
754e991b5SMasahiro Yamada #include <linux/mfd/syscon.h>
854e991b5SMasahiro Yamada #include <linux/module.h>
954e991b5SMasahiro Yamada #include <linux/of.h>
1054e991b5SMasahiro Yamada #include <linux/platform_device.h>
1154e991b5SMasahiro Yamada #include <linux/regmap.h>
1254e991b5SMasahiro Yamada #include <linux/reset-controller.h>
1354e991b5SMasahiro Yamada
1454e991b5SMasahiro Yamada struct uniphier_reset_data {
1554e991b5SMasahiro Yamada unsigned int id;
1654e991b5SMasahiro Yamada unsigned int reg;
1754e991b5SMasahiro Yamada unsigned int bit;
1854e991b5SMasahiro Yamada unsigned int flags;
1954e991b5SMasahiro Yamada #define UNIPHIER_RESET_ACTIVE_LOW BIT(0)
2054e991b5SMasahiro Yamada };
2154e991b5SMasahiro Yamada
22b19a5aecSPhilipp Zabel #define UNIPHIER_RESET_ID_END ((unsigned int)(-1))
2354e991b5SMasahiro Yamada
2454e991b5SMasahiro Yamada #define UNIPHIER_RESET_END \
2554e991b5SMasahiro Yamada { .id = UNIPHIER_RESET_ID_END }
2654e991b5SMasahiro Yamada
2754e991b5SMasahiro Yamada #define UNIPHIER_RESET(_id, _reg, _bit) \
2854e991b5SMasahiro Yamada { \
2954e991b5SMasahiro Yamada .id = (_id), \
3054e991b5SMasahiro Yamada .reg = (_reg), \
3154e991b5SMasahiro Yamada .bit = (_bit), \
3254e991b5SMasahiro Yamada }
3354e991b5SMasahiro Yamada
3454e991b5SMasahiro Yamada #define UNIPHIER_RESETX(_id, _reg, _bit) \
3554e991b5SMasahiro Yamada { \
3654e991b5SMasahiro Yamada .id = (_id), \
3754e991b5SMasahiro Yamada .reg = (_reg), \
3854e991b5SMasahiro Yamada .bit = (_bit), \
3954e991b5SMasahiro Yamada .flags = UNIPHIER_RESET_ACTIVE_LOW, \
4054e991b5SMasahiro Yamada }
4154e991b5SMasahiro Yamada
4254e991b5SMasahiro Yamada /* System reset data */
435281036aSMasahiro Yamada static const struct uniphier_reset_data uniphier_ld4_sys_reset_data[] = {
445281036aSMasahiro Yamada UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
455281036aSMasahiro Yamada UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (Ether, HSC, MIO) */
4654e991b5SMasahiro Yamada UNIPHIER_RESET_END,
4754e991b5SMasahiro Yamada };
4854e991b5SMasahiro Yamada
49716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = {
505281036aSMasahiro Yamada UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
514c05c4a5SKunihiko Hayashi UNIPHIER_RESETX(6, 0x2000, 12), /* Ether */
525281036aSMasahiro Yamada UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, MIO, RLE) */
53dec173ccSMasahiro Yamada UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */
54dec173ccSMasahiro Yamada UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */
55dec173ccSMasahiro Yamada UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */
5678636717SKunihiko Hayashi UNIPHIER_RESETX(28, 0x2000, 18), /* SATA0 */
5778636717SKunihiko Hayashi UNIPHIER_RESETX(29, 0x2004, 18), /* SATA1 */
5878636717SKunihiko Hayashi UNIPHIER_RESETX(30, 0x2000, 19), /* SATA-PHY */
59b06b631cSKatsuhiro Suzuki UNIPHIER_RESETX(40, 0x2000, 13), /* AIO */
6054e991b5SMasahiro Yamada UNIPHIER_RESET_END,
6154e991b5SMasahiro Yamada };
6254e991b5SMasahiro Yamada
63716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = {
645281036aSMasahiro Yamada UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
655281036aSMasahiro Yamada UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC) */
66dec173ccSMasahiro Yamada UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (PCIe, USB3) */
67dec173ccSMasahiro Yamada UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */
68dec173ccSMasahiro Yamada UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */
69fdc0f235SKunihiko Hayashi UNIPHIER_RESETX(24, 0x2008, 2), /* PCIe */
70b06b631cSKatsuhiro Suzuki UNIPHIER_RESETX(40, 0x2000, 13), /* AIO */
7154e991b5SMasahiro Yamada UNIPHIER_RESET_END,
7254e991b5SMasahiro Yamada };
7354e991b5SMasahiro Yamada
74716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = {
755281036aSMasahiro Yamada UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */
764c05c4a5SKunihiko Hayashi UNIPHIER_RESETX(6, 0x2000, 12), /* Ether */
775281036aSMasahiro Yamada UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, RLE) */
78dec173ccSMasahiro Yamada UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */
79dec173ccSMasahiro Yamada UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */
8054e991b5SMasahiro Yamada UNIPHIER_RESETX(16, 0x2014, 4), /* USB30-PHY0 */
8154e991b5SMasahiro Yamada UNIPHIER_RESETX(17, 0x2014, 0), /* USB30-PHY1 */
8254e991b5SMasahiro Yamada UNIPHIER_RESETX(18, 0x2014, 2), /* USB30-PHY2 */
8354e991b5SMasahiro Yamada UNIPHIER_RESETX(20, 0x2014, 5), /* USB31-PHY0 */
8454e991b5SMasahiro Yamada UNIPHIER_RESETX(21, 0x2014, 1), /* USB31-PHY1 */
8554e991b5SMasahiro Yamada UNIPHIER_RESETX(28, 0x2014, 12), /* SATA */
8678636717SKunihiko Hayashi UNIPHIER_RESET(30, 0x2014, 8), /* SATA-PHY (active high) */
87b06b631cSKatsuhiro Suzuki UNIPHIER_RESETX(40, 0x2000, 13), /* AIO */
8854e991b5SMasahiro Yamada UNIPHIER_RESET_END,
8954e991b5SMasahiro Yamada };
9054e991b5SMasahiro Yamada
91716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_ld11_sys_reset_data[] = {
92dec173ccSMasahiro Yamada UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */
93dec173ccSMasahiro Yamada UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */
944c05c4a5SKunihiko Hayashi UNIPHIER_RESETX(6, 0x200c, 6), /* Ether */
95dec173ccSMasahiro Yamada UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC (HSC, MIO) */
96d7bab65bSKatsuhiro Suzuki UNIPHIER_RESETX(9, 0x200c, 9), /* HSC */
9794e10c22SKatsuhiro Suzuki UNIPHIER_RESETX(40, 0x2008, 0), /* AIO */
9894e10c22SKatsuhiro Suzuki UNIPHIER_RESETX(41, 0x2008, 1), /* EVEA */
990f195435SKatsuhiro Suzuki UNIPHIER_RESETX(42, 0x2010, 2), /* EXIV */
10054e991b5SMasahiro Yamada UNIPHIER_RESET_END,
10154e991b5SMasahiro Yamada };
10254e991b5SMasahiro Yamada
103716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = {
104dec173ccSMasahiro Yamada UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */
105dec173ccSMasahiro Yamada UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */
1064c05c4a5SKunihiko Hayashi UNIPHIER_RESETX(6, 0x200c, 6), /* Ether */
107dec173ccSMasahiro Yamada UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC (HSC) */
108d7bab65bSKatsuhiro Suzuki UNIPHIER_RESETX(9, 0x200c, 9), /* HSC */
109e6914365SMasahiro Yamada UNIPHIER_RESETX(14, 0x200c, 5), /* USB30 */
11054e991b5SMasahiro Yamada UNIPHIER_RESETX(16, 0x200c, 12), /* USB30-PHY0 */
11154e991b5SMasahiro Yamada UNIPHIER_RESETX(17, 0x200c, 13), /* USB30-PHY1 */
11254e991b5SMasahiro Yamada UNIPHIER_RESETX(18, 0x200c, 14), /* USB30-PHY2 */
11354e991b5SMasahiro Yamada UNIPHIER_RESETX(19, 0x200c, 15), /* USB30-PHY3 */
114fdc0f235SKunihiko Hayashi UNIPHIER_RESETX(24, 0x200c, 4), /* PCIe */
11594e10c22SKatsuhiro Suzuki UNIPHIER_RESETX(40, 0x2008, 0), /* AIO */
11694e10c22SKatsuhiro Suzuki UNIPHIER_RESETX(41, 0x2008, 1), /* EVEA */
1170f195435SKatsuhiro Suzuki UNIPHIER_RESETX(42, 0x2010, 2), /* EXIV */
11854e991b5SMasahiro Yamada UNIPHIER_RESET_END,
11954e991b5SMasahiro Yamada };
12054e991b5SMasahiro Yamada
1212a158f88SMasahiro Yamada static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = {
1222a158f88SMasahiro Yamada UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */
1232a158f88SMasahiro Yamada UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */
1245573fe85SKunihiko Hayashi UNIPHIER_RESETX(6, 0x200c, 9), /* Ether0 */
1255573fe85SKunihiko Hayashi UNIPHIER_RESETX(7, 0x200c, 10), /* Ether1 */
1262a158f88SMasahiro Yamada UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */
127e6914365SMasahiro Yamada UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link */
128e6914365SMasahiro Yamada UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link */
1292a158f88SMasahiro Yamada UNIPHIER_RESETX(16, 0x200c, 16), /* USB30-PHY0 */
1302a158f88SMasahiro Yamada UNIPHIER_RESETX(17, 0x200c, 18), /* USB30-PHY1 */
1312a158f88SMasahiro Yamada UNIPHIER_RESETX(18, 0x200c, 20), /* USB30-PHY2 */
1322a158f88SMasahiro Yamada UNIPHIER_RESETX(20, 0x200c, 17), /* USB31-PHY0 */
1332a158f88SMasahiro Yamada UNIPHIER_RESETX(21, 0x200c, 19), /* USB31-PHY1 */
134fdc0f235SKunihiko Hayashi UNIPHIER_RESETX(24, 0x200c, 3), /* PCIe */
13578636717SKunihiko Hayashi UNIPHIER_RESETX(28, 0x200c, 7), /* SATA0 */
13678636717SKunihiko Hayashi UNIPHIER_RESETX(29, 0x200c, 8), /* SATA1 */
13778636717SKunihiko Hayashi UNIPHIER_RESETX(30, 0x200c, 21), /* SATA-PHY */
138300d2475SKunihiko Hayashi UNIPHIER_RESETX(40, 0x2008, 0), /* AIO */
139300d2475SKunihiko Hayashi UNIPHIER_RESETX(42, 0x2010, 2), /* EXIV */
1402a158f88SMasahiro Yamada UNIPHIER_RESET_END,
1412a158f88SMasahiro Yamada };
1422a158f88SMasahiro Yamada
143*3440b8faSKunihiko Hayashi static const struct uniphier_reset_data uniphier_nx1_sys_reset_data[] = {
144*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(4, 0x2008, 8), /* eMMC */
145*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(6, 0x200c, 0), /* Ether */
146*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(12, 0x200c, 16), /* USB30 link */
147*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(16, 0x200c, 24), /* USB30-PHY0 */
148*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(17, 0x200c, 25), /* USB30-PHY1 */
149*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(18, 0x200c, 26), /* USB30-PHY2 */
150*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(24, 0x200c, 8), /* PCIe */
151*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(52, 0x2010, 0), /* VOC */
152*3440b8faSKunihiko Hayashi UNIPHIER_RESETX(58, 0x2010, 8), /* HDMI-Tx */
153*3440b8faSKunihiko Hayashi UNIPHIER_RESET_END,
154*3440b8faSKunihiko Hayashi };
155*3440b8faSKunihiko Hayashi
15654e991b5SMasahiro Yamada /* Media I/O reset data */
15754e991b5SMasahiro Yamada #define UNIPHIER_MIO_RESET_SD(id, ch) \
15854e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 0)
15954e991b5SMasahiro Yamada
16054e991b5SMasahiro Yamada #define UNIPHIER_MIO_RESET_SD_BRIDGE(id, ch) \
16154e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 26)
16254e991b5SMasahiro Yamada
16354e991b5SMasahiro Yamada #define UNIPHIER_MIO_RESET_EMMC_HW_RESET(id, ch) \
16454e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x80 + 0x200 * (ch), 0)
16554e991b5SMasahiro Yamada
16654e991b5SMasahiro Yamada #define UNIPHIER_MIO_RESET_USB2(id, ch) \
16754e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x114 + 0x200 * (ch), 0)
16854e991b5SMasahiro Yamada
16954e991b5SMasahiro Yamada #define UNIPHIER_MIO_RESET_USB2_BRIDGE(id, ch) \
17054e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 24)
17154e991b5SMasahiro Yamada
17254e991b5SMasahiro Yamada #define UNIPHIER_MIO_RESET_DMAC(id) \
17354e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x110, 17)
17454e991b5SMasahiro Yamada
1755281036aSMasahiro Yamada static const struct uniphier_reset_data uniphier_ld4_mio_reset_data[] = {
17654e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD(0, 0),
17754e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD(1, 1),
17854e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD(2, 2),
17954e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD_BRIDGE(3, 0),
18054e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD_BRIDGE(4, 1),
18154e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD_BRIDGE(5, 2),
18254e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_EMMC_HW_RESET(6, 1),
18354e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_DMAC(7),
18454e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_USB2(8, 0),
18554e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_USB2(9, 1),
18654e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_USB2(10, 2),
18754e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_USB2_BRIDGE(12, 0),
18854e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_USB2_BRIDGE(13, 1),
18954e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_USB2_BRIDGE(14, 2),
19054e991b5SMasahiro Yamada UNIPHIER_RESET_END,
19154e991b5SMasahiro Yamada };
19254e991b5SMasahiro Yamada
193716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_pro5_sd_reset_data[] = {
19454e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD(0, 0),
19554e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_SD(1, 1),
19654e991b5SMasahiro Yamada UNIPHIER_MIO_RESET_EMMC_HW_RESET(6, 1),
19754e991b5SMasahiro Yamada UNIPHIER_RESET_END,
19854e991b5SMasahiro Yamada };
19954e991b5SMasahiro Yamada
20054e991b5SMasahiro Yamada /* Peripheral reset data */
20154e991b5SMasahiro Yamada #define UNIPHIER_PERI_RESET_UART(id, ch) \
20254e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x114, 19 + (ch))
20354e991b5SMasahiro Yamada
20454e991b5SMasahiro Yamada #define UNIPHIER_PERI_RESET_I2C(id, ch) \
20554e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x114, 5 + (ch))
20654e991b5SMasahiro Yamada
20754e991b5SMasahiro Yamada #define UNIPHIER_PERI_RESET_FI2C(id, ch) \
20854e991b5SMasahiro Yamada UNIPHIER_RESETX((id), 0x114, 24 + (ch))
20954e991b5SMasahiro Yamada
210f4aec227SKunihiko Hayashi #define UNIPHIER_PERI_RESET_SCSSI(id, ch) \
211f4aec227SKunihiko Hayashi UNIPHIER_RESETX((id), 0x110, 17 + (ch))
2126b39fd59SKunihiko Hayashi
2136b39fd59SKunihiko Hayashi #define UNIPHIER_PERI_RESET_MCSSI(id) \
2146b39fd59SKunihiko Hayashi UNIPHIER_RESETX((id), 0x114, 14)
2156b39fd59SKunihiko Hayashi
216716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_ld4_peri_reset_data[] = {
21754e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(0, 0),
21854e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(1, 1),
21954e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(2, 2),
22054e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(3, 3),
22154e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_I2C(4, 0),
22254e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_I2C(5, 1),
22354e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_I2C(6, 2),
22454e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_I2C(7, 3),
22554e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_I2C(8, 4),
226f4aec227SKunihiko Hayashi UNIPHIER_PERI_RESET_SCSSI(11, 0),
22754e991b5SMasahiro Yamada UNIPHIER_RESET_END,
22854e991b5SMasahiro Yamada };
22954e991b5SMasahiro Yamada
230716adfe3SWei Yongjun static const struct uniphier_reset_data uniphier_pro4_peri_reset_data[] = {
23154e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(0, 0),
23254e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(1, 1),
23354e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(2, 2),
23454e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_UART(3, 3),
23554e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_FI2C(4, 0),
23654e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_FI2C(5, 1),
23754e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_FI2C(6, 2),
23854e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_FI2C(7, 3),
23954e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_FI2C(8, 4),
24054e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_FI2C(9, 5),
24154e991b5SMasahiro Yamada UNIPHIER_PERI_RESET_FI2C(10, 6),
242f4aec227SKunihiko Hayashi UNIPHIER_PERI_RESET_SCSSI(11, 0),
243f4aec227SKunihiko Hayashi UNIPHIER_PERI_RESET_SCSSI(12, 1),
244f4aec227SKunihiko Hayashi UNIPHIER_PERI_RESET_SCSSI(13, 2),
245f4aec227SKunihiko Hayashi UNIPHIER_PERI_RESET_SCSSI(14, 3),
246f4aec227SKunihiko Hayashi UNIPHIER_PERI_RESET_MCSSI(15),
24754e991b5SMasahiro Yamada UNIPHIER_RESET_END,
24854e991b5SMasahiro Yamada };
24954e991b5SMasahiro Yamada
250ac0c735aSKatsuhiro Suzuki /* Analog signal amplifiers reset data */
251ac0c735aSKatsuhiro Suzuki static const struct uniphier_reset_data uniphier_ld11_adamv_reset_data[] = {
252ac0c735aSKatsuhiro Suzuki UNIPHIER_RESETX(0, 0x10, 6), /* EVEA */
253ac0c735aSKatsuhiro Suzuki UNIPHIER_RESET_END,
254ac0c735aSKatsuhiro Suzuki };
255ac0c735aSKatsuhiro Suzuki
25654e991b5SMasahiro Yamada /* core implementaton */
25754e991b5SMasahiro Yamada struct uniphier_reset_priv {
25854e991b5SMasahiro Yamada struct reset_controller_dev rcdev;
25954e991b5SMasahiro Yamada struct device *dev;
26054e991b5SMasahiro Yamada struct regmap *regmap;
26154e991b5SMasahiro Yamada const struct uniphier_reset_data *data;
26254e991b5SMasahiro Yamada };
26354e991b5SMasahiro Yamada
26454e991b5SMasahiro Yamada #define to_uniphier_reset_priv(_rcdev) \
26554e991b5SMasahiro Yamada container_of(_rcdev, struct uniphier_reset_priv, rcdev)
26654e991b5SMasahiro Yamada
uniphier_reset_update(struct reset_controller_dev * rcdev,unsigned long id,int assert)26754e991b5SMasahiro Yamada static int uniphier_reset_update(struct reset_controller_dev *rcdev,
26854e991b5SMasahiro Yamada unsigned long id, int assert)
26954e991b5SMasahiro Yamada {
27054e991b5SMasahiro Yamada struct uniphier_reset_priv *priv = to_uniphier_reset_priv(rcdev);
27154e991b5SMasahiro Yamada const struct uniphier_reset_data *p;
27254e991b5SMasahiro Yamada
27354e991b5SMasahiro Yamada for (p = priv->data; p->id != UNIPHIER_RESET_ID_END; p++) {
27454e991b5SMasahiro Yamada unsigned int mask, val;
27554e991b5SMasahiro Yamada
27654e991b5SMasahiro Yamada if (p->id != id)
27754e991b5SMasahiro Yamada continue;
27854e991b5SMasahiro Yamada
27954e991b5SMasahiro Yamada mask = BIT(p->bit);
28054e991b5SMasahiro Yamada
28154e991b5SMasahiro Yamada if (assert)
28254e991b5SMasahiro Yamada val = mask;
28354e991b5SMasahiro Yamada else
28454e991b5SMasahiro Yamada val = ~mask;
28554e991b5SMasahiro Yamada
28654e991b5SMasahiro Yamada if (p->flags & UNIPHIER_RESET_ACTIVE_LOW)
28754e991b5SMasahiro Yamada val = ~val;
28854e991b5SMasahiro Yamada
28954e991b5SMasahiro Yamada return regmap_write_bits(priv->regmap, p->reg, mask, val);
29054e991b5SMasahiro Yamada }
29154e991b5SMasahiro Yamada
29254e991b5SMasahiro Yamada dev_err(priv->dev, "reset_id=%lu was not handled\n", id);
29354e991b5SMasahiro Yamada return -EINVAL;
29454e991b5SMasahiro Yamada }
29554e991b5SMasahiro Yamada
uniphier_reset_assert(struct reset_controller_dev * rcdev,unsigned long id)29654e991b5SMasahiro Yamada static int uniphier_reset_assert(struct reset_controller_dev *rcdev,
29754e991b5SMasahiro Yamada unsigned long id)
29854e991b5SMasahiro Yamada {
29954e991b5SMasahiro Yamada return uniphier_reset_update(rcdev, id, 1);
30054e991b5SMasahiro Yamada }
30154e991b5SMasahiro Yamada
uniphier_reset_deassert(struct reset_controller_dev * rcdev,unsigned long id)30254e991b5SMasahiro Yamada static int uniphier_reset_deassert(struct reset_controller_dev *rcdev,
30354e991b5SMasahiro Yamada unsigned long id)
30454e991b5SMasahiro Yamada {
30554e991b5SMasahiro Yamada return uniphier_reset_update(rcdev, id, 0);
30654e991b5SMasahiro Yamada }
30754e991b5SMasahiro Yamada
uniphier_reset_status(struct reset_controller_dev * rcdev,unsigned long id)30854e991b5SMasahiro Yamada static int uniphier_reset_status(struct reset_controller_dev *rcdev,
30954e991b5SMasahiro Yamada unsigned long id)
31054e991b5SMasahiro Yamada {
31154e991b5SMasahiro Yamada struct uniphier_reset_priv *priv = to_uniphier_reset_priv(rcdev);
31254e991b5SMasahiro Yamada const struct uniphier_reset_data *p;
31354e991b5SMasahiro Yamada
31454e991b5SMasahiro Yamada for (p = priv->data; p->id != UNIPHIER_RESET_ID_END; p++) {
31554e991b5SMasahiro Yamada unsigned int val;
31654e991b5SMasahiro Yamada int ret, asserted;
31754e991b5SMasahiro Yamada
31854e991b5SMasahiro Yamada if (p->id != id)
31954e991b5SMasahiro Yamada continue;
32054e991b5SMasahiro Yamada
32154e991b5SMasahiro Yamada ret = regmap_read(priv->regmap, p->reg, &val);
32254e991b5SMasahiro Yamada if (ret)
32354e991b5SMasahiro Yamada return ret;
32454e991b5SMasahiro Yamada
32554e991b5SMasahiro Yamada asserted = !!(val & BIT(p->bit));
32654e991b5SMasahiro Yamada
32754e991b5SMasahiro Yamada if (p->flags & UNIPHIER_RESET_ACTIVE_LOW)
32854e991b5SMasahiro Yamada asserted = !asserted;
32954e991b5SMasahiro Yamada
33054e991b5SMasahiro Yamada return asserted;
33154e991b5SMasahiro Yamada }
33254e991b5SMasahiro Yamada
33354e991b5SMasahiro Yamada dev_err(priv->dev, "reset_id=%lu was not found\n", id);
33454e991b5SMasahiro Yamada return -EINVAL;
33554e991b5SMasahiro Yamada }
33654e991b5SMasahiro Yamada
33754e991b5SMasahiro Yamada static const struct reset_control_ops uniphier_reset_ops = {
33854e991b5SMasahiro Yamada .assert = uniphier_reset_assert,
33954e991b5SMasahiro Yamada .deassert = uniphier_reset_deassert,
34054e991b5SMasahiro Yamada .status = uniphier_reset_status,
34154e991b5SMasahiro Yamada };
34254e991b5SMasahiro Yamada
uniphier_reset_probe(struct platform_device * pdev)34354e991b5SMasahiro Yamada static int uniphier_reset_probe(struct platform_device *pdev)
34454e991b5SMasahiro Yamada {
34554e991b5SMasahiro Yamada struct device *dev = &pdev->dev;
34654e991b5SMasahiro Yamada struct uniphier_reset_priv *priv;
34754e991b5SMasahiro Yamada const struct uniphier_reset_data *p, *data;
34854e991b5SMasahiro Yamada struct regmap *regmap;
34954e991b5SMasahiro Yamada struct device_node *parent;
35054e991b5SMasahiro Yamada unsigned int nr_resets = 0;
35154e991b5SMasahiro Yamada
35254e991b5SMasahiro Yamada data = of_device_get_match_data(dev);
35354e991b5SMasahiro Yamada if (WARN_ON(!data))
35454e991b5SMasahiro Yamada return -EINVAL;
35554e991b5SMasahiro Yamada
35654e991b5SMasahiro Yamada parent = of_get_parent(dev->of_node); /* parent should be syscon node */
35754e991b5SMasahiro Yamada regmap = syscon_node_to_regmap(parent);
35854e991b5SMasahiro Yamada of_node_put(parent);
35954e991b5SMasahiro Yamada if (IS_ERR(regmap)) {
36054e991b5SMasahiro Yamada dev_err(dev, "failed to get regmap (error %ld)\n",
36154e991b5SMasahiro Yamada PTR_ERR(regmap));
36254e991b5SMasahiro Yamada return PTR_ERR(regmap);
36354e991b5SMasahiro Yamada }
36454e991b5SMasahiro Yamada
36554e991b5SMasahiro Yamada priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
36654e991b5SMasahiro Yamada if (!priv)
36754e991b5SMasahiro Yamada return -ENOMEM;
36854e991b5SMasahiro Yamada
36954e991b5SMasahiro Yamada for (p = data; p->id != UNIPHIER_RESET_ID_END; p++)
37054e991b5SMasahiro Yamada nr_resets = max(nr_resets, p->id + 1);
37154e991b5SMasahiro Yamada
37254e991b5SMasahiro Yamada priv->rcdev.ops = &uniphier_reset_ops;
37354e991b5SMasahiro Yamada priv->rcdev.owner = dev->driver->owner;
37454e991b5SMasahiro Yamada priv->rcdev.of_node = dev->of_node;
37554e991b5SMasahiro Yamada priv->rcdev.nr_resets = nr_resets;
37654e991b5SMasahiro Yamada priv->dev = dev;
37754e991b5SMasahiro Yamada priv->regmap = regmap;
37854e991b5SMasahiro Yamada priv->data = data;
37954e991b5SMasahiro Yamada
38054e991b5SMasahiro Yamada return devm_reset_controller_register(&pdev->dev, &priv->rcdev);
38154e991b5SMasahiro Yamada }
38254e991b5SMasahiro Yamada
38354e991b5SMasahiro Yamada static const struct of_device_id uniphier_reset_match[] = {
38454e991b5SMasahiro Yamada /* System reset */
38554e991b5SMasahiro Yamada {
38654e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld4-reset",
3875281036aSMasahiro Yamada .data = uniphier_ld4_sys_reset_data,
38854e991b5SMasahiro Yamada },
38954e991b5SMasahiro Yamada {
39054e991b5SMasahiro Yamada .compatible = "socionext,uniphier-pro4-reset",
39154e991b5SMasahiro Yamada .data = uniphier_pro4_sys_reset_data,
39254e991b5SMasahiro Yamada },
39354e991b5SMasahiro Yamada {
39454e991b5SMasahiro Yamada .compatible = "socionext,uniphier-sld8-reset",
3955281036aSMasahiro Yamada .data = uniphier_ld4_sys_reset_data,
39654e991b5SMasahiro Yamada },
39754e991b5SMasahiro Yamada {
39854e991b5SMasahiro Yamada .compatible = "socionext,uniphier-pro5-reset",
39954e991b5SMasahiro Yamada .data = uniphier_pro5_sys_reset_data,
40054e991b5SMasahiro Yamada },
40154e991b5SMasahiro Yamada {
40254e991b5SMasahiro Yamada .compatible = "socionext,uniphier-pxs2-reset",
40354e991b5SMasahiro Yamada .data = uniphier_pxs2_sys_reset_data,
40454e991b5SMasahiro Yamada },
40554e991b5SMasahiro Yamada {
40654e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld11-reset",
40754e991b5SMasahiro Yamada .data = uniphier_ld11_sys_reset_data,
40854e991b5SMasahiro Yamada },
40954e991b5SMasahiro Yamada {
41054e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld20-reset",
41154e991b5SMasahiro Yamada .data = uniphier_ld20_sys_reset_data,
41254e991b5SMasahiro Yamada },
4132a158f88SMasahiro Yamada {
4142a158f88SMasahiro Yamada .compatible = "socionext,uniphier-pxs3-reset",
4152a158f88SMasahiro Yamada .data = uniphier_pxs3_sys_reset_data,
4162a158f88SMasahiro Yamada },
417*3440b8faSKunihiko Hayashi {
418*3440b8faSKunihiko Hayashi .compatible = "socionext,uniphier-nx1-reset",
419*3440b8faSKunihiko Hayashi .data = uniphier_nx1_sys_reset_data,
420*3440b8faSKunihiko Hayashi },
42119eb4a47SMasahiro Yamada /* Media I/O reset, SD reset */
42254e991b5SMasahiro Yamada {
42354e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld4-mio-reset",
4245281036aSMasahiro Yamada .data = uniphier_ld4_mio_reset_data,
42554e991b5SMasahiro Yamada },
42654e991b5SMasahiro Yamada {
42754e991b5SMasahiro Yamada .compatible = "socionext,uniphier-pro4-mio-reset",
4285281036aSMasahiro Yamada .data = uniphier_ld4_mio_reset_data,
42954e991b5SMasahiro Yamada },
43054e991b5SMasahiro Yamada {
43154e991b5SMasahiro Yamada .compatible = "socionext,uniphier-sld8-mio-reset",
4325281036aSMasahiro Yamada .data = uniphier_ld4_mio_reset_data,
43354e991b5SMasahiro Yamada },
43454e991b5SMasahiro Yamada {
43519eb4a47SMasahiro Yamada .compatible = "socionext,uniphier-pro5-sd-reset",
43619eb4a47SMasahiro Yamada .data = uniphier_pro5_sd_reset_data,
43754e991b5SMasahiro Yamada },
43854e991b5SMasahiro Yamada {
43919eb4a47SMasahiro Yamada .compatible = "socionext,uniphier-pxs2-sd-reset",
44019eb4a47SMasahiro Yamada .data = uniphier_pro5_sd_reset_data,
44154e991b5SMasahiro Yamada },
44254e991b5SMasahiro Yamada {
44354e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld11-mio-reset",
4445281036aSMasahiro Yamada .data = uniphier_ld4_mio_reset_data,
44554e991b5SMasahiro Yamada },
44654e991b5SMasahiro Yamada {
44788a7f523SMasahiro Yamada .compatible = "socionext,uniphier-ld11-sd-reset",
44888a7f523SMasahiro Yamada .data = uniphier_pro5_sd_reset_data,
44988a7f523SMasahiro Yamada },
45088a7f523SMasahiro Yamada {
45119eb4a47SMasahiro Yamada .compatible = "socionext,uniphier-ld20-sd-reset",
45219eb4a47SMasahiro Yamada .data = uniphier_pro5_sd_reset_data,
45354e991b5SMasahiro Yamada },
4542a158f88SMasahiro Yamada {
4552a158f88SMasahiro Yamada .compatible = "socionext,uniphier-pxs3-sd-reset",
4562a158f88SMasahiro Yamada .data = uniphier_pro5_sd_reset_data,
4572a158f88SMasahiro Yamada },
458*3440b8faSKunihiko Hayashi {
459*3440b8faSKunihiko Hayashi .compatible = "socionext,uniphier-nx1-sd-reset",
460*3440b8faSKunihiko Hayashi .data = uniphier_pro5_sd_reset_data,
461*3440b8faSKunihiko Hayashi },
46254e991b5SMasahiro Yamada /* Peripheral reset */
46354e991b5SMasahiro Yamada {
46454e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld4-peri-reset",
46554e991b5SMasahiro Yamada .data = uniphier_ld4_peri_reset_data,
46654e991b5SMasahiro Yamada },
46754e991b5SMasahiro Yamada {
46854e991b5SMasahiro Yamada .compatible = "socionext,uniphier-pro4-peri-reset",
46954e991b5SMasahiro Yamada .data = uniphier_pro4_peri_reset_data,
47054e991b5SMasahiro Yamada },
47154e991b5SMasahiro Yamada {
47254e991b5SMasahiro Yamada .compatible = "socionext,uniphier-sld8-peri-reset",
47354e991b5SMasahiro Yamada .data = uniphier_ld4_peri_reset_data,
47454e991b5SMasahiro Yamada },
47554e991b5SMasahiro Yamada {
47654e991b5SMasahiro Yamada .compatible = "socionext,uniphier-pro5-peri-reset",
47754e991b5SMasahiro Yamada .data = uniphier_pro4_peri_reset_data,
47854e991b5SMasahiro Yamada },
47954e991b5SMasahiro Yamada {
48054e991b5SMasahiro Yamada .compatible = "socionext,uniphier-pxs2-peri-reset",
48154e991b5SMasahiro Yamada .data = uniphier_pro4_peri_reset_data,
48254e991b5SMasahiro Yamada },
48354e991b5SMasahiro Yamada {
48454e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld11-peri-reset",
48554e991b5SMasahiro Yamada .data = uniphier_pro4_peri_reset_data,
48654e991b5SMasahiro Yamada },
48754e991b5SMasahiro Yamada {
48854e991b5SMasahiro Yamada .compatible = "socionext,uniphier-ld20-peri-reset",
48954e991b5SMasahiro Yamada .data = uniphier_pro4_peri_reset_data,
49054e991b5SMasahiro Yamada },
4912a158f88SMasahiro Yamada {
4922a158f88SMasahiro Yamada .compatible = "socionext,uniphier-pxs3-peri-reset",
4932a158f88SMasahiro Yamada .data = uniphier_pro4_peri_reset_data,
4942a158f88SMasahiro Yamada },
495*3440b8faSKunihiko Hayashi {
496*3440b8faSKunihiko Hayashi .compatible = "socionext,uniphier-nx1-peri-reset",
497*3440b8faSKunihiko Hayashi .data = uniphier_pro4_peri_reset_data,
498*3440b8faSKunihiko Hayashi },
499ac0c735aSKatsuhiro Suzuki /* Analog signal amplifiers reset */
500ac0c735aSKatsuhiro Suzuki {
501ac0c735aSKatsuhiro Suzuki .compatible = "socionext,uniphier-ld11-adamv-reset",
502ac0c735aSKatsuhiro Suzuki .data = uniphier_ld11_adamv_reset_data,
503ac0c735aSKatsuhiro Suzuki },
504ac0c735aSKatsuhiro Suzuki {
505ac0c735aSKatsuhiro Suzuki .compatible = "socionext,uniphier-ld20-adamv-reset",
506ac0c735aSKatsuhiro Suzuki .data = uniphier_ld11_adamv_reset_data,
507ac0c735aSKatsuhiro Suzuki },
50854e991b5SMasahiro Yamada { /* sentinel */ }
50954e991b5SMasahiro Yamada };
51054e991b5SMasahiro Yamada MODULE_DEVICE_TABLE(of, uniphier_reset_match);
51154e991b5SMasahiro Yamada
51254e991b5SMasahiro Yamada static struct platform_driver uniphier_reset_driver = {
51354e991b5SMasahiro Yamada .probe = uniphier_reset_probe,
51454e991b5SMasahiro Yamada .driver = {
51554e991b5SMasahiro Yamada .name = "uniphier-reset",
51654e991b5SMasahiro Yamada .of_match_table = uniphier_reset_match,
51754e991b5SMasahiro Yamada },
51854e991b5SMasahiro Yamada };
51954e991b5SMasahiro Yamada module_platform_driver(uniphier_reset_driver);
52054e991b5SMasahiro Yamada
52154e991b5SMasahiro Yamada MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
52254e991b5SMasahiro Yamada MODULE_DESCRIPTION("UniPhier Reset Controller Driver");
52354e991b5SMasahiro Yamada MODULE_LICENSE("GPL");
524