13e98fc12SMasahiro Yamada// SPDX-License-Identifier: GPL-2.0+ OR MIT 23e98fc12SMasahiro Yamada// 33e98fc12SMasahiro Yamada// Device Tree Source for UniPhier LD20 SoC 43e98fc12SMasahiro Yamada// 53e98fc12SMasahiro Yamada// Copyright (C) 2015-2016 Socionext Inc. 63e98fc12SMasahiro Yamada// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 752159d27SMasahiro Yamada 8b443fb42SMasahiro Yamada#include <dt-bindings/gpio/gpio.h> 9b443fb42SMasahiro Yamada#include <dt-bindings/gpio/uniphier-gpio.h> 10b443fb42SMasahiro Yamada#include <dt-bindings/thermal/thermal.h> 11b443fb42SMasahiro Yamada 12d9403001SMasahiro Yamada/memreserve/ 0x80000000 0x02000000; 1352159d27SMasahiro Yamada 1452159d27SMasahiro Yamada/ { 1552159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20"; 1652159d27SMasahiro Yamada #address-cells = <2>; 1752159d27SMasahiro Yamada #size-cells = <2>; 1852159d27SMasahiro Yamada interrupt-parent = <&gic>; 1952159d27SMasahiro Yamada 2052159d27SMasahiro Yamada cpus { 2152159d27SMasahiro Yamada #address-cells = <2>; 2252159d27SMasahiro Yamada #size-cells = <0>; 2352159d27SMasahiro Yamada 2452159d27SMasahiro Yamada cpu-map { 2552159d27SMasahiro Yamada cluster0 { 2652159d27SMasahiro Yamada core0 { 2752159d27SMasahiro Yamada cpu = <&cpu0>; 2852159d27SMasahiro Yamada }; 2952159d27SMasahiro Yamada core1 { 3052159d27SMasahiro Yamada cpu = <&cpu1>; 3152159d27SMasahiro Yamada }; 3252159d27SMasahiro Yamada }; 3352159d27SMasahiro Yamada 3452159d27SMasahiro Yamada cluster1 { 3552159d27SMasahiro Yamada core0 { 3652159d27SMasahiro Yamada cpu = <&cpu2>; 3752159d27SMasahiro Yamada }; 3852159d27SMasahiro Yamada core1 { 3952159d27SMasahiro Yamada cpu = <&cpu3>; 4052159d27SMasahiro Yamada }; 4152159d27SMasahiro Yamada }; 4252159d27SMasahiro Yamada }; 4352159d27SMasahiro Yamada 4452159d27SMasahiro Yamada cpu0: cpu@0 { 4552159d27SMasahiro Yamada device_type = "cpu"; 4652159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 4752159d27SMasahiro Yamada reg = <0 0x000>; 48cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 49cd62214dSMasahiro Yamada enable-method = "psci"; 50cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 51b443fb42SMasahiro Yamada #cooling-cells = <2>; 5252159d27SMasahiro Yamada }; 5352159d27SMasahiro Yamada 5452159d27SMasahiro Yamada cpu1: cpu@1 { 5552159d27SMasahiro Yamada device_type = "cpu"; 5652159d27SMasahiro Yamada compatible = "arm,cortex-a72", "arm,armv8"; 5752159d27SMasahiro Yamada reg = <0 0x001>; 58cd62214dSMasahiro Yamada clocks = <&sys_clk 32>; 59cd62214dSMasahiro Yamada enable-method = "psci"; 60cd62214dSMasahiro Yamada operating-points-v2 = <&cluster0_opp>; 6133aae6b5SMasahiro Yamada #cooling-cells = <2>; 6252159d27SMasahiro Yamada }; 6352159d27SMasahiro Yamada 6452159d27SMasahiro Yamada cpu2: cpu@100 { 6552159d27SMasahiro Yamada device_type = "cpu"; 6652159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 6752159d27SMasahiro Yamada reg = <0 0x100>; 68cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 69cd62214dSMasahiro Yamada enable-method = "psci"; 70cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 71b443fb42SMasahiro Yamada #cooling-cells = <2>; 7252159d27SMasahiro Yamada }; 7352159d27SMasahiro Yamada 7452159d27SMasahiro Yamada cpu3: cpu@101 { 7552159d27SMasahiro Yamada device_type = "cpu"; 7652159d27SMasahiro Yamada compatible = "arm,cortex-a53", "arm,armv8"; 7752159d27SMasahiro Yamada reg = <0 0x101>; 78cd62214dSMasahiro Yamada clocks = <&sys_clk 33>; 79cd62214dSMasahiro Yamada enable-method = "psci"; 80cd62214dSMasahiro Yamada operating-points-v2 = <&cluster1_opp>; 8133aae6b5SMasahiro Yamada #cooling-cells = <2>; 8252159d27SMasahiro Yamada }; 8352159d27SMasahiro Yamada }; 8452159d27SMasahiro Yamada 85b443fb42SMasahiro Yamada cluster0_opp: opp-table0 { 86cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 87cd62214dSMasahiro Yamada opp-shared; 88cd62214dSMasahiro Yamada 894e7f8de4SMasahiro Yamada opp-250000000 { 90cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 91cd62214dSMasahiro Yamada clock-latency-ns = <300>; 92cd62214dSMasahiro Yamada }; 934e7f8de4SMasahiro Yamada opp-275000000 { 94cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 95cd62214dSMasahiro Yamada clock-latency-ns = <300>; 96cd62214dSMasahiro Yamada }; 974e7f8de4SMasahiro Yamada opp-500000000 { 98cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 99cd62214dSMasahiro Yamada clock-latency-ns = <300>; 100cd62214dSMasahiro Yamada }; 1014e7f8de4SMasahiro Yamada opp-550000000 { 102cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 103cd62214dSMasahiro Yamada clock-latency-ns = <300>; 104cd62214dSMasahiro Yamada }; 1054e7f8de4SMasahiro Yamada opp-666667000 { 106cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 107cd62214dSMasahiro Yamada clock-latency-ns = <300>; 108cd62214dSMasahiro Yamada }; 1094e7f8de4SMasahiro Yamada opp-733334000 { 110cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 111cd62214dSMasahiro Yamada clock-latency-ns = <300>; 112cd62214dSMasahiro Yamada }; 1134e7f8de4SMasahiro Yamada opp-1000000000 { 114cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 115cd62214dSMasahiro Yamada clock-latency-ns = <300>; 116cd62214dSMasahiro Yamada }; 1174e7f8de4SMasahiro Yamada opp-1100000000 { 118cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 119cd62214dSMasahiro Yamada clock-latency-ns = <300>; 120cd62214dSMasahiro Yamada }; 121cd62214dSMasahiro Yamada }; 122cd62214dSMasahiro Yamada 123b443fb42SMasahiro Yamada cluster1_opp: opp-table1 { 124cd62214dSMasahiro Yamada compatible = "operating-points-v2"; 125cd62214dSMasahiro Yamada opp-shared; 126cd62214dSMasahiro Yamada 1274e7f8de4SMasahiro Yamada opp-250000000 { 128cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <250000000>; 129cd62214dSMasahiro Yamada clock-latency-ns = <300>; 130cd62214dSMasahiro Yamada }; 1314e7f8de4SMasahiro Yamada opp-275000000 { 132cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <275000000>; 133cd62214dSMasahiro Yamada clock-latency-ns = <300>; 134cd62214dSMasahiro Yamada }; 1354e7f8de4SMasahiro Yamada opp-500000000 { 136cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <500000000>; 137cd62214dSMasahiro Yamada clock-latency-ns = <300>; 138cd62214dSMasahiro Yamada }; 1394e7f8de4SMasahiro Yamada opp-550000000 { 140cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <550000000>; 141cd62214dSMasahiro Yamada clock-latency-ns = <300>; 142cd62214dSMasahiro Yamada }; 1434e7f8de4SMasahiro Yamada opp-666667000 { 144cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <666667000>; 145cd62214dSMasahiro Yamada clock-latency-ns = <300>; 146cd62214dSMasahiro Yamada }; 1474e7f8de4SMasahiro Yamada opp-733334000 { 148cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <733334000>; 149cd62214dSMasahiro Yamada clock-latency-ns = <300>; 150cd62214dSMasahiro Yamada }; 1514e7f8de4SMasahiro Yamada opp-1000000000 { 152cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1000000000>; 153cd62214dSMasahiro Yamada clock-latency-ns = <300>; 154cd62214dSMasahiro Yamada }; 1554e7f8de4SMasahiro Yamada opp-1100000000 { 156cd62214dSMasahiro Yamada opp-hz = /bits/ 64 <1100000000>; 157cd62214dSMasahiro Yamada clock-latency-ns = <300>; 158cd62214dSMasahiro Yamada }; 159cd62214dSMasahiro Yamada }; 160cd62214dSMasahiro Yamada 161cd62214dSMasahiro Yamada psci { 162cd62214dSMasahiro Yamada compatible = "arm,psci-1.0"; 163cd62214dSMasahiro Yamada method = "smc"; 164cd62214dSMasahiro Yamada }; 165cd62214dSMasahiro Yamada 16652159d27SMasahiro Yamada clocks { 16752159d27SMasahiro Yamada refclk: ref { 16852159d27SMasahiro Yamada compatible = "fixed-clock"; 16952159d27SMasahiro Yamada #clock-cells = <0>; 17052159d27SMasahiro Yamada clock-frequency = <25000000>; 17152159d27SMasahiro Yamada }; 17252159d27SMasahiro Yamada }; 17352159d27SMasahiro Yamada 174b443fb42SMasahiro Yamada emmc_pwrseq: emmc-pwrseq { 175b443fb42SMasahiro Yamada compatible = "mmc-pwrseq-emmc"; 176b443fb42SMasahiro Yamada reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; 177b443fb42SMasahiro Yamada }; 178b443fb42SMasahiro Yamada 17952159d27SMasahiro Yamada timer { 18052159d27SMasahiro Yamada compatible = "arm,armv8-timer"; 18152159d27SMasahiro Yamada interrupts = <1 13 4>, 18252159d27SMasahiro Yamada <1 14 4>, 18352159d27SMasahiro Yamada <1 11 4>, 18452159d27SMasahiro Yamada <1 10 4>; 18552159d27SMasahiro Yamada }; 18652159d27SMasahiro Yamada 187b443fb42SMasahiro Yamada thermal-zones { 188b443fb42SMasahiro Yamada cpu-thermal { 189b443fb42SMasahiro Yamada polling-delay-passive = <250>; /* 250ms */ 190b443fb42SMasahiro Yamada polling-delay = <1000>; /* 1000ms */ 191b443fb42SMasahiro Yamada thermal-sensors = <&pvtctl>; 192b443fb42SMasahiro Yamada 193b443fb42SMasahiro Yamada trips { 194b443fb42SMasahiro Yamada cpu_crit: cpu-crit { 195b443fb42SMasahiro Yamada temperature = <110000>; /* 110C */ 196b443fb42SMasahiro Yamada hysteresis = <2000>; 197b443fb42SMasahiro Yamada type = "critical"; 198b443fb42SMasahiro Yamada }; 199b443fb42SMasahiro Yamada cpu_alert: cpu-alert { 200b443fb42SMasahiro Yamada temperature = <100000>; /* 100C */ 201b443fb42SMasahiro Yamada hysteresis = <2000>; 202b443fb42SMasahiro Yamada type = "passive"; 203b443fb42SMasahiro Yamada }; 204b443fb42SMasahiro Yamada }; 205b443fb42SMasahiro Yamada 206b443fb42SMasahiro Yamada cooling-maps { 207b443fb42SMasahiro Yamada map0 { 208b443fb42SMasahiro Yamada trip = <&cpu_alert>; 209b443fb42SMasahiro Yamada cooling-device = <&cpu0 210b443fb42SMasahiro Yamada THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 211b443fb42SMasahiro Yamada }; 212b443fb42SMasahiro Yamada map1 { 213b443fb42SMasahiro Yamada trip = <&cpu_alert>; 214b443fb42SMasahiro Yamada cooling-device = <&cpu2 215b443fb42SMasahiro Yamada THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 216b443fb42SMasahiro Yamada }; 217b443fb42SMasahiro Yamada }; 218b443fb42SMasahiro Yamada }; 219b443fb42SMasahiro Yamada }; 220b443fb42SMasahiro Yamada 2217ad79c12SMasahiro Yamada soc@0 { 22252159d27SMasahiro Yamada compatible = "simple-bus"; 22352159d27SMasahiro Yamada #address-cells = <1>; 22452159d27SMasahiro Yamada #size-cells = <1>; 22552159d27SMasahiro Yamada ranges = <0 0 0 0xffffffff>; 22652159d27SMasahiro Yamada 227*2001a81cSMasahiro Yamada spi0: spi@54006000 { 228*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-scssi"; 229*2001a81cSMasahiro Yamada status = "disabled"; 230*2001a81cSMasahiro Yamada reg = <0x54006000 0x100>; 231*2001a81cSMasahiro Yamada interrupts = <0 39 4>; 232*2001a81cSMasahiro Yamada pinctrl-names = "default"; 233*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_spi0>; 234*2001a81cSMasahiro Yamada clocks = <&peri_clk 11>; 235*2001a81cSMasahiro Yamada resets = <&peri_rst 11>; 236*2001a81cSMasahiro Yamada }; 237*2001a81cSMasahiro Yamada 238*2001a81cSMasahiro Yamada spi1: spi@54006100 { 239*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-scssi"; 240*2001a81cSMasahiro Yamada status = "disabled"; 241*2001a81cSMasahiro Yamada reg = <0x54006100 0x100>; 242*2001a81cSMasahiro Yamada interrupts = <0 216 4>; 243*2001a81cSMasahiro Yamada pinctrl-names = "default"; 244*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_spi1>; 245*2001a81cSMasahiro Yamada clocks = <&peri_clk 11>; 246*2001a81cSMasahiro Yamada resets = <&peri_rst 11>; 247*2001a81cSMasahiro Yamada }; 248*2001a81cSMasahiro Yamada 249*2001a81cSMasahiro Yamada spi2: spi@54006200 { 250*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-scssi"; 251*2001a81cSMasahiro Yamada status = "disabled"; 252*2001a81cSMasahiro Yamada reg = <0x54006200 0x100>; 253*2001a81cSMasahiro Yamada interrupts = <0 229 4>; 254*2001a81cSMasahiro Yamada pinctrl-names = "default"; 255*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_spi2>; 256*2001a81cSMasahiro Yamada clocks = <&peri_clk 11>; 257*2001a81cSMasahiro Yamada resets = <&peri_rst 11>; 258*2001a81cSMasahiro Yamada }; 259*2001a81cSMasahiro Yamada 260*2001a81cSMasahiro Yamada spi3: spi@54006300 { 261*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-scssi"; 262*2001a81cSMasahiro Yamada status = "disabled"; 263*2001a81cSMasahiro Yamada reg = <0x54006300 0x100>; 264*2001a81cSMasahiro Yamada interrupts = <0 230 4>; 265*2001a81cSMasahiro Yamada pinctrl-names = "default"; 266*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_spi3>; 267*2001a81cSMasahiro Yamada clocks = <&peri_clk 11>; 268*2001a81cSMasahiro Yamada resets = <&peri_rst 11>; 269*2001a81cSMasahiro Yamada }; 270*2001a81cSMasahiro Yamada 27152159d27SMasahiro Yamada serial0: serial@54006800 { 27252159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 27352159d27SMasahiro Yamada status = "disabled"; 27452159d27SMasahiro Yamada reg = <0x54006800 0x40>; 27552159d27SMasahiro Yamada interrupts = <0 33 4>; 27652159d27SMasahiro Yamada pinctrl-names = "default"; 27752159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart0>; 27852159d27SMasahiro Yamada clocks = <&peri_clk 0>; 279b443fb42SMasahiro Yamada resets = <&peri_rst 0>; 28052159d27SMasahiro Yamada }; 28152159d27SMasahiro Yamada 28252159d27SMasahiro Yamada serial1: serial@54006900 { 28352159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 28452159d27SMasahiro Yamada status = "disabled"; 28552159d27SMasahiro Yamada reg = <0x54006900 0x40>; 28652159d27SMasahiro Yamada interrupts = <0 35 4>; 28752159d27SMasahiro Yamada pinctrl-names = "default"; 28852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart1>; 28952159d27SMasahiro Yamada clocks = <&peri_clk 1>; 290b443fb42SMasahiro Yamada resets = <&peri_rst 1>; 29152159d27SMasahiro Yamada }; 29252159d27SMasahiro Yamada 29352159d27SMasahiro Yamada serial2: serial@54006a00 { 29452159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 29552159d27SMasahiro Yamada status = "disabled"; 29652159d27SMasahiro Yamada reg = <0x54006a00 0x40>; 29752159d27SMasahiro Yamada interrupts = <0 37 4>; 29852159d27SMasahiro Yamada pinctrl-names = "default"; 29952159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart2>; 30052159d27SMasahiro Yamada clocks = <&peri_clk 2>; 301b443fb42SMasahiro Yamada resets = <&peri_rst 2>; 30252159d27SMasahiro Yamada }; 30352159d27SMasahiro Yamada 30452159d27SMasahiro Yamada serial3: serial@54006b00 { 30552159d27SMasahiro Yamada compatible = "socionext,uniphier-uart"; 30652159d27SMasahiro Yamada status = "disabled"; 30752159d27SMasahiro Yamada reg = <0x54006b00 0x40>; 30852159d27SMasahiro Yamada interrupts = <0 177 4>; 30952159d27SMasahiro Yamada pinctrl-names = "default"; 31052159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_uart3>; 31152159d27SMasahiro Yamada clocks = <&peri_clk 3>; 312b443fb42SMasahiro Yamada resets = <&peri_rst 3>; 31352159d27SMasahiro Yamada }; 31452159d27SMasahiro Yamada 31527287487SMasahiro Yamada gpio: gpio@55000000 { 31627287487SMasahiro Yamada compatible = "socionext,uniphier-gpio"; 31727287487SMasahiro Yamada reg = <0x55000000 0x200>; 31827287487SMasahiro Yamada interrupt-parent = <&aidet>; 31927287487SMasahiro Yamada interrupt-controller; 32027287487SMasahiro Yamada #interrupt-cells = <2>; 32127287487SMasahiro Yamada gpio-controller; 32227287487SMasahiro Yamada #gpio-cells = <2>; 32327287487SMasahiro Yamada gpio-ranges = <&pinctrl 0 0 0>, 32427287487SMasahiro Yamada <&pinctrl 96 0 0>, 32527287487SMasahiro Yamada <&pinctrl 160 0 0>; 32627287487SMasahiro Yamada gpio-ranges-group-names = "gpio_range0", 32727287487SMasahiro Yamada "gpio_range1", 32827287487SMasahiro Yamada "gpio_range2"; 32927287487SMasahiro Yamada ngpios = <205>; 33027287487SMasahiro Yamada socionext,interrupt-ranges = <0 48 16>, <16 154 5>, 33127287487SMasahiro Yamada <21 217 3>; 33227287487SMasahiro Yamada }; 33327287487SMasahiro Yamada 3343e98fc12SMasahiro Yamada audio@56000000 { 3353e98fc12SMasahiro Yamada compatible = "socionext,uniphier-ld20-aio"; 3363e98fc12SMasahiro Yamada reg = <0x56000000 0x80000>; 3373e98fc12SMasahiro Yamada interrupts = <0 144 4>; 3383e98fc12SMasahiro Yamada pinctrl-names = "default"; 3393e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_aout1>, 3403e98fc12SMasahiro Yamada <&pinctrl_aoutiec1>; 3413e98fc12SMasahiro Yamada clock-names = "aio"; 3423e98fc12SMasahiro Yamada clocks = <&sys_clk 40>; 3433e98fc12SMasahiro Yamada reset-names = "aio"; 3443e98fc12SMasahiro Yamada resets = <&sys_rst 40>; 3453e98fc12SMasahiro Yamada #sound-dai-cells = <1>; 3463e98fc12SMasahiro Yamada socionext,syscon = <&soc_glue>; 3473e98fc12SMasahiro Yamada 3483e98fc12SMasahiro Yamada i2s_port0: port@0 { 3493e98fc12SMasahiro Yamada i2s_hdmi: endpoint { 3503e98fc12SMasahiro Yamada }; 3513e98fc12SMasahiro Yamada }; 3523e98fc12SMasahiro Yamada 3533e98fc12SMasahiro Yamada i2s_port1: port@1 { 3543e98fc12SMasahiro Yamada i2s_pcmin2: endpoint { 3553e98fc12SMasahiro Yamada }; 3563e98fc12SMasahiro Yamada }; 3573e98fc12SMasahiro Yamada 3583e98fc12SMasahiro Yamada i2s_port2: port@2 { 3593e98fc12SMasahiro Yamada i2s_line: endpoint { 3603e98fc12SMasahiro Yamada dai-format = "i2s"; 3613e98fc12SMasahiro Yamada remote-endpoint = <&evea_line>; 3623e98fc12SMasahiro Yamada }; 3633e98fc12SMasahiro Yamada }; 3643e98fc12SMasahiro Yamada 3653e98fc12SMasahiro Yamada i2s_port3: port@3 { 3663e98fc12SMasahiro Yamada i2s_hpcmout1: endpoint { 3673e98fc12SMasahiro Yamada }; 3683e98fc12SMasahiro Yamada }; 3693e98fc12SMasahiro Yamada 3703e98fc12SMasahiro Yamada i2s_port4: port@4 { 3713e98fc12SMasahiro Yamada i2s_hp: endpoint { 3723e98fc12SMasahiro Yamada dai-format = "i2s"; 3733e98fc12SMasahiro Yamada remote-endpoint = <&evea_hp>; 3743e98fc12SMasahiro Yamada }; 3753e98fc12SMasahiro Yamada }; 3763e98fc12SMasahiro Yamada 3773e98fc12SMasahiro Yamada spdif_port0: port@5 { 3783e98fc12SMasahiro Yamada spdif_hiecout1: endpoint { 3793e98fc12SMasahiro Yamada }; 3803e98fc12SMasahiro Yamada }; 3813e98fc12SMasahiro Yamada 3823e98fc12SMasahiro Yamada src_port0: port@6 { 3833e98fc12SMasahiro Yamada i2s_epcmout2: endpoint { 3843e98fc12SMasahiro Yamada }; 3853e98fc12SMasahiro Yamada }; 3863e98fc12SMasahiro Yamada 3873e98fc12SMasahiro Yamada src_port1: port@7 { 3883e98fc12SMasahiro Yamada i2s_epcmout3: endpoint { 3893e98fc12SMasahiro Yamada }; 3903e98fc12SMasahiro Yamada }; 3913e98fc12SMasahiro Yamada 3923e98fc12SMasahiro Yamada comp_spdif_port0: port@8 { 3933e98fc12SMasahiro Yamada comp_spdif_hiecout1: endpoint { 3943e98fc12SMasahiro Yamada }; 3953e98fc12SMasahiro Yamada }; 3963e98fc12SMasahiro Yamada }; 3973e98fc12SMasahiro Yamada 3983e98fc12SMasahiro Yamada codec@57900000 { 3993e98fc12SMasahiro Yamada compatible = "socionext,uniphier-evea"; 4003e98fc12SMasahiro Yamada reg = <0x57900000 0x1000>; 4013e98fc12SMasahiro Yamada clock-names = "evea", "exiv"; 4023e98fc12SMasahiro Yamada clocks = <&sys_clk 41>, <&sys_clk 42>; 4033e98fc12SMasahiro Yamada reset-names = "evea", "exiv", "adamv"; 4043e98fc12SMasahiro Yamada resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>; 4053e98fc12SMasahiro Yamada #sound-dai-cells = <1>; 4063e98fc12SMasahiro Yamada 4073e98fc12SMasahiro Yamada port@0 { 4083e98fc12SMasahiro Yamada evea_line: endpoint { 4093e98fc12SMasahiro Yamada remote-endpoint = <&i2s_line>; 4103e98fc12SMasahiro Yamada }; 4113e98fc12SMasahiro Yamada }; 4123e98fc12SMasahiro Yamada 4133e98fc12SMasahiro Yamada port@1 { 4143e98fc12SMasahiro Yamada evea_hp: endpoint { 4153e98fc12SMasahiro Yamada remote-endpoint = <&i2s_hp>; 4163e98fc12SMasahiro Yamada }; 4173e98fc12SMasahiro Yamada }; 4183e98fc12SMasahiro Yamada }; 4193e98fc12SMasahiro Yamada 42027287487SMasahiro Yamada adamv@57920000 { 42127287487SMasahiro Yamada compatible = "socionext,uniphier-ld20-adamv", 42227287487SMasahiro Yamada "simple-mfd", "syscon"; 42327287487SMasahiro Yamada reg = <0x57920000 0x1000>; 42427287487SMasahiro Yamada 42527287487SMasahiro Yamada adamv_rst: reset { 42627287487SMasahiro Yamada compatible = "socionext,uniphier-ld20-adamv-reset"; 42727287487SMasahiro Yamada #reset-cells = <1>; 42827287487SMasahiro Yamada }; 42927287487SMasahiro Yamada }; 43027287487SMasahiro Yamada 43152159d27SMasahiro Yamada i2c0: i2c@58780000 { 43252159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 43352159d27SMasahiro Yamada status = "disabled"; 43452159d27SMasahiro Yamada reg = <0x58780000 0x80>; 43552159d27SMasahiro Yamada #address-cells = <1>; 43652159d27SMasahiro Yamada #size-cells = <0>; 43752159d27SMasahiro Yamada interrupts = <0 41 4>; 43852159d27SMasahiro Yamada pinctrl-names = "default"; 43952159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c0>; 440cd62214dSMasahiro Yamada clocks = <&peri_clk 4>; 441b443fb42SMasahiro Yamada resets = <&peri_rst 4>; 44252159d27SMasahiro Yamada clock-frequency = <100000>; 44352159d27SMasahiro Yamada }; 44452159d27SMasahiro Yamada 44552159d27SMasahiro Yamada i2c1: i2c@58781000 { 44652159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 44752159d27SMasahiro Yamada status = "disabled"; 44852159d27SMasahiro Yamada reg = <0x58781000 0x80>; 44952159d27SMasahiro Yamada #address-cells = <1>; 45052159d27SMasahiro Yamada #size-cells = <0>; 45152159d27SMasahiro Yamada interrupts = <0 42 4>; 45252159d27SMasahiro Yamada pinctrl-names = "default"; 45352159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c1>; 454cd62214dSMasahiro Yamada clocks = <&peri_clk 5>; 455b443fb42SMasahiro Yamada resets = <&peri_rst 5>; 45652159d27SMasahiro Yamada clock-frequency = <100000>; 45752159d27SMasahiro Yamada }; 45852159d27SMasahiro Yamada 45952159d27SMasahiro Yamada i2c2: i2c@58782000 { 46052159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 46152159d27SMasahiro Yamada reg = <0x58782000 0x80>; 46252159d27SMasahiro Yamada #address-cells = <1>; 46352159d27SMasahiro Yamada #size-cells = <0>; 46452159d27SMasahiro Yamada interrupts = <0 43 4>; 465cd62214dSMasahiro Yamada clocks = <&peri_clk 6>; 466b443fb42SMasahiro Yamada resets = <&peri_rst 6>; 46752159d27SMasahiro Yamada clock-frequency = <400000>; 46852159d27SMasahiro Yamada }; 46952159d27SMasahiro Yamada 47052159d27SMasahiro Yamada i2c3: i2c@58783000 { 47152159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 47252159d27SMasahiro Yamada status = "disabled"; 47352159d27SMasahiro Yamada reg = <0x58783000 0x80>; 47452159d27SMasahiro Yamada #address-cells = <1>; 47552159d27SMasahiro Yamada #size-cells = <0>; 47652159d27SMasahiro Yamada interrupts = <0 44 4>; 47752159d27SMasahiro Yamada pinctrl-names = "default"; 47852159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c3>; 479cd62214dSMasahiro Yamada clocks = <&peri_clk 7>; 480b443fb42SMasahiro Yamada resets = <&peri_rst 7>; 48152159d27SMasahiro Yamada clock-frequency = <100000>; 48252159d27SMasahiro Yamada }; 48352159d27SMasahiro Yamada 48452159d27SMasahiro Yamada i2c4: i2c@58784000 { 48552159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 48652159d27SMasahiro Yamada status = "disabled"; 48752159d27SMasahiro Yamada reg = <0x58784000 0x80>; 48852159d27SMasahiro Yamada #address-cells = <1>; 48952159d27SMasahiro Yamada #size-cells = <0>; 49052159d27SMasahiro Yamada interrupts = <0 45 4>; 49152159d27SMasahiro Yamada pinctrl-names = "default"; 49252159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_i2c4>; 493cd62214dSMasahiro Yamada clocks = <&peri_clk 8>; 494b443fb42SMasahiro Yamada resets = <&peri_rst 8>; 49552159d27SMasahiro Yamada clock-frequency = <100000>; 49652159d27SMasahiro Yamada }; 49752159d27SMasahiro Yamada 49852159d27SMasahiro Yamada i2c5: i2c@58785000 { 49952159d27SMasahiro Yamada compatible = "socionext,uniphier-fi2c"; 50052159d27SMasahiro Yamada reg = <0x58785000 0x80>; 50152159d27SMasahiro Yamada #address-cells = <1>; 50252159d27SMasahiro Yamada #size-cells = <0>; 50352159d27SMasahiro Yamada interrupts = <0 25 4>; 504cd62214dSMasahiro Yamada clocks = <&peri_clk 9>; 505b443fb42SMasahiro Yamada resets = <&peri_rst 9>; 50652159d27SMasahiro Yamada clock-frequency = <400000>; 50752159d27SMasahiro Yamada }; 50852159d27SMasahiro Yamada 50952159d27SMasahiro Yamada system_bus: system-bus@58c00000 { 51052159d27SMasahiro Yamada compatible = "socionext,uniphier-system-bus"; 51152159d27SMasahiro Yamada status = "disabled"; 51252159d27SMasahiro Yamada reg = <0x58c00000 0x400>; 51352159d27SMasahiro Yamada #address-cells = <2>; 51452159d27SMasahiro Yamada #size-cells = <1>; 51552159d27SMasahiro Yamada pinctrl-names = "default"; 51652159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_system_bus>; 51752159d27SMasahiro Yamada }; 51852159d27SMasahiro Yamada 519abb6ac25SMasahiro Yamada smpctrl@59801000 { 52052159d27SMasahiro Yamada compatible = "socionext,uniphier-smpctrl"; 52152159d27SMasahiro Yamada reg = <0x59801000 0x400>; 52252159d27SMasahiro Yamada }; 52352159d27SMasahiro Yamada 524cd62214dSMasahiro Yamada sdctrl@59810000 { 525cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sdctrl", 52652159d27SMasahiro Yamada "simple-mfd", "syscon"; 5276c9e46efSMasahiro Yamada reg = <0x59810000 0x400>; 52852159d27SMasahiro Yamada 529cd62214dSMasahiro Yamada sd_clk: clock { 530cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-clock"; 53152159d27SMasahiro Yamada #clock-cells = <1>; 53252159d27SMasahiro Yamada }; 53352159d27SMasahiro Yamada 534cd62214dSMasahiro Yamada sd_rst: reset { 535cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sd-reset"; 53652159d27SMasahiro Yamada #reset-cells = <1>; 53752159d27SMasahiro Yamada }; 53852159d27SMasahiro Yamada }; 53952159d27SMasahiro Yamada 54052159d27SMasahiro Yamada perictrl@59820000 { 541cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-perictrl", 54252159d27SMasahiro Yamada "simple-mfd", "syscon"; 54352159d27SMasahiro Yamada reg = <0x59820000 0x200>; 54452159d27SMasahiro Yamada 54552159d27SMasahiro Yamada peri_clk: clock { 54652159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-clock"; 54752159d27SMasahiro Yamada #clock-cells = <1>; 54852159d27SMasahiro Yamada }; 54952159d27SMasahiro Yamada 55052159d27SMasahiro Yamada peri_rst: reset { 55152159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-peri-reset"; 55252159d27SMasahiro Yamada #reset-cells = <1>; 55352159d27SMasahiro Yamada }; 55452159d27SMasahiro Yamada }; 55552159d27SMasahiro Yamada 556cd62214dSMasahiro Yamada emmc: sdhc@5a000000 { 5577a6139c9SMasahiro Yamada compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; 558cd62214dSMasahiro Yamada reg = <0x5a000000 0x400>; 559cd62214dSMasahiro Yamada interrupts = <0 78 4>; 560cd62214dSMasahiro Yamada pinctrl-names = "default"; 56133aae6b5SMasahiro Yamada pinctrl-0 = <&pinctrl_emmc>; 562cd62214dSMasahiro Yamada clocks = <&sys_clk 4>; 563b443fb42SMasahiro Yamada resets = <&sys_rst 4>; 564cd62214dSMasahiro Yamada bus-width = <8>; 565cd62214dSMasahiro Yamada mmc-ddr-1_8v; 566cd62214dSMasahiro Yamada mmc-hs200-1_8v; 567b443fb42SMasahiro Yamada mmc-pwrseq = <&emmc_pwrseq>; 568c3d3e2a1SMasahiro Yamada cdns,phy-input-delay-legacy = <9>; 5694e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-highspeed = <2>; 5704e7f8de4SMasahiro Yamada cdns,phy-input-delay-mmc-ddr = <3>; 5714e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk = <21>; 5724e7f8de4SMasahiro Yamada cdns,phy-dll-delay-sdclk-hsmmc = <21>; 573cd62214dSMasahiro Yamada }; 574cd62214dSMasahiro Yamada 57552159d27SMasahiro Yamada sd: sdhc@5a400000 { 576c3ab1e11SMasahiro Yamada compatible = "socionext,uniphier-sd-v3.1.1"; 57752159d27SMasahiro Yamada status = "disabled"; 57852159d27SMasahiro Yamada reg = <0x5a400000 0x800>; 57952159d27SMasahiro Yamada interrupts = <0 76 4>; 58052159d27SMasahiro Yamada pinctrl-names = "default"; 58152159d27SMasahiro Yamada pinctrl-0 = <&pinctrl_sd>; 582cd62214dSMasahiro Yamada clocks = <&sd_clk 0>; 58352159d27SMasahiro Yamada reset-names = "host"; 584cd62214dSMasahiro Yamada resets = <&sd_rst 0>; 58552159d27SMasahiro Yamada bus-width = <4>; 586cd62214dSMasahiro Yamada cap-sd-highspeed; 58752159d27SMasahiro Yamada }; 58852159d27SMasahiro Yamada 5893e98fc12SMasahiro Yamada soc_glue: soc-glue@5f800000 { 590cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue", 59152159d27SMasahiro Yamada "simple-mfd", "syscon"; 59252159d27SMasahiro Yamada reg = <0x5f800000 0x2000>; 59352159d27SMasahiro Yamada 59452159d27SMasahiro Yamada pinctrl: pinctrl { 59552159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-pinctrl"; 59652159d27SMasahiro Yamada }; 59752159d27SMasahiro Yamada }; 59852159d27SMasahiro Yamada 599b443fb42SMasahiro Yamada soc-glue@5f900000 { 600b443fb42SMasahiro Yamada compatible = "socionext,uniphier-ld20-soc-glue-debug", 601b443fb42SMasahiro Yamada "simple-mfd"; 602b443fb42SMasahiro Yamada #address-cells = <1>; 603b443fb42SMasahiro Yamada #size-cells = <1>; 604b443fb42SMasahiro Yamada ranges = <0 0x5f900000 0x2000>; 605b443fb42SMasahiro Yamada 606b443fb42SMasahiro Yamada efuse@100 { 607b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 608b443fb42SMasahiro Yamada reg = <0x100 0x28>; 609b443fb42SMasahiro Yamada }; 610b443fb42SMasahiro Yamada 611b443fb42SMasahiro Yamada efuse@200 { 612b443fb42SMasahiro Yamada compatible = "socionext,uniphier-efuse"; 613b443fb42SMasahiro Yamada reg = <0x200 0x68>; 614*2001a81cSMasahiro Yamada #address-cells = <1>; 615*2001a81cSMasahiro Yamada #size-cells = <1>; 616*2001a81cSMasahiro Yamada 617*2001a81cSMasahiro Yamada /* USB cells */ 618*2001a81cSMasahiro Yamada usb_rterm0: trim@54,4 { 619*2001a81cSMasahiro Yamada reg = <0x54 1>; 620*2001a81cSMasahiro Yamada bits = <4 2>; 621*2001a81cSMasahiro Yamada }; 622*2001a81cSMasahiro Yamada usb_rterm1: trim@55,4 { 623*2001a81cSMasahiro Yamada reg = <0x55 1>; 624*2001a81cSMasahiro Yamada bits = <4 2>; 625*2001a81cSMasahiro Yamada }; 626*2001a81cSMasahiro Yamada usb_rterm2: trim@58,4 { 627*2001a81cSMasahiro Yamada reg = <0x58 1>; 628*2001a81cSMasahiro Yamada bits = <4 2>; 629*2001a81cSMasahiro Yamada }; 630*2001a81cSMasahiro Yamada usb_rterm3: trim@59,4 { 631*2001a81cSMasahiro Yamada reg = <0x59 1>; 632*2001a81cSMasahiro Yamada bits = <4 2>; 633*2001a81cSMasahiro Yamada }; 634*2001a81cSMasahiro Yamada usb_sel_t0: trim@54,0 { 635*2001a81cSMasahiro Yamada reg = <0x54 1>; 636*2001a81cSMasahiro Yamada bits = <0 4>; 637*2001a81cSMasahiro Yamada }; 638*2001a81cSMasahiro Yamada usb_sel_t1: trim@55,0 { 639*2001a81cSMasahiro Yamada reg = <0x55 1>; 640*2001a81cSMasahiro Yamada bits = <0 4>; 641*2001a81cSMasahiro Yamada }; 642*2001a81cSMasahiro Yamada usb_sel_t2: trim@58,0 { 643*2001a81cSMasahiro Yamada reg = <0x58 1>; 644*2001a81cSMasahiro Yamada bits = <0 4>; 645*2001a81cSMasahiro Yamada }; 646*2001a81cSMasahiro Yamada usb_sel_t3: trim@59,0 { 647*2001a81cSMasahiro Yamada reg = <0x59 1>; 648*2001a81cSMasahiro Yamada bits = <0 4>; 649*2001a81cSMasahiro Yamada }; 650*2001a81cSMasahiro Yamada usb_hs_i0: trim@56,0 { 651*2001a81cSMasahiro Yamada reg = <0x56 1>; 652*2001a81cSMasahiro Yamada bits = <0 4>; 653*2001a81cSMasahiro Yamada }; 654*2001a81cSMasahiro Yamada usb_hs_i2: trim@5a,0 { 655*2001a81cSMasahiro Yamada reg = <0x5a 1>; 656*2001a81cSMasahiro Yamada bits = <0 4>; 657*2001a81cSMasahiro Yamada }; 658b443fb42SMasahiro Yamada }; 659b443fb42SMasahiro Yamada }; 660b443fb42SMasahiro Yamada 6616c9e46efSMasahiro Yamada aidet: aidet@5fc20000 { 6626c9e46efSMasahiro Yamada compatible = "socionext,uniphier-ld20-aidet"; 66352159d27SMasahiro Yamada reg = <0x5fc20000 0x200>; 6646c9e46efSMasahiro Yamada interrupt-controller; 6656c9e46efSMasahiro Yamada #interrupt-cells = <2>; 66652159d27SMasahiro Yamada }; 66752159d27SMasahiro Yamada 66852159d27SMasahiro Yamada gic: interrupt-controller@5fe00000 { 66952159d27SMasahiro Yamada compatible = "arm,gic-v3"; 67052159d27SMasahiro Yamada reg = <0x5fe00000 0x10000>, /* GICD */ 67152159d27SMasahiro Yamada <0x5fe80000 0x80000>; /* GICR */ 67252159d27SMasahiro Yamada interrupt-controller; 67352159d27SMasahiro Yamada #interrupt-cells = <3>; 67452159d27SMasahiro Yamada interrupts = <1 9 4>; 67552159d27SMasahiro Yamada }; 67652159d27SMasahiro Yamada 67752159d27SMasahiro Yamada sysctrl@61840000 { 678cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-sysctrl", 67952159d27SMasahiro Yamada "simple-mfd", "syscon"; 680cd62214dSMasahiro Yamada reg = <0x61840000 0x10000>; 68152159d27SMasahiro Yamada 68252159d27SMasahiro Yamada sys_clk: clock { 68352159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-clock"; 68452159d27SMasahiro Yamada #clock-cells = <1>; 68552159d27SMasahiro Yamada }; 68652159d27SMasahiro Yamada 68752159d27SMasahiro Yamada sys_rst: reset { 68852159d27SMasahiro Yamada compatible = "socionext,uniphier-ld20-reset"; 68952159d27SMasahiro Yamada #reset-cells = <1>; 69052159d27SMasahiro Yamada }; 6916c9e46efSMasahiro Yamada 6926c9e46efSMasahiro Yamada watchdog { 6936c9e46efSMasahiro Yamada compatible = "socionext,uniphier-wdt"; 6946c9e46efSMasahiro Yamada }; 695b443fb42SMasahiro Yamada 696b443fb42SMasahiro Yamada pvtctl: pvtctl { 697b443fb42SMasahiro Yamada compatible = "socionext,uniphier-ld20-thermal"; 698b443fb42SMasahiro Yamada interrupts = <0 3 4>; 699b443fb42SMasahiro Yamada #thermal-sensor-cells = <0>; 700b443fb42SMasahiro Yamada socionext,tmod-calibration = <0x0f22 0x68ee>; 701b443fb42SMasahiro Yamada }; 70252159d27SMasahiro Yamada }; 703cd62214dSMasahiro Yamada 7043e98fc12SMasahiro Yamada eth: ethernet@65000000 { 7053e98fc12SMasahiro Yamada compatible = "socionext,uniphier-ld20-ave4"; 7063e98fc12SMasahiro Yamada status = "disabled"; 7073e98fc12SMasahiro Yamada reg = <0x65000000 0x8500>; 7083e98fc12SMasahiro Yamada interrupts = <0 66 4>; 7093e98fc12SMasahiro Yamada pinctrl-names = "default"; 7103e98fc12SMasahiro Yamada pinctrl-0 = <&pinctrl_ether_rgmii>; 7113c0fa6ceSKunihiko Hayashi clock-names = "ether"; 7123e98fc12SMasahiro Yamada clocks = <&sys_clk 6>; 7133c0fa6ceSKunihiko Hayashi reset-names = "ether"; 7143e98fc12SMasahiro Yamada resets = <&sys_rst 6>; 7153e98fc12SMasahiro Yamada phy-mode = "rgmii"; 7163e98fc12SMasahiro Yamada local-mac-address = [00 00 00 00 00 00]; 71769b3d4e9SKunihiko Hayashi socionext,syscon-phy-mode = <&soc_glue 0>; 7183e98fc12SMasahiro Yamada 7193e98fc12SMasahiro Yamada mdio: mdio { 7203e98fc12SMasahiro Yamada #address-cells = <1>; 7213e98fc12SMasahiro Yamada #size-cells = <0>; 7223e98fc12SMasahiro Yamada }; 7233e98fc12SMasahiro Yamada }; 7243e98fc12SMasahiro Yamada 725*2001a81cSMasahiro Yamada _usb: usb@65a00000 { 726*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-dwc3", "snps,dwc3"; 727*2001a81cSMasahiro Yamada status = "disabled"; 728*2001a81cSMasahiro Yamada reg = <0x65a00000 0xcd00>; 729*2001a81cSMasahiro Yamada interrupt-names = "host"; 730*2001a81cSMasahiro Yamada interrupts = <0 134 4>; 731*2001a81cSMasahiro Yamada pinctrl-names = "default"; 732*2001a81cSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 733*2001a81cSMasahiro Yamada <&pinctrl_usb2>, <&pinctrl_usb3>; 734*2001a81cSMasahiro Yamada clock-names = "ref", "bus_early", "suspend"; 735*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>; 736*2001a81cSMasahiro Yamada resets = <&usb_rst 15>; 737*2001a81cSMasahiro Yamada phys = <&usb_hsphy0>, <&usb_hsphy1>, 738*2001a81cSMasahiro Yamada <&usb_hsphy2>, <&usb_hsphy3>, 739*2001a81cSMasahiro Yamada <&usb_ssphy0>, <&usb_ssphy1>; 740*2001a81cSMasahiro Yamada dr_mode = "host"; 741*2001a81cSMasahiro Yamada }; 742*2001a81cSMasahiro Yamada 743*2001a81cSMasahiro Yamada usb-glue@65b00000 { 744*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-dwc3-glue", 745*2001a81cSMasahiro Yamada "simple-mfd"; 746*2001a81cSMasahiro Yamada #address-cells = <1>; 747*2001a81cSMasahiro Yamada #size-cells = <1>; 748*2001a81cSMasahiro Yamada ranges = <0 0x65b00000 0x400>; 749*2001a81cSMasahiro Yamada 750*2001a81cSMasahiro Yamada usb_rst: reset@0 { 751*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-reset"; 752*2001a81cSMasahiro Yamada reg = <0x0 0x4>; 753*2001a81cSMasahiro Yamada #reset-cells = <1>; 754*2001a81cSMasahiro Yamada clock-names = "link"; 755*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 756*2001a81cSMasahiro Yamada reset-names = "link"; 757*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 758*2001a81cSMasahiro Yamada }; 759*2001a81cSMasahiro Yamada 760*2001a81cSMasahiro Yamada usb_vbus0: regulator@100 { 761*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-regulator"; 762*2001a81cSMasahiro Yamada reg = <0x100 0x10>; 763*2001a81cSMasahiro Yamada clock-names = "link"; 764*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 765*2001a81cSMasahiro Yamada reset-names = "link"; 766*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 767*2001a81cSMasahiro Yamada }; 768*2001a81cSMasahiro Yamada 769*2001a81cSMasahiro Yamada usb_vbus1: regulator@110 { 770*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-regulator"; 771*2001a81cSMasahiro Yamada reg = <0x110 0x10>; 772*2001a81cSMasahiro Yamada clock-names = "link"; 773*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 774*2001a81cSMasahiro Yamada reset-names = "link"; 775*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 776*2001a81cSMasahiro Yamada }; 777*2001a81cSMasahiro Yamada 778*2001a81cSMasahiro Yamada usb_vbus2: regulator@120 { 779*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-regulator"; 780*2001a81cSMasahiro Yamada reg = <0x120 0x10>; 781*2001a81cSMasahiro Yamada clock-names = "link"; 782*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 783*2001a81cSMasahiro Yamada reset-names = "link"; 784*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 785*2001a81cSMasahiro Yamada }; 786*2001a81cSMasahiro Yamada 787*2001a81cSMasahiro Yamada usb_vbus3: regulator@130 { 788*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-regulator"; 789*2001a81cSMasahiro Yamada reg = <0x130 0x10>; 790*2001a81cSMasahiro Yamada clock-names = "link"; 791*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>; 792*2001a81cSMasahiro Yamada reset-names = "link"; 793*2001a81cSMasahiro Yamada resets = <&sys_rst 14>; 794*2001a81cSMasahiro Yamada }; 795*2001a81cSMasahiro Yamada 796*2001a81cSMasahiro Yamada usb_hsphy0: hs-phy@200 { 797*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-hsphy"; 798*2001a81cSMasahiro Yamada reg = <0x200 0x10>; 799*2001a81cSMasahiro Yamada #phy-cells = <0>; 800*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 801*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 16>; 802*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 803*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 16>; 804*2001a81cSMasahiro Yamada vbus-supply = <&usb_vbus0>; 805*2001a81cSMasahiro Yamada nvmem-cell-names = "rterm", "sel_t", "hs_i"; 806*2001a81cSMasahiro Yamada nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, 807*2001a81cSMasahiro Yamada <&usb_hs_i0>; 808*2001a81cSMasahiro Yamada }; 809*2001a81cSMasahiro Yamada 810*2001a81cSMasahiro Yamada usb_hsphy1: hs-phy@210 { 811*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-hsphy"; 812*2001a81cSMasahiro Yamada reg = <0x210 0x10>; 813*2001a81cSMasahiro Yamada #phy-cells = <0>; 814*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 815*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 16>; 816*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 817*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 16>; 818*2001a81cSMasahiro Yamada vbus-supply = <&usb_vbus1>; 819*2001a81cSMasahiro Yamada nvmem-cell-names = "rterm", "sel_t", "hs_i"; 820*2001a81cSMasahiro Yamada nvmem-cells = <&usb_rterm1>, <&usb_sel_t1>, 821*2001a81cSMasahiro Yamada <&usb_hs_i0>; 822*2001a81cSMasahiro Yamada }; 823*2001a81cSMasahiro Yamada 824*2001a81cSMasahiro Yamada usb_hsphy2: hs-phy@220 { 825*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-hsphy"; 826*2001a81cSMasahiro Yamada reg = <0x220 0x10>; 827*2001a81cSMasahiro Yamada #phy-cells = <0>; 828*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 829*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 17>; 830*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 831*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 17>; 832*2001a81cSMasahiro Yamada vbus-supply = <&usb_vbus2>; 833*2001a81cSMasahiro Yamada nvmem-cell-names = "rterm", "sel_t", "hs_i"; 834*2001a81cSMasahiro Yamada nvmem-cells = <&usb_rterm2>, <&usb_sel_t2>, 835*2001a81cSMasahiro Yamada <&usb_hs_i2>; 836*2001a81cSMasahiro Yamada }; 837*2001a81cSMasahiro Yamada 838*2001a81cSMasahiro Yamada usb_hsphy3: hs-phy@230 { 839*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-hsphy"; 840*2001a81cSMasahiro Yamada reg = <0x230 0x10>; 841*2001a81cSMasahiro Yamada #phy-cells = <0>; 842*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 843*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 17>; 844*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 845*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 17>; 846*2001a81cSMasahiro Yamada vbus-supply = <&usb_vbus3>; 847*2001a81cSMasahiro Yamada nvmem-cell-names = "rterm", "sel_t", "hs_i"; 848*2001a81cSMasahiro Yamada nvmem-cells = <&usb_rterm3>, <&usb_sel_t3>, 849*2001a81cSMasahiro Yamada <&usb_hs_i2>; 850*2001a81cSMasahiro Yamada }; 851*2001a81cSMasahiro Yamada 852*2001a81cSMasahiro Yamada usb_ssphy0: ss-phy@300 { 853*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-ssphy"; 854*2001a81cSMasahiro Yamada reg = <0x300 0x10>; 855*2001a81cSMasahiro Yamada #phy-cells = <0>; 856*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 857*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 18>; 858*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 859*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 18>; 860*2001a81cSMasahiro Yamada vbus-supply = <&usb_vbus0>; 861*2001a81cSMasahiro Yamada }; 862*2001a81cSMasahiro Yamada 863*2001a81cSMasahiro Yamada usb_ssphy1: ss-phy@310 { 864*2001a81cSMasahiro Yamada compatible = "socionext,uniphier-ld20-usb3-ssphy"; 865*2001a81cSMasahiro Yamada reg = <0x310 0x10>; 866*2001a81cSMasahiro Yamada #phy-cells = <0>; 867*2001a81cSMasahiro Yamada clock-names = "link", "phy"; 868*2001a81cSMasahiro Yamada clocks = <&sys_clk 14>, <&sys_clk 19>; 869*2001a81cSMasahiro Yamada reset-names = "link", "phy"; 870*2001a81cSMasahiro Yamada resets = <&sys_rst 14>, <&sys_rst 19>; 871*2001a81cSMasahiro Yamada vbus-supply = <&usb_vbus1>; 872*2001a81cSMasahiro Yamada }; 873*2001a81cSMasahiro Yamada }; 874*2001a81cSMasahiro Yamada 875*2001a81cSMasahiro Yamada /* FIXME: U-Boot own node */ 876cd62214dSMasahiro Yamada usb: usb@65b00000 { 877cd62214dSMasahiro Yamada compatible = "socionext,uniphier-ld20-dwc3"; 878cd62214dSMasahiro Yamada reg = <0x65b00000 0x1000>; 879cd62214dSMasahiro Yamada #address-cells = <1>; 880cd62214dSMasahiro Yamada #size-cells = <1>; 881cd62214dSMasahiro Yamada ranges; 882cd62214dSMasahiro Yamada pinctrl-names = "default"; 883cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>, 884cd62214dSMasahiro Yamada <&pinctrl_usb2>, <&pinctrl_usb3>; 885cd62214dSMasahiro Yamada dwc3@65a00000 { 886cd62214dSMasahiro Yamada compatible = "snps,dwc3"; 887cd62214dSMasahiro Yamada reg = <0x65a00000 0x10000>; 888cd62214dSMasahiro Yamada interrupts = <0 134 4>; 8893444d1d4SMasahiro Yamada dr_mode = "host"; 890cd62214dSMasahiro Yamada tx-fifo-resize; 891cd62214dSMasahiro Yamada }; 892cd62214dSMasahiro Yamada }; 893cd62214dSMasahiro Yamada 894cd62214dSMasahiro Yamada nand: nand@68000000 { 8954e7f8de4SMasahiro Yamada compatible = "socionext,uniphier-denali-nand-v5b"; 896cd62214dSMasahiro Yamada status = "disabled"; 897cd62214dSMasahiro Yamada reg-names = "nand_data", "denali_reg"; 898cd62214dSMasahiro Yamada reg = <0x68000000 0x20>, <0x68100000 0x1000>; 899cd62214dSMasahiro Yamada interrupts = <0 65 4>; 900cd62214dSMasahiro Yamada pinctrl-names = "default"; 901cd62214dSMasahiro Yamada pinctrl-0 = <&pinctrl_nand>; 902*2001a81cSMasahiro Yamada clock-names = "nand", "nand_x", "ecc"; 903*2001a81cSMasahiro Yamada clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; 904b443fb42SMasahiro Yamada resets = <&sys_rst 2>; 905cd62214dSMasahiro Yamada }; 90652159d27SMasahiro Yamada }; 90752159d27SMasahiro Yamada}; 90852159d27SMasahiro Yamada 9096c9e46efSMasahiro Yamada#include "uniphier-pinctrl.dtsi" 9103e98fc12SMasahiro Yamada 9113e98fc12SMasahiro Yamada&pinctrl_aout1 { 9123e98fc12SMasahiro Yamada drive-strength = <4>; /* default: 3.5mA */ 9133e98fc12SMasahiro Yamada 9143e98fc12SMasahiro Yamada ao1dacck { 9153e98fc12SMasahiro Yamada pins = "AO1DACCK"; 9163e98fc12SMasahiro Yamada drive-strength = <5>; /* 5mA */ 9173e98fc12SMasahiro Yamada }; 9183e98fc12SMasahiro Yamada}; 9193e98fc12SMasahiro Yamada 9203e98fc12SMasahiro Yamada&pinctrl_aoutiec1 { 9213e98fc12SMasahiro Yamada drive-strength = <4>; /* default: 3.5mA */ 9223e98fc12SMasahiro Yamada 9233e98fc12SMasahiro Yamada ao1arc { 9243e98fc12SMasahiro Yamada pins = "AO1ARC"; 9253e98fc12SMasahiro Yamada drive-strength = <11>; /* 11mA */ 9263e98fc12SMasahiro Yamada }; 9273e98fc12SMasahiro Yamada}; 928