1b36a2472SKunihiko Hayashi# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2b36a2472SKunihiko Hayashi%YAML 1.2
3b36a2472SKunihiko Hayashi---
4b36a2472SKunihiko Hayashi$id: http://devicetree.org/schemas/phy/socionext,uniphier-pcie-phy.yaml#
5b36a2472SKunihiko Hayashi$schema: http://devicetree.org/meta-schemas/core.yaml#
6b36a2472SKunihiko Hayashi
7b36a2472SKunihiko Hayashititle: Socionext UniPhier PCIe PHY
8b36a2472SKunihiko Hayashi
9b36a2472SKunihiko Hayashidescription: |
10b36a2472SKunihiko Hayashi  This describes the devicetree bindings for PHY interface built into
11b36a2472SKunihiko Hayashi  PCIe controller implemented on Socionext UniPhier SoCs.
12b36a2472SKunihiko Hayashi
13b36a2472SKunihiko Hayashimaintainers:
14b36a2472SKunihiko Hayashi  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
15b36a2472SKunihiko Hayashi
16b36a2472SKunihiko Hayashiproperties:
17b36a2472SKunihiko Hayashi  compatible:
18b36a2472SKunihiko Hayashi    enum:
19b36a2472SKunihiko Hayashi      - socionext,uniphier-pro5-pcie-phy
20b36a2472SKunihiko Hayashi      - socionext,uniphier-ld20-pcie-phy
21b36a2472SKunihiko Hayashi      - socionext,uniphier-pxs3-pcie-phy
2221db1010SKunihiko Hayashi      - socionext,uniphier-nx1-pcie-phy
23b36a2472SKunihiko Hayashi
24b36a2472SKunihiko Hayashi  reg:
250499220dSRob Herring    maxItems: 1
26b36a2472SKunihiko Hayashi
27b36a2472SKunihiko Hayashi  "#phy-cells":
28b36a2472SKunihiko Hayashi    const: 0
29b36a2472SKunihiko Hayashi
30b36a2472SKunihiko Hayashi  clocks:
31b36a2472SKunihiko Hayashi    minItems: 1
32b36a2472SKunihiko Hayashi    maxItems: 2
33b36a2472SKunihiko Hayashi
34*09cc358aSKunihiko Hayashi  clock-names: true
35b36a2472SKunihiko Hayashi
36b36a2472SKunihiko Hayashi  resets:
37b36a2472SKunihiko Hayashi    minItems: 1
38b36a2472SKunihiko Hayashi    maxItems: 2
39b36a2472SKunihiko Hayashi
40*09cc358aSKunihiko Hayashi  reset-names: true
41b36a2472SKunihiko Hayashi
42b36a2472SKunihiko Hayashi  socionext,syscon:
43b36a2472SKunihiko Hayashi    $ref: /schemas/types.yaml#/definitions/phandle
44b36a2472SKunihiko Hayashi    description: A phandle to system control to set configurations for phy
45b36a2472SKunihiko Hayashi
46*09cc358aSKunihiko HayashiallOf:
47*09cc358aSKunihiko Hayashi  - if:
48*09cc358aSKunihiko Hayashi      properties:
49*09cc358aSKunihiko Hayashi        compatible:
50*09cc358aSKunihiko Hayashi          contains:
51*09cc358aSKunihiko Hayashi            const: socionext,uniphier-pro5-pcie-phy
52*09cc358aSKunihiko Hayashi    then:
53*09cc358aSKunihiko Hayashi      properties:
54*09cc358aSKunihiko Hayashi        clocks:
55*09cc358aSKunihiko Hayashi          minItems: 2
56*09cc358aSKunihiko Hayashi          maxItems: 2
57*09cc358aSKunihiko Hayashi        clock-names:
58*09cc358aSKunihiko Hayashi          items:
59*09cc358aSKunihiko Hayashi            - const: gio
60*09cc358aSKunihiko Hayashi            - const: link
61*09cc358aSKunihiko Hayashi        resets:
62*09cc358aSKunihiko Hayashi          minItems: 2
63*09cc358aSKunihiko Hayashi          maxItems: 2
64*09cc358aSKunihiko Hayashi        reset-names:
65*09cc358aSKunihiko Hayashi          items:
66*09cc358aSKunihiko Hayashi            - const: gio
67*09cc358aSKunihiko Hayashi            - const: link
68*09cc358aSKunihiko Hayashi    else:
69*09cc358aSKunihiko Hayashi      properties:
70*09cc358aSKunihiko Hayashi        clocks:
71*09cc358aSKunihiko Hayashi          maxItems: 1
72*09cc358aSKunihiko Hayashi        clock-names:
73*09cc358aSKunihiko Hayashi          const: link
74*09cc358aSKunihiko Hayashi        resets:
75*09cc358aSKunihiko Hayashi          maxItems: 1
76*09cc358aSKunihiko Hayashi        reset-names:
77*09cc358aSKunihiko Hayashi          const: link
78*09cc358aSKunihiko Hayashi
79b36a2472SKunihiko Hayashirequired:
80b36a2472SKunihiko Hayashi  - compatible
81b36a2472SKunihiko Hayashi  - reg
82b36a2472SKunihiko Hayashi  - "#phy-cells"
83b36a2472SKunihiko Hayashi  - clocks
84b36a2472SKunihiko Hayashi  - clock-names
85b36a2472SKunihiko Hayashi  - resets
86b36a2472SKunihiko Hayashi  - reset-names
87b36a2472SKunihiko Hayashi
88b36a2472SKunihiko HayashiadditionalProperties: false
89b36a2472SKunihiko Hayashi
90b36a2472SKunihiko Hayashiexamples:
91b36a2472SKunihiko Hayashi  - |
92b36a2472SKunihiko Hayashi    pcie_phy: phy@66038000 {
93b36a2472SKunihiko Hayashi        compatible = "socionext,uniphier-ld20-pcie-phy";
94b36a2472SKunihiko Hayashi        reg = <0x66038000 0x4000>;
95b36a2472SKunihiko Hayashi        #phy-cells = <0>;
96b36a2472SKunihiko Hayashi        clock-names = "link";
97b36a2472SKunihiko Hayashi        clocks = <&sys_clk 24>;
98b36a2472SKunihiko Hayashi        reset-names = "link";
99b36a2472SKunihiko Hayashi        resets = <&sys_rst 24>;
100b36a2472SKunihiko Hayashi        socionext,syscon = <&soc_glue>;
101b36a2472SKunihiko Hayashi    };
102