Home
last modified time | relevance | path

Searched full:txfifo (Results 1 – 25 of 66) sorted by relevance

123

/openbmc/linux/drivers/usb/host/
H A Docteon-hcd.h117 * @ptxfemplvl: Periodic TxFIFO Empty Level (PTxFEmpLvl)
119 * Indicates when the Periodic TxFIFO Empty Interrupt bit in the
123 * TxFIFO is half empty
125 * TxFIFO is completely empty
126 * @nptxfemplvl: Non-Periodic TxFIFO Empty Level (NPTxFEmpLvl)
128 * Indicates when the Non-Periodic TxFIFO Empty Interrupt bit in
132 * Periodic TxFIFO is half empty
134 * Periodic TxFIFO is completely empty
251 * @ptxfempmsk: Periodic TxFIFO Empty Mask (PTxFEmpMsk)
276 * @nptxfempmsk: Non-Periodic TxFIFO Empty Mask (NPTxFEmpMsk)
[all …]
/openbmc/u-boot/drivers/serial/
H A Dserial_sifive.c26 u32 txfifo; member
81 if (readl(&regs->txfifo) & UART_TXFIFO_FULL) in _sifive_serial_putc()
84 writel(c, &regs->txfifo); in _sifive_serial_putc()
180 return !!(readl(&regs->txfifo) & UART_TXFIFO_FULL); in sifive_serial_pending()
H A Dserial_mxc.c105 #define UTS_TXEMPTY (1<<6) /* TxFIFO empty */
107 #define UTS_TXFULL (1<<4) /* TxFIFO full */
/openbmc/qemu/hw/char/
H A Dsifive_uart.c108 s->txfifo &= ~SIFIVE_UART_TXFIFO_FULL; in sifive_uart_xmit()
128 s->txfifo |= SIFIVE_UART_TXFIFO_FULL; in sifive_uart_write_tx_fifo()
153 return s->txfifo; in sifive_uart_read()
287 s->txfifo = 0; in sifive_uart_reset_enter()
319 VMSTATE_UINT32(txfifo, SiFiveUARTState),
/openbmc/linux/drivers/spi/
H A Dspi-fsl-qspi.c178 * TKT253890, the controller needs the driver to fill the txfifo with
201 unsigned int txfifo; member
210 .txfifo = SZ_64,
219 .txfifo = SZ_512,
228 .txfifo = SZ_512,
238 .txfifo = SZ_512,
248 .txfifo = SZ_64,
257 .txfifo = SZ_64,
409 op->data.nbytes > q->devtype_data->txfifo) in fsl_qspi_supports_op()
708 if (op->data.nbytes > q->devtype_data->txfifo) in fsl_qspi_adjust_op_size()
[all …]
H A Dspi-imx.c113 unsigned int txfifo; /* number of words pushed in tx FIFO */ member
819 * when TXFIFO is half empty in mx31_prepare_transfer()
1155 while (spi_imx->txfifo < spi_imx->devtype_data->fifo_size) { in spi_imx_push()
1159 spi_imx->txfifo >= DIV_ROUND_UP(spi_imx->remainder, 4)) in spi_imx_push()
1162 spi_imx->txfifo++; in spi_imx_push()
1173 while (spi_imx->txfifo && in spi_imx_isr()
1176 spi_imx->txfifo--; in spi_imx_isr()
1184 if (spi_imx->txfifo) { in spi_imx_isr()
1499 spi_imx->txfifo = 0; in spi_imx_pio_transfer()
1530 spi_imx->txfifo = 0; in spi_imx_poll_transfer()
[all …]
H A Dspi-nxp-fspi.c331 unsigned int txfifo; member
340 .txfifo = SZ_1K, /* (128 * 64 bits) */
349 .txfifo = SZ_1K, /* (128 * 64 bits) */
358 .txfifo = SZ_1K, /* (128 * 64 bits) */
367 .txfifo = SZ_1K, /* (128 * 64 bits) */
376 .txfifo = SZ_1K, /* (128 * 64 bits) */
502 op->data.nbytes > f->devtype_data->txfifo) in nxp_fspi_supports_op()
802 /* Wait for TXFIFO empty */ in nxp_fspi_fill_txfifo()
817 /* Wait for TXFIFO empty */ in nxp_fspi_fill_txfifo()
968 if (op->data.nbytes > f->devtype_data->txfifo) in nxp_fspi_adjust_op_size()
[all …]
H A Dspi-xilinx.c70 #define XSPI_INTR_TX_EMPTY 0x04 /* TxFIFO is empty */
71 #define XSPI_INTR_TX_UNDERRUN 0x08 /* TxFIFO was underrun */
74 #define XSPI_INTR_TX_HALF_EMPTY 0x40 /* TxFIFO is half empty */
H A Dspi-zynq-qspi.c262 * zynq_qspi_txfifo_op - Write 1..4 bytes from TX buffer to TxFIFO
398 * @txempty: Indicates that TxFIFO is empty
408 * We must empty the TxFIFO between accesses to TXD0, in zynq_qspi_write_op()
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,xcvr.yaml38 - const: txfifo
95 reg-names = "ram", "regs", "rxfifo", "txfifo";
/openbmc/linux/drivers/tty/serial/
H A Dimx_earlycon.c16 #define UTS_TXFULL (1<<4) /* TxFIFO full */
/openbmc/linux/drivers/usb/gadget/udc/
H A Damd5536udc.h256 /* EP0in txfifo = 128 bytes*/
258 /* EP0in fullspeed txfifo = 128 bytes*/
500 u32 __iomem *txfifo; member
552 u32 __iomem *txfifo; member
H A Damd5536udc_pci.c140 dev->txfifo = (u32 __iomem *)(dev->virt_addr + UDC_TXFIFO_ADDR); in udc_pci_probe()
H A Dsnps_udc_core.c289 ep->txfifo = dev->txfifo; in udc_set_txfifo_addr()
297 ep->txfifo += tmp; in udc_set_txfifo_addr()
667 writel(*(buf + i), ep->txfifo); in udc_txfifo_write()
672 ep->txfifo); in udc_txfifo_write()
1544 /* txfifo size is calculated at enable time */ in udc_setup_endpoints()
1545 ep->txfifo = dev->txfifo; in udc_setup_endpoints()
H A Dsnps_udc_plat.c130 udc->txfifo = (u32 __iomem *)(udc->virt_addr + UDC_TXFIFO_ADDR); in udc_plat_probe()
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dspear_spics.txt6 released as soon as transfer is over and TxFIFO becomes empty. This is not
/openbmc/qemu/include/hw/char/
H A Dsifive_uart.h72 uint32_t txfifo; member
/openbmc/linux/drivers/usb/serial/
H A Dio_edgeport.c152 struct TxFifo { struct
165 struct TxFifo txfifo; /* transmit fifo -- size will be maxTxCredits */ argument
909 /* create the txfifo */ in edge_open()
910 edge_port->txfifo.head = 0; in edge_open()
911 edge_port->txfifo.tail = 0; in edge_open()
912 edge_port->txfifo.count = 0; in edge_open()
913 edge_port->txfifo.size = edge_port->maxTxCredits; in edge_open()
914 edge_port->txfifo.fifo = kmalloc(edge_port->maxTxCredits, GFP_KERNEL); in edge_open()
916 if (!edge_port->txfifo.fifo) { in edge_open()
1008 struct TxFifo *fifo = &edge_port->txfifo; in block_until_tx_empty()
[all …]
/openbmc/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pcsx-defs.h516 uint64_t txfifo:1; member
526 uint64_t txfifo:1;
548 uint64_t txfifo:1; member
558 uint64_t txfifo:1;
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dregs-mmc.h32 uint32_t txfifo; member
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dsnps,dwc3.yaml358 description: Specifies the max number of packets the txfifo resizing logic
360 higher the number, the more fifo space the txfifo resizing logic will
/openbmc/linux/drivers/platform/olpc/
H A Dolpc-xo175-ec.c362 /* Throw command into TxFIFO */ in olpc_xo175_ec_complete()
461 /* Most non-command packets get the TxFIFO refilled and an ACK. */ in olpc_xo175_ec_complete()
/openbmc/linux/drivers/usb/dwc3/
H A Dgadget.c656 * dwc3_gadget_calc_tx_fifo_size - calculates the txfifo size value
668 * The max packet size is set to 1024, as the txfifo requirements mainly apply
691 * dwc3_gadget_calc_ram_depth - calculates the ram depth for txfifo
712 * between the RX and TX FIFOs. This means that the txfifo can begin in dwc3_gadget_calc_ram_depth()
729 * dwc3_gadget_clear_tx_fifos - Clears txfifo allocation
732 * Iterates through all the endpoint registers and clears the previous txfifo
745 /* Read ep0IN related TXFIFO size */ in dwc3_gadget_clear_tx_fifos()
754 /* Clear existing TXFIFO for all IN eps except ep0 */ in dwc3_gadget_clear_tx_fifos()
778 * on the configured size for RAM1 - which contains TxFifo -,
3110 * of the TXFIFO size
[all...]
/openbmc/u-boot/drivers/mmc/
H A Dpxa_mmc_gen.c238 writel(*buf++, &regs->txfifo); in pxa_mmc_do_write_xfer()
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-fh.h533 * from the RTC TxFIFO and the current value of the TxCredit counter was
535 * synchronized to the TxFIFO status

123