/openbmc/linux/drivers/memory/ |
H A D | jedec_ddr_data.c | 48 .tZQCS = 90000, 69 .tZQCS = 90000, 90 .tZQCS = 90000, 111 .tZQCS = 90000,
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H A D | of_memory.c | 81 ret |= of_property_read_u32(np, "tZQCS", &tim->tZQCS); in of_do_get_timings()
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H A D | jedec_ddr.h | 162 u32 tZQCS; member
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | elpida_ecb240abacn.dtsi | 39 tZQCS = <90000>; 61 tZQCS = <90000>;
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/openbmc/u-boot/arch/arm/mach-omap2/omap4/ |
H A D | emif.c | 38 .tZQCS = 90, 62 .tZQCS = 90,
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H A D | sdram_elpida.c | 205 .tZQCS = 90, 228 .tZQCS = 90, 251 .tZQCS = 90,
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
H A D | jedec,lpddr2-timings.yaml | 97 tZQCS: 133 tZQCS = <90000>;
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H A D | jedec,lpddr2.yaml | 178 tZQCS = <90000>; 199 tZQCS = <90000>;
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/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/ |
H A D | sdram_rk3036.h | 63 u32 tzqcs; member 260 u32 tzqcs; member
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H A D | sdram.h | 66 u32 tzqcs; member
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H A D | ddr_rk3368.h | 67 u32 tzqcs; member
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H A D | sdram_rk322x.h | 99 u32 tzqcs; member 225 u32 tzqcs; member
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H A D | ddr_rk3288.h | 62 u32 tzqcs; member
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/openbmc/u-boot/arch/arm/mach-omap2/omap5/ |
H A D | emif.c | 39 .tZQCS = 90,
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H A D | sdram.c | 627 .tZQCS = 90,
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/openbmc/u-boot/arch/arm/mach-sunxi/ |
H A D | dram_sun9i.c | 136 struct dram_sun9i_timing tZQCS; member 398 const u32 tZQCS = MAX(para->tZQCS.ck, in mctl_channel_init() local 399 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init() 600 (MCTL_DIV2(tZQCS)), &mctl_ctl->zqctrl[0]); in mctl_channel_init() 906 .tZQCS = { .ck = 64, .ps = 80000 }, in sunxi_dram_init()
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H A D | dram_sun6i.c | 225 writel(MCTL_TZQCS, &mctl_ctl->tzqcs); in mctl_channel_init()
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/openbmc/u-boot/doc/device-tree-bindings/clock/ |
H A D | rockchip,rk3288-dmc.txt | 76 tzqcs
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/openbmc/linux/arch/mips/include/asm/octeon/ |
H A D | cvmx-lmcx-defs.h | 2605 uint64_t tzqcs:4; member 2609 uint64_t tzqcs:4; 2634 uint64_t tzqcs:4; member 2638 uint64_t tzqcs:4; 2662 uint64_t tzqcs:4; member 2666 uint64_t tzqcs:4;
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/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
H A D | dram_sun6i.h | 90 u32 tzqcs; /* 0x118 */ member
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/openbmc/u-boot/arch/arm/include/asm/ |
H A D | emif.h | 1154 u8 tZQCS; member
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/openbmc/u-boot/drivers/ram/rockchip/ |
H A D | dmc-rk3368.c | 508 pctl_timing->tzqcs = max(64u, ps_to_tCK(80000, freq)); in pctl_calc_timings()
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/openbmc/u-boot/arch/arm/mach-omap2/ |
H A D | emif-common.c | 754 val = ns_2_cycles(timings->tZQCS) - 1; in get_sdram_tim_3_reg()
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/openbmc/u-boot/drivers/ddr/fsl/ |
H A D | ctrl_regs.c | 2195 /* Normal Operation Short Calibration Time (tZQCS) */ in set_ddr_zq_cntl()
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