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/openbmc/u-boot/board/freescale/ls1021atwr/
H A DREADME2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
/openbmc/u-boot/board/freescale/ls1021aqds/
H A DREADME2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
/openbmc/u-boot/drivers/spi/
H A Dspi-mem.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <spi-mem.h>
20 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
24 * @sgt: a pointer to a non-initialized sg_table that will be filled by this
27 * Some controllers might want to do DMA on the data buffer embedded in @op.
28 * This helper prepares everything for you and provides a ready-to-use
32 * op->data.buf.{in,out} is DMA-able before calling this function.
42 if (!op->data.nbytes) in spi_controller_dma_map_mem_op_data()
43 return -EINVAL; in spi_controller_dma_map_mem_op_data()
45 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx) in spi_controller_dma_map_mem_op_data()
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/openbmc/u-boot/include/
H A Dusb_defs.h1 /* SPDX-License-Identifier: GPL-2.0+ */
24 /* some HID sub classes */
34 /* Sub STORAGE Classes */
36 #define US_SC_8020 2 /* CD-ROM */
37 #define US_SC_QIC 3 /* QIC-157 Tapes */
192 /* USB-status codes: */
240 * from USB 3.0 spec Table 10-8
264 * See USB 3.0 spec Table 10-10
285 * See USB 3.0 spec Table 10-12
314 * One type grows from USB 1.1 host controllers (OHCI, UHCI etc).
H A Dpci.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
33 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
39 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
75 /* Base Class 0x12 - 0xFE is reserved */
78 #define PCI_CLASS_SUB_CODE 0x0a /* Device sub-class code */
228 /* 0x35-0x3b are reserved */
236 /* Header type 1 (PCI-to-PCI bridges) */
263 /* 0x35-0x3b is reserved */
265 /* 0x3c-0x3d are same as for htype 0 */
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/openbmc/libcper/sections/
H A Dcper-section-pcie.c12 #include <libcper/cper-utils.h>
13 #include <libcper/sections/cper-section-pcie.h>
23 // Base Class 00h - Legacy devices
25 "All currently implemented devices except VGA-compatible devices" },
26 { 0x00, 0x01, 0x00, "VGA-compatible device" },
28 // Base Class 01h - Mass storage controllers
29 { 0x01, 0x00, 0x00, "SCSI controller - vendor-specific interface" },
31 "SCSI storage device - SCSI over PCI Express (SOP) with PQI" },
33 "SCSI controller - SCSI over PCI Express (SOP) with PQI" },
35 "SCSI storage device and SCSI controller - SOP with PQI" },
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/openbmc/u-boot/drivers/ddr/fsl/
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2008-2014 Freescale Semiconductor, Inc.
19 * of DDR controllers. It is the same as CONFIG_SYS_DDR_SDRAM_BASE for
98 * See Jedec standar No. 21-C for detail in __get_spd()
107 (int)sizeof(generic_spd_eeprom_t) - 256)); in __get_spd()
168 * - Same number of CONFIG_DIMM_SLOTS_PER_CTLR on each controller
169 * - Same memory data bus width on all controllers
179 * -------------------------------|-----------|-----------|-----------------
181 * logical bank/sub-bank |bank |bank |bank address (BA)
187 * _BETWEEN_ two seperate memory controllers. This is configured only in
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H A Dinteractive.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2010-2016 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP Semiconductor
140 pspd = &(pinfo->spd_installed_dimms[ctrl_num][dimm_num]); in fsl_ddr_spd_edit()
145 sizeof((common_timing_params_t *)0)->x, 0}
152 common_timing_params_t *p = &pinfo->common_timing_params[ctrl_num]; in lowest_common_dimm_parameters_edit()
210 sizeof((dimm_params_t *)0)->x, 0}
212 sizeof((dimm_params_t *)0)->x, 1}
220 dimm_params_t *p = &(pinfo->dimm_params[ctrl_num][dimm_num]); in fsl_ddr_dimm_parameters_edit()
410 if (pdimm->n_ranks == 0) { in print_dimm_parameters()
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/openbmc/u-boot/cmd/
H A Dpcmcia.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2006
10 * m8xx_pcmcia.c - Linux PCMCIA socket driver for the mpc8xx series.
11 * (C) 1999-2000 Magnus Damm <damm@bitsmart.com>
13 * "The ExCA standard specifies that socket controllers should provide
16 * arbitrary segments of card address space. " - David A Hinds. 1999
24 * - no offset register. sigh.
45 /* -------------------------------------------------------------------- */
74 "PCMCIA sub-system",
75 "on - power on PCMCIA socket\n"
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H A Dusb.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Adapted for U-Boot driver model
17 #include <dm/uclass-internal.h>
25 static int usb_stor_curr_dev = -1; /* current device */
28 static int __maybe_unused usb_ether_curr_dev = -1; /* current ethernet device */
100 printf("SFF-8020i (ATAPI)"); in usb_display_class_sub()
103 printf("QIC-157 (Tape)"); in usb_display_class_sub()
109 printf("SFF-8070"); in usb_display_class_sub()
152 uint packet_size = dev->descriptor.bMaxPacketSize0; in usb_display_desc()
154 if (dev->descriptor.bDescriptorType == USB_DT_DEVICE) { in usb_display_desc()
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H A DKconfig4 bool "Support U-Boot commands"
7 Enable U-Boot's command-line functions. This provides a means
8 to enter commands into U-Boot for a wide variety of purposes. It
12 substantially to the size of U-Boot.
71 U-Boot automatic booting process and bring the device
72 to the U-Boot prompt for user input.
103 autoboot starts booting, U-Boot gives a command prompt. The
104 U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is
116 U-Boot gives a command prompt. The U-Boot prompt never
120 bool "Enable Ctrl-C autoboot interruption"
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/openbmc/qemu/docs/devel/
H A Dmulti-process.rst1 Multi-process QEMU
6 This is the design document for multi-process QEMU. It does not
31 -------------
34 VM control point, where VMs can be created, migrated, re-configured, and
40 A multi-process QEMU
43 A multi-process QEMU involves separating QEMU services into separate
51 A QEMU control process would remain, but in multi-process mode, will
53 provide the user interface to hot-plug devices or live migrate the VM.
55 A first step in creating a multi-process QEMU is to separate IO services
62 ----------------------
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/openbmc/qemu/hw/intc/
H A Dpnv_xive.c4 * Copyright (c) 2017-2024, IBM Corporation.
6 * SPDX-License-Identifier: GPL-2.0-or-later
24 #include "hw/qdev-properties.h"
54 * 0 - IPI,
55 * 1 - HWD,
56 * 2 - First escalate,
57 * 3 - Second escalate,
58 * 4 - Redistribution,
59 * 5 - IPI cascaded queue ?
65 qemu_log_mask(LOG_GUEST_ERROR, "XIVE[%x] - " fmt "\n", \
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H A Dpnv_xive2.c4 * Copyright (c) 2019-2024, IBM Corporation.
6 * SPDX-License-Identifier: GPL-2.0-or-later
25 #include "hw/qdev-properties.h"
71 * fifos of the VC sub-engine in case of overflow.
73 * 0 - IPI,
74 * 1 - HWD,
75 * 2 - NxC,
76 * 3 - INT,
77 * 4 - OS-Queue,
78 * 5 - Pool-Queue,
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/openbmc/u-boot/
H A DREADME1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000 - 2013
9 This directory contains the source code for U-Boot, a boot loader for
15 The development of U-Boot is closely related to Linux: some parts of
37 scattered throughout the U-Boot source identifying the people or
41 actual U-Boot source tree; however, it can be created dynamically
51 U-Boot, you should send a message to the U-Boot mailing list at
52 <u-boot@lists.denx.de>. There is also an archive of previous traffic
53 on the mailing list - please search the archive before asking FAQ's.
54 Please see http://lists.denx.de/pipermail/u-boot and
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/openbmc/ipmitool/
H A DChangeLog1 version 1.8.15 2014-11-24
2 * ID: 340 - ipmitool sol session improperly closes on packet retry
3 * ID: 277 - support for hostnames longer than 64 chars
4 * ID: 313 - ipmitool doesn't support hostname long than 64 symbols
5 * ID: 277 - Minor issue with ipmi_intf_session_set_hostname()
6 * ID: 247 - 'sensor thresh' help output is wrong
7 * ID: 324 - conflicting declaration write_fru_area()
8 * ID: 337 - Add support for 13G Dell PowerEdge
9 * ID: 325 - DDR4 DIMM Decoding Logic
10 * ID: 328 - HPM.2 fixes
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/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema-installed/
H A DComputerSystem.v1_26_0.json4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2025 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
46 "description": "The available OEM-specific actions for this resource.",
47 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
59 …"This parameter shall contain the current ETag of the system. If the client-provided ETag does no…
70 … the current ETag of the resource block to add to the system. If the client-provided ETag does no…
75 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
91 "format": "uri-reference",
125 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
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H A DChassis.v1_28_0.json4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2025 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
31 "description": "The available OEM-specific actions for this resource.",
32 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
39 …nts the physical components of a system. This resource represents the sheet-metal confined spaces…
42 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
57 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/context"
60 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/etag"
63 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/id"
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/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/
H A DComputerSystem.v1_26_0.json4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2025 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
46 "description": "The available OEM-specific actions for this resource.",
47 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
59 …"This parameter shall contain the current ETag of the system. If the client-provided ETag does no…
70 … the current ETag of the resource block to add to the system. If the client-provided ETag does no…
75 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
91 "format": "uri-reference",
125 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
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H A DChassis.v1_28_0.json4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2025 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
31 "description": "The available OEM-specific actions for this resource.",
32 …"longDescription": "This property shall contain the available OEM-specific actions for this resour…
39 …nts the physical components of a system. This resource represents the sheet-metal confined spaces…
42 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
57 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/context"
60 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/etag"
63 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/id"
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/openbmc/u-boot/drivers/usb/host/
H A Dohci-hcd.c1 // SPDX-License-Identifier: GPL-2.0+
16 * (C) Copyright 2000-2002 David Brownell
19 * ebenard@eukrea.com - based on s3c24x0's driver
23 * 1 - Read doc/README.generic_usb_ohci
24 * 2 - this driver is intended for use with USB Mass Storage Devices
26 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
148 /* DevNotResp */ -1,
153 /* reservd */ -1,
154 /* reservd */ -1,
157 /* Not Access */ -1,
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/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2007-2015
10 * Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
26 * Allwinner as part of the open-source bootloader release (refer to
27 * https://github.com/allwinner-zh/bootloader.git) and augments the upstream
30 * documentation for other memory controllers based on the (Synopsys)
36 * Note that the Zynq-documentation provides a very close match for the DDR
42 * (i.e. the rules for MEMC_FREQ_RATIO=2 from the Zynq-documentation apply).
48 * 1) Only DDR3 support is implemented, as our test platform (the A80-Q7
50 * 2) Only 2T-mode has been implemented and tested.
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/openbmc/qemu/
H A Dqemu-options.hx14 "-h or -help display this help and exit\n", QEMU_ARCH_ALL)
16 ``-h``
21 "-version display version information and exit\n", QEMU_ARCH_ALL)
23 ``-version``
28 "-machine [type=]name[,prop[=value][,...]]\n"
29 " selects emulated machine ('-machine help' for list)\n"
33 " dump-guest-core=on|off include guest memory in a core dump (default=on)\n"
34 " mem-merge=on|off controls memory merge support (default: on)\n"
35 " aes-key-wrap=on|off controls support for AES key wrapping (default=on)\n"
36 " dea-key-wrap=on|off controls support for DEA key wrapping (default=on)\n"
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/openbmc/qemu/hw/ssi/
H A Daspeed_smc.c31 #include "qemu/error-report.h"
37 #include "hw/qdev-properties.h"
80 (!((s)->regs[R_CE_CMD_CTRL] & (1 << (CTRL_ADDR_BYTE0_DISABLE_SHIFT + (i)))))
82 (!((s)->regs[R_CE_CMD_CTRL] & (1 << (CTRL_DATA_BYTE0_DISABLE_SHIFT + (i)))))
115 #define SEG_START_SHIFT 16 /* address bit [A29-A23] */
178 * range is 0x40000000 - 0x5FFFFFFF (AST2400)
179 * 0x80000000 - 0xBFFFFFFF (AST2500)
182 * range is 0x20000000 - 0x2FFFFFFF.
192 #define DMA_DRAM_ADDR(asc, val) ((val) & (asc)->dma_dram_mask)
194 #define DMA_FLASH_ADDR(asc, val) ((val) & (asc)->dma_flash_mask)
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/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_base.c7 * http://www.linux-mtd.infradead.org/doc/nand.html
10 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
20 * Check, if mtd->ecctype should be set to MTD_ECC_HW
113 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
115 ret = -EINVAL; in check_offs_len()
119 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
121 ret = -EINVAL; in check_offs_len()
128 * nand_release_device - [GENERIC] release chip
137 /* De-select the NAND device */ in nand_release_device()
138 chip->select_chip(mtd, -1); in nand_release_device()
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