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/openbmc/linux/tools/perf/Documentation/
H A Dperf-daemon.txt1 perf-daemon(1)
6 ----
7 perf-daemon - Run record sessions on background
11 --------
16 'perf daemon stop' [<options>]
22 -----------
32 …916507 916508 ... \_ perf record --control=fifo:control,ack -m 10M -e cycles --overwrite --switc…
33 …916507 916509 ... \_ perf record --control=fifo:control,ack -m 20M -e sched:* --overwrite --swit…
38 to produce data periodically, like with --switch-output configuration
41 Each session is started with control setup (with perf record --control
[all …]
/openbmc/u-boot/drivers/i2c/
H A Dmv_i2c.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 /* Shall the current transfer have a start/stop condition? */
16 /* Shall the current transfer be ack/nacked or being waited for it? */
28 /* ----- Control register bits ---------------------------------------- */
31 #define ICR_STOP 0x2 /* stop bit */
32 #define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */
41 #define ICR_SSDIE 0x800 /* slave STOP detected int enable */
55 /* ----- Status register bits ----------------------------------------- */
58 #define ISR_ACKNAK 0x2 /* ack/nak status */
61 #define ISR_SSD 0x10 /* slave stop detected */
[all …]
H A Dsoft_i2c.c1 // SPDX-License-Identifier: GPL-2.0+
15 * Please see doc/driver-model/i2c-howto.txt for instructions.
96 /*-----------------------------------------------------------------------
101 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
113 /*-----------------------------------------------------------------------
126 /*-----------------------------------------------------------------------
129 * <stop> at the end of the sequence for belts & suspenders.
155 /*-----------------------------------------------------------------------
156 * START: High -> Low on SDA while SCL is High
172 /*-----------------------------------------------------------------------
[all …]
H A Di2c-versatile.c1 // SPDX-License-Identifier: GPL-2.0+
30 writel(SDA, priv->base + (state ? I2C_SET_REG : I2C_CLEAR_REG)); in versatile_sda_set()
31 udelay(priv->delay); in versatile_sda_set()
36 int v = !!(readl(priv->base + I2C_CONTROL_REG) & SDA); in versatile_sda_get()
38 udelay(priv->delay); in versatile_sda_get()
44 writel(SCL, priv->base + (state ? I2C_SET_REG : I2C_CLEAR_REG)); in versatile_scl_set()
45 udelay(priv->delay); in versatile_scl_set()
50 int v = !!(readl(priv->base + I2C_CONTROL_REG) & SCL); in versatile_scl_get()
52 udelay(priv->delay); in versatile_scl_get()
59 udelay(priv->delay); in versatile_i2c_start()
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H A Dmvtwsi.c1 // SPDX-License-Identifier: GPL-2.0+
87 /* Number of the device (determined from cell-index property) */
99 * enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control
107 /* Stop bit */
118 * On sun6i and newer, IFLG is a write-clear bit, which is cleared by writing 1;
129 * enum mvstwsi_status_values - Possible values of I2C controller's status
133 * non-10-bit-address devices are specified.
144 /* Address + write bit transmitted, ACK received */
146 /* Data transmitted, ACK received */
148 /* Address + read bit transmitted, ACK received */
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H A Di2c-gpio.c5 * This file is based on: drivers/i2c/soft-i2c.c,
6 * with added driver-model support and code cleanup.
29 * udelay - delay [us] between GPIO toggle operations,
85 /* START: High -> Low on SDA while SCL is High */
98 /* STOP: Low -> High on SDA while SCL is High */
112 /* ack should be I2C_ACK or I2C_NOACK */
114 int delay, int ack) in i2c_gpio_send_ack() argument
116 i2c_gpio_write_bit(scl, sda, delay, ack); in i2c_gpio_send_ack()
124 * <stop> at the end of the sequence for belts & suspenders.
161 /* Look for an <ACK>(negative logic) and return it */ in i2c_gpio_write_byte()
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/openbmc/linux/tools/perf/tests/shell/
H A Ddaemon.sh3 # SPDX-License-Identifier: GPL-2.0
59 local ack=$7
102 if [ "${ack}" != "${line_ack}" ]; then
103 echo "FAILED: wrong ack"
118 line=`perf daemon --config ${config} -x: | head -1`
123 trap - SIGINT SIGTERM
125 # stop daemon
126 perf daemon stop --config ${config}
129 tail --pid=${pid} -f /dev/null
137 perf daemon start --config ${config}
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/openbmc/linux/drivers/infiniband/hw/qib/
H A Dqib_twsi.c3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * Originally written for a not-quite-i2c serial eeprom, which is
45 * variety of other uses, most board-specific, so the bit-boffing
47 * have been moved to chip-specific files.
59 * i2c_wait_for_writes - wait for a write
74 dd->f_gpio_mod(dd, 0, 0, 0); in i2c_wait_for_writes()
84 /* BUF_WAIT is time bus must be free between STOP or ACK and to next START.
95 mask = 1UL << dd->gpio_scl_num; in scl_out()
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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sc7280-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,sc7280-adsp-pil
23 - description: qdsp6ss register
24 - description: efuse q6ss register
28 - description: Phandle to apps_smmu node with sid mask
32 - description: Watchdog interrupt
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H A Dqcom,sc7280-wpss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-wpss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,sc7280-wpss-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
[all …]
H A Dqcom,sc7180-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7180-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
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H A Dqcom,pas-common.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
20 clock-names:
30 - description: Watchdog interrupt
31 - description: Fatal interrupt
32 - description: Ready interrupt
33 - description: Handover interrupt
[all …]
H A Dqcom,sc7280-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
[all …]
H A Dqcom,msm8996-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Sibi Sankar <quic_sibis@quicinc.com>
20 - qcom,msm8996-mss-pil
21 - qcom,msm8998-mss-pil
22 - qcom,sdm660-mss-pil
23 - qcom,sdm845-mss-pil
[all …]
H A Dqcom,sdm845-adsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,sdm845-adsp-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
[all …]
H A Dqcom,qcs404-cdsp-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
19 - qcom,qcs404-cdsp-pil
28 - description: Watchdog interrupt
29 - description: Fatal interrupt
30 - description: Ready interrupt
31 - description: Handover interrupt
[all …]
/openbmc/linux/drivers/i2c/algos/
H A Di2c-algo-pca.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
15 #include <linux/i2c-algo-pca.h>
26 #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
27 #define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
30 #define pca_clock(adap) adap->i2c_clock
33 #define pca_wait(adap) adap->wait_for_completion(adap->data)
37 if (adap->chip == I2C_PCA_CHIP_9665) { in pca_reset()
46 * After a reset we need to re-apply any configuration in pca_reset()
50 pca_outw(adap, I2C_PCA_IND, adap->bus_settings.mode); in pca_reset()
[all …]
H A Di2c-algo-bit.c1 // SPDX-License-Identifier: GPL-2.0+
3 * i2c-algo-bit.c: i2c driver algorithms for bit-shift adapters
5 * Copyright (C) 1995-2000 Simon G. Vogl
17 #include <linux/i2c-algo-bit.h>
20 /* ----- global defines ----------------------------------------------- */
33 /* ----- global variables --------------------------------------------- */
35 static int bit_test; /* see if the line-setting functions work */
37 MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
43 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
46 /* --- setting states on the bus with the right timing: --------------- */
[all …]
/openbmc/linux/drivers/media/pci/cobalt/
H A Dcobalt-i2c.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Derived from cx18-i2c.c
7 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
11 #include "cobalt-driver.h"
12 #include "cobalt-i2c.h"
15 /* Clock prescaler register lo-byte */
18 /* Clock prescaler register high-byte */
32 /* CTR[7:0] - Control register */
40 /* CR[7:0] - Command register */
45 /* I2C stop condition */
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-gxp.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
15 "gxp-i2c0", "gxp-i2c1", "gxp-i2c2", "gxp-i2c3",
16 "gxp-i2c4", "gxp-i2c5", "gxp-i2c6", "gxp-i2c7",
17 "gxp-i2c8", "gxp-i2c9" };
100 drvdata->buf = drvdata->curr_msg->buf; in gxp_i2c_start()
101 drvdata->buf_remaining = drvdata->curr_msg->len; in gxp_i2c_start()
104 value = drvdata->curr_msg->addr << 9; in gxp_i2c_start()
107 value |= drvdata->curr_msg->flags & I2C_M_RD ? RW_CMD | START_CMD : START_CMD; in gxp_i2c_start()
109 drvdata->state = GXP_I2C_ADDR_PHASE; in gxp_i2c_start()
[all …]
H A Di2c-hix5hd2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
72 HIX5I2C_STAT_RW_ERR = -1,
85 int stop; member
97 u32 val = readl_relaxed(priv->regs + HIX5I2C_SR); in hix5hd2_i2c_clr_pend_irq()
99 writel_relaxed(val, priv->regs + HIX5I2C_ICR); in hix5hd2_i2c_clr_pend_irq()
106 writel_relaxed(I2C_CLEAR_ALL, priv->regs + HIX5I2C_ICR); in hix5hd2_i2c_clr_all_irq()
111 writel_relaxed(0, priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_disable_irq()
117 priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_enable_irq()
126 val = readl_relaxed(priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_drv_setrate()
127 writel_relaxed(val & (~I2C_UNMASK_TOTAL), priv->regs + HIX5I2C_CTRL); in hix5hd2_i2c_drv_setrate()
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/openbmc/linux/Documentation/i2c/
H A Dslave-interface.rst5 by Wolfram Sang <wsa@sang-engineering.com> in 2014-15
10 example for the latter is the slave-eeprom driver, which acts as a dual memory
16 use a character device, be in-kernel only, or something completely different::
20 +-----------+ v +---------+ v +--------+ v +------------+
21 | Userspace +........+ Backend +-----------+ Driver +-----+ Controller |
22 +-----------+ +---------+ +--------+ +------------+
24 ----------------------------------------------------------------+-- I2C
25 --------------------------------------------------------------+---- Bus
35 them as described in the document instantiating-devices.rst. The only
38 instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64
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H A Dgpio-fault-injection.rst12 'i2c-fault-injector' subdirectory in the Kernel debugfs filesystem, usually
15 injection. They will be described now along with their intended use-cases.
21 -----
31 -----
56 --------------------------
60 it will stop at the ACK phase after the address of the client has been
61 transmitted. Because the device will ACK its presence, this results in SDA
68 -----------------------
73 The injector will again stop at one ACK phase, so the device will keep SDA low
78 b) after the address byte, a 0x00 byte will be transferred. Then, stop at ACK.
[all …]
/openbmc/linux/drivers/remoteproc/
H A Dqcom_q6v5.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Linaro Ltd.
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
28 if (!q6v5->qmp) in q6v5_load_state_toggle()
31 ret = qmp_send(q6v5->qmp, "{class: image, res: load_state, name: %s, val: %s}", in q6v5_load_state_toggle()
32 q6v5->load_state, enable ? "on" : "off"); in q6v5_load_state_toggle()
34 dev_err(q6v5->dev, "failed to toggle load state\n"); in q6v5_load_state_toggle()
40 * qcom_q6v5_prepare() - reinitialize the qcom_q6v5 context before start
49 ret = icc_set_bw(q6v5->path, 0, UINT_MAX); in qcom_q6v5_prepare()
51 dev_err(q6v5->dev, "failed to set bandwidth request\n"); in qcom_q6v5_prepare()
[all …]
/openbmc/linux/net/batman-adv/
H A Dtp_meter.c1 // SPDX-License-Identifier: GPL-2.0
45 #include "hard-interface.h"
52 * BATADV_TP_DEF_TEST_LENGTH - Default test length if not specified by the user
58 * BATADV_TP_AWND - Advertised window by the receiver (in bytes)
63 * BATADV_TP_RECV_TIMEOUT - Receiver activity timeout. If the receiver does not
69 * BATADV_TP_MAX_RTO - Maximum sender timeout. If the sender RTO gets beyond
76 * BATADV_TP_FIRST_SEQ - First seqno of each session. The number is rather high
79 #define BATADV_TP_FIRST_SEQ ((u32)-1 - 2000)
82 * BATADV_TP_PLEN - length of the payload (data after the batadv_unicast header)
85 #define BATADV_TP_PLEN (BATADV_TP_PACKET_LEN - ETH_HLEN - \
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