1f931551bSRalph Campbell /*
27fac3301SMike Marciniszyn * Copyright (c) 2012 Intel Corporation. All rights reserved.
37fac3301SMike Marciniszyn * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4f931551bSRalph Campbell * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5f931551bSRalph Campbell *
6f931551bSRalph Campbell * This software is available to you under a choice of one of two
7f931551bSRalph Campbell * licenses. You may choose to be licensed under the terms of the GNU
8f931551bSRalph Campbell * General Public License (GPL) Version 2, available from the file
9f931551bSRalph Campbell * COPYING in the main directory of this source tree, or the
10f931551bSRalph Campbell * OpenIB.org BSD license below:
11f931551bSRalph Campbell *
12f931551bSRalph Campbell * Redistribution and use in source and binary forms, with or
13f931551bSRalph Campbell * without modification, are permitted provided that the following
14f931551bSRalph Campbell * conditions are met:
15f931551bSRalph Campbell *
16f931551bSRalph Campbell * - Redistributions of source code must retain the above
17f931551bSRalph Campbell * copyright notice, this list of conditions and the following
18f931551bSRalph Campbell * disclaimer.
19f931551bSRalph Campbell *
20f931551bSRalph Campbell * - Redistributions in binary form must reproduce the above
21f931551bSRalph Campbell * copyright notice, this list of conditions and the following
22f931551bSRalph Campbell * disclaimer in the documentation and/or other materials
23f931551bSRalph Campbell * provided with the distribution.
24f931551bSRalph Campbell *
25f931551bSRalph Campbell * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26f931551bSRalph Campbell * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27f931551bSRalph Campbell * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28f931551bSRalph Campbell * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29f931551bSRalph Campbell * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30f931551bSRalph Campbell * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31f931551bSRalph Campbell * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32f931551bSRalph Campbell * SOFTWARE.
33f931551bSRalph Campbell */
34f931551bSRalph Campbell
35f931551bSRalph Campbell #include <linux/delay.h>
36f931551bSRalph Campbell #include <linux/pci.h>
37f931551bSRalph Campbell #include <linux/vmalloc.h>
38f931551bSRalph Campbell
39f931551bSRalph Campbell #include "qib.h"
40f931551bSRalph Campbell
41f931551bSRalph Campbell /*
42f931551bSRalph Campbell * QLogic_IB "Two Wire Serial Interface" driver.
43f931551bSRalph Campbell * Originally written for a not-quite-i2c serial eeprom, which is
44f931551bSRalph Campbell * still used on some supported boards. Later boards have added a
4525985edcSLucas De Marchi * variety of other uses, most board-specific, so the bit-boffing
46f931551bSRalph Campbell * part has been split off to this file, while the other parts
47f931551bSRalph Campbell * have been moved to chip-specific files.
48f931551bSRalph Campbell *
49f931551bSRalph Campbell * We have also dropped all pretense of fully generic (e.g. pretend
50f931551bSRalph Campbell * we don't know whether '1' is the higher voltage) interface, as
51f931551bSRalph Campbell * the restrictions of the generic i2c interface (e.g. no access from
52f931551bSRalph Campbell * driver itself) make it unsuitable for this use.
53f931551bSRalph Campbell */
54f931551bSRalph Campbell
55f931551bSRalph Campbell #define READ_CMD 1
56f931551bSRalph Campbell #define WRITE_CMD 0
57f931551bSRalph Campbell
58f931551bSRalph Campbell /**
59f931551bSRalph Campbell * i2c_wait_for_writes - wait for a write
60f931551bSRalph Campbell * @dd: the qlogic_ib device
61f931551bSRalph Campbell *
62f931551bSRalph Campbell * We use this instead of udelay directly, so we can make sure
63f931551bSRalph Campbell * that previous register writes have been flushed all the way
64f931551bSRalph Campbell * to the chip. Since we are delaying anyway, the cost doesn't
65f931551bSRalph Campbell * hurt, and makes the bit twiddling more regular
66f931551bSRalph Campbell */
i2c_wait_for_writes(struct qib_devdata * dd)67f931551bSRalph Campbell static void i2c_wait_for_writes(struct qib_devdata *dd)
68f931551bSRalph Campbell {
69f931551bSRalph Campbell /*
70f931551bSRalph Campbell * implicit read of EXTStatus is as good as explicit
71f931551bSRalph Campbell * read of scratch, if all we want to do is flush
72f931551bSRalph Campbell * writes.
73f931551bSRalph Campbell */
74f931551bSRalph Campbell dd->f_gpio_mod(dd, 0, 0, 0);
75f931551bSRalph Campbell rmb(); /* inlined, so prevent compiler reordering */
76f931551bSRalph Campbell }
77f931551bSRalph Campbell
78f931551bSRalph Campbell /*
79f931551bSRalph Campbell * QSFP modules are allowed to hold SCL low for 500uSec. Allow twice that
80f931551bSRalph Campbell * for "almost compliant" modules
81f931551bSRalph Campbell */
82f931551bSRalph Campbell #define SCL_WAIT_USEC 1000
83f931551bSRalph Campbell
84f931551bSRalph Campbell /* BUF_WAIT is time bus must be free between STOP or ACK and to next START.
85f931551bSRalph Campbell * Should be 20, but some chips need more.
86f931551bSRalph Campbell */
87f931551bSRalph Campbell #define TWSI_BUF_WAIT_USEC 60
88f931551bSRalph Campbell
scl_out(struct qib_devdata * dd,u8 bit)89f931551bSRalph Campbell static void scl_out(struct qib_devdata *dd, u8 bit)
90f931551bSRalph Campbell {
91f931551bSRalph Campbell u32 mask;
92f931551bSRalph Campbell
93f931551bSRalph Campbell udelay(1);
94f931551bSRalph Campbell
95f931551bSRalph Campbell mask = 1UL << dd->gpio_scl_num;
96f931551bSRalph Campbell
97f931551bSRalph Campbell /* SCL is meant to be bare-drain, so never set "OUT", just DIR */
98f931551bSRalph Campbell dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask);
99f931551bSRalph Campbell
100f931551bSRalph Campbell /*
101f931551bSRalph Campbell * Allow for slow slaves by simple
102f931551bSRalph Campbell * delay for falling edge, sampling on rise.
103f931551bSRalph Campbell */
104f931551bSRalph Campbell if (!bit)
105f931551bSRalph Campbell udelay(2);
106f931551bSRalph Campbell else {
107f931551bSRalph Campbell int rise_usec;
108da12c1f6SMike Marciniszyn
109f931551bSRalph Campbell for (rise_usec = SCL_WAIT_USEC; rise_usec > 0; rise_usec -= 2) {
110f931551bSRalph Campbell if (mask & dd->f_gpio_mod(dd, 0, 0, 0))
111f931551bSRalph Campbell break;
112f931551bSRalph Campbell udelay(2);
113f931551bSRalph Campbell }
114f931551bSRalph Campbell if (rise_usec <= 0)
115f931551bSRalph Campbell qib_dev_err(dd, "SCL interface stuck low > %d uSec\n",
116f931551bSRalph Campbell SCL_WAIT_USEC);
117f931551bSRalph Campbell }
118f931551bSRalph Campbell i2c_wait_for_writes(dd);
119f931551bSRalph Campbell }
120f931551bSRalph Campbell
sda_out(struct qib_devdata * dd,u8 bit)121f931551bSRalph Campbell static void sda_out(struct qib_devdata *dd, u8 bit)
122f931551bSRalph Campbell {
123f931551bSRalph Campbell u32 mask;
124f931551bSRalph Campbell
125f931551bSRalph Campbell mask = 1UL << dd->gpio_sda_num;
126f931551bSRalph Campbell
127f931551bSRalph Campbell /* SDA is meant to be bare-drain, so never set "OUT", just DIR */
128f931551bSRalph Campbell dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask);
129f931551bSRalph Campbell
130f931551bSRalph Campbell i2c_wait_for_writes(dd);
131f931551bSRalph Campbell udelay(2);
132f931551bSRalph Campbell }
133f931551bSRalph Campbell
sda_in(struct qib_devdata * dd,int wait)134f931551bSRalph Campbell static u8 sda_in(struct qib_devdata *dd, int wait)
135f931551bSRalph Campbell {
136f931551bSRalph Campbell int bnum;
137f931551bSRalph Campbell u32 read_val, mask;
138f931551bSRalph Campbell
139f931551bSRalph Campbell bnum = dd->gpio_sda_num;
140f931551bSRalph Campbell mask = (1UL << bnum);
141f931551bSRalph Campbell /* SDA is meant to be bare-drain, so never set "OUT", just DIR */
142f931551bSRalph Campbell dd->f_gpio_mod(dd, 0, 0, mask);
143f931551bSRalph Campbell read_val = dd->f_gpio_mod(dd, 0, 0, 0);
144f931551bSRalph Campbell if (wait)
145f931551bSRalph Campbell i2c_wait_for_writes(dd);
146f931551bSRalph Campbell return (read_val & mask) >> bnum;
147f931551bSRalph Campbell }
148f931551bSRalph Campbell
149f931551bSRalph Campbell /**
150f931551bSRalph Campbell * i2c_ackrcv - see if ack following write is true
151f931551bSRalph Campbell * @dd: the qlogic_ib device
152f931551bSRalph Campbell */
i2c_ackrcv(struct qib_devdata * dd)153f931551bSRalph Campbell static int i2c_ackrcv(struct qib_devdata *dd)
154f931551bSRalph Campbell {
155f931551bSRalph Campbell u8 ack_received;
156f931551bSRalph Campbell
157f931551bSRalph Campbell /* AT ENTRY SCL = LOW */
158f931551bSRalph Campbell /* change direction, ignore data */
159f931551bSRalph Campbell ack_received = sda_in(dd, 1);
160f931551bSRalph Campbell scl_out(dd, 1);
161f931551bSRalph Campbell ack_received = sda_in(dd, 1) == 0;
162f931551bSRalph Campbell scl_out(dd, 0);
163f931551bSRalph Campbell return ack_received;
164f931551bSRalph Campbell }
165f931551bSRalph Campbell
166f931551bSRalph Campbell static void stop_cmd(struct qib_devdata *dd);
167f931551bSRalph Campbell
168f931551bSRalph Campbell /**
169f931551bSRalph Campbell * rd_byte - read a byte, sending STOP on last, else ACK
170f931551bSRalph Campbell * @dd: the qlogic_ib device
171*04dccf5dSLee Jones * @last: identifies the last read
172f931551bSRalph Campbell *
173f931551bSRalph Campbell * Returns byte shifted out of device
174f931551bSRalph Campbell */
rd_byte(struct qib_devdata * dd,int last)175f931551bSRalph Campbell static int rd_byte(struct qib_devdata *dd, int last)
176f931551bSRalph Campbell {
177f931551bSRalph Campbell int bit_cntr, data;
178f931551bSRalph Campbell
179f931551bSRalph Campbell data = 0;
180f931551bSRalph Campbell
181f931551bSRalph Campbell for (bit_cntr = 7; bit_cntr >= 0; --bit_cntr) {
182f931551bSRalph Campbell data <<= 1;
183f931551bSRalph Campbell scl_out(dd, 1);
184f931551bSRalph Campbell data |= sda_in(dd, 0);
185f931551bSRalph Campbell scl_out(dd, 0);
186f931551bSRalph Campbell }
187f931551bSRalph Campbell if (last) {
188f931551bSRalph Campbell scl_out(dd, 1);
189f931551bSRalph Campbell stop_cmd(dd);
190f931551bSRalph Campbell } else {
191f931551bSRalph Campbell sda_out(dd, 0);
192f931551bSRalph Campbell scl_out(dd, 1);
193f931551bSRalph Campbell scl_out(dd, 0);
194f931551bSRalph Campbell sda_out(dd, 1);
195f931551bSRalph Campbell }
196f931551bSRalph Campbell return data;
197f931551bSRalph Campbell }
198f931551bSRalph Campbell
199f931551bSRalph Campbell /**
200f931551bSRalph Campbell * wr_byte - write a byte, one bit at a time
201f931551bSRalph Campbell * @dd: the qlogic_ib device
202f931551bSRalph Campbell * @data: the byte to write
203f931551bSRalph Campbell *
204f931551bSRalph Campbell * Returns 0 if we got the following ack, otherwise 1
205f931551bSRalph Campbell */
wr_byte(struct qib_devdata * dd,u8 data)206f931551bSRalph Campbell static int wr_byte(struct qib_devdata *dd, u8 data)
207f931551bSRalph Campbell {
208f931551bSRalph Campbell int bit_cntr;
209f931551bSRalph Campbell u8 bit;
210f931551bSRalph Campbell
211f931551bSRalph Campbell for (bit_cntr = 7; bit_cntr >= 0; bit_cntr--) {
212f931551bSRalph Campbell bit = (data >> bit_cntr) & 1;
213f931551bSRalph Campbell sda_out(dd, bit);
214f931551bSRalph Campbell scl_out(dd, 1);
215f931551bSRalph Campbell scl_out(dd, 0);
216f931551bSRalph Campbell }
217f931551bSRalph Campbell return (!i2c_ackrcv(dd)) ? 1 : 0;
218f931551bSRalph Campbell }
219f931551bSRalph Campbell
220f931551bSRalph Campbell /*
221f931551bSRalph Campbell * issue TWSI start sequence:
222f931551bSRalph Campbell * (both clock/data high, clock high, data low while clock is high)
223f931551bSRalph Campbell */
start_seq(struct qib_devdata * dd)224f931551bSRalph Campbell static void start_seq(struct qib_devdata *dd)
225f931551bSRalph Campbell {
226f931551bSRalph Campbell sda_out(dd, 1);
227f931551bSRalph Campbell scl_out(dd, 1);
228f931551bSRalph Campbell sda_out(dd, 0);
229f931551bSRalph Campbell udelay(1);
230f931551bSRalph Campbell scl_out(dd, 0);
231f931551bSRalph Campbell }
232f931551bSRalph Campbell
233f931551bSRalph Campbell /**
234f931551bSRalph Campbell * stop_seq - transmit the stop sequence
235f931551bSRalph Campbell * @dd: the qlogic_ib device
236f931551bSRalph Campbell *
237f931551bSRalph Campbell * (both clock/data low, clock high, data high while clock is high)
238f931551bSRalph Campbell */
stop_seq(struct qib_devdata * dd)239f931551bSRalph Campbell static void stop_seq(struct qib_devdata *dd)
240f931551bSRalph Campbell {
241f931551bSRalph Campbell scl_out(dd, 0);
242f931551bSRalph Campbell sda_out(dd, 0);
243f931551bSRalph Campbell scl_out(dd, 1);
244f931551bSRalph Campbell sda_out(dd, 1);
245f931551bSRalph Campbell }
246f931551bSRalph Campbell
247f931551bSRalph Campbell /**
248f931551bSRalph Campbell * stop_cmd - transmit the stop condition
249f931551bSRalph Campbell * @dd: the qlogic_ib device
250f931551bSRalph Campbell *
251f931551bSRalph Campbell * (both clock/data low, clock high, data high while clock is high)
252f931551bSRalph Campbell */
stop_cmd(struct qib_devdata * dd)253f931551bSRalph Campbell static void stop_cmd(struct qib_devdata *dd)
254f931551bSRalph Campbell {
255f931551bSRalph Campbell stop_seq(dd);
256f931551bSRalph Campbell udelay(TWSI_BUF_WAIT_USEC);
257f931551bSRalph Campbell }
258f931551bSRalph Campbell
259f931551bSRalph Campbell /**
260f931551bSRalph Campbell * qib_twsi_reset - reset I2C communication
261f931551bSRalph Campbell * @dd: the qlogic_ib device
262f931551bSRalph Campbell */
263f931551bSRalph Campbell
qib_twsi_reset(struct qib_devdata * dd)264f931551bSRalph Campbell int qib_twsi_reset(struct qib_devdata *dd)
265f931551bSRalph Campbell {
266f931551bSRalph Campbell int clock_cycles_left = 9;
267f931551bSRalph Campbell int was_high = 0;
268f931551bSRalph Campbell u32 pins, mask;
269f931551bSRalph Campbell
270f931551bSRalph Campbell /* Both SCL and SDA should be high. If not, there
271f931551bSRalph Campbell * is something wrong.
272f931551bSRalph Campbell */
273f931551bSRalph Campbell mask = (1UL << dd->gpio_scl_num) | (1UL << dd->gpio_sda_num);
274f931551bSRalph Campbell
275f931551bSRalph Campbell /*
276f931551bSRalph Campbell * Force pins to desired innocuous state.
277f931551bSRalph Campbell * This is the default power-on state with out=0 and dir=0,
278f931551bSRalph Campbell * So tri-stated and should be floating high (barring HW problems)
279f931551bSRalph Campbell */
280f931551bSRalph Campbell dd->f_gpio_mod(dd, 0, 0, mask);
281f931551bSRalph Campbell
282f931551bSRalph Campbell /*
283f931551bSRalph Campbell * Clock nine times to get all listeners into a sane state.
284f931551bSRalph Campbell * If SDA does not go high at any point, we are wedged.
285f931551bSRalph Campbell * One vendor recommends then issuing START followed by STOP.
286f931551bSRalph Campbell * we cannot use our "normal" functions to do that, because
287f931551bSRalph Campbell * if SCL drops between them, another vendor's part will
288f931551bSRalph Campbell * wedge, dropping SDA and keeping it low forever, at the end of
289f931551bSRalph Campbell * the next transaction (even if it was not the device addressed).
290f931551bSRalph Campbell * So our START and STOP take place with SCL held high.
291f931551bSRalph Campbell */
292f931551bSRalph Campbell while (clock_cycles_left--) {
293f931551bSRalph Campbell scl_out(dd, 0);
294f931551bSRalph Campbell scl_out(dd, 1);
295f931551bSRalph Campbell /* Note if SDA is high, but keep clocking to sync slave */
296f931551bSRalph Campbell was_high |= sda_in(dd, 0);
297f931551bSRalph Campbell }
298f931551bSRalph Campbell
299f931551bSRalph Campbell if (was_high) {
300f931551bSRalph Campbell /*
301f931551bSRalph Campbell * We saw a high, which we hope means the slave is sync'd.
302f931551bSRalph Campbell * Issue START, STOP, pause for T_BUF.
303f931551bSRalph Campbell */
304f931551bSRalph Campbell
305f931551bSRalph Campbell pins = dd->f_gpio_mod(dd, 0, 0, 0);
306f931551bSRalph Campbell if ((pins & mask) != mask)
307f931551bSRalph Campbell qib_dev_err(dd, "GPIO pins not at rest: %d\n",
308f931551bSRalph Campbell pins & mask);
309f931551bSRalph Campbell /* Drop SDA to issue START */
310f931551bSRalph Campbell udelay(1); /* Guarantee .6 uSec setup */
311f931551bSRalph Campbell sda_out(dd, 0);
312f931551bSRalph Campbell udelay(1); /* Guarantee .6 uSec hold */
313f931551bSRalph Campbell /* At this point, SCL is high, SDA low. Raise SDA for STOP */
314f931551bSRalph Campbell sda_out(dd, 1);
315f931551bSRalph Campbell udelay(TWSI_BUF_WAIT_USEC);
316f931551bSRalph Campbell }
317f931551bSRalph Campbell
318f931551bSRalph Campbell return !was_high;
319f931551bSRalph Campbell }
320f931551bSRalph Campbell
321f931551bSRalph Campbell #define QIB_TWSI_START 0x100
322f931551bSRalph Campbell #define QIB_TWSI_STOP 0x200
323f931551bSRalph Campbell
324f931551bSRalph Campbell /* Write byte to TWSI, optionally prefixed with START or suffixed with
325f931551bSRalph Campbell * STOP.
326f931551bSRalph Campbell * returns 0 if OK (ACK received), else != 0
327f931551bSRalph Campbell */
qib_twsi_wr(struct qib_devdata * dd,int data,int flags)328f931551bSRalph Campbell static int qib_twsi_wr(struct qib_devdata *dd, int data, int flags)
329f931551bSRalph Campbell {
330f931551bSRalph Campbell int ret = 1;
331da12c1f6SMike Marciniszyn
332f931551bSRalph Campbell if (flags & QIB_TWSI_START)
333f931551bSRalph Campbell start_seq(dd);
334f931551bSRalph Campbell
335f931551bSRalph Campbell ret = wr_byte(dd, data); /* Leaves SCL low (from i2c_ackrcv()) */
336f931551bSRalph Campbell
337f931551bSRalph Campbell if (flags & QIB_TWSI_STOP)
338f931551bSRalph Campbell stop_cmd(dd);
339f931551bSRalph Campbell return ret;
340f931551bSRalph Campbell }
341f931551bSRalph Campbell
342f931551bSRalph Campbell /* Added functionality for IBA7220-based cards */
343f931551bSRalph Campbell #define QIB_TEMP_DEV 0x98
344f931551bSRalph Campbell
345f931551bSRalph Campbell /*
346f931551bSRalph Campbell * qib_twsi_blk_rd
347f931551bSRalph Campbell * Formerly called qib_eeprom_internal_read, and only used for eeprom,
348f931551bSRalph Campbell * but now the general interface for data transfer from twsi devices.
349f931551bSRalph Campbell * One vestige of its former role is that it recognizes a device
350f931551bSRalph Campbell * QIB_TWSI_NO_DEV and does the correct operation for the legacy part,
351f931551bSRalph Campbell * which responded to all TWSI device codes, interpreting them as
352f931551bSRalph Campbell * address within device. On all other devices found on board handled by
353f931551bSRalph Campbell * this driver, the device is followed by a one-byte "address" which selects
354f931551bSRalph Campbell * the "register" or "offset" within the device from which data should
355f931551bSRalph Campbell * be read.
356f931551bSRalph Campbell */
qib_twsi_blk_rd(struct qib_devdata * dd,int dev,int addr,void * buffer,int len)357f931551bSRalph Campbell int qib_twsi_blk_rd(struct qib_devdata *dd, int dev, int addr,
358f931551bSRalph Campbell void *buffer, int len)
359f931551bSRalph Campbell {
360f931551bSRalph Campbell int ret;
361f931551bSRalph Campbell u8 *bp = buffer;
362f931551bSRalph Campbell
363f931551bSRalph Campbell ret = 1;
364f931551bSRalph Campbell
365f931551bSRalph Campbell if (dev == QIB_TWSI_NO_DEV) {
366f931551bSRalph Campbell /* legacy not-really-I2C */
367f931551bSRalph Campbell addr = (addr << 1) | READ_CMD;
368f931551bSRalph Campbell ret = qib_twsi_wr(dd, addr, QIB_TWSI_START);
369f931551bSRalph Campbell } else {
370f931551bSRalph Campbell /* Actual I2C */
371f931551bSRalph Campbell ret = qib_twsi_wr(dd, dev | WRITE_CMD, QIB_TWSI_START);
372f931551bSRalph Campbell if (ret) {
373f931551bSRalph Campbell stop_cmd(dd);
374f931551bSRalph Campbell ret = 1;
375f931551bSRalph Campbell goto bail;
376f931551bSRalph Campbell }
377f931551bSRalph Campbell /*
378f931551bSRalph Campbell * SFF spec claims we do _not_ stop after the addr
379f931551bSRalph Campbell * but simply issue a start with the "read" dev-addr.
380f931551bSRalph Campbell * Since we are implicitely waiting for ACK here,
381f931551bSRalph Campbell * we need t_buf (nominally 20uSec) before that start,
382f931551bSRalph Campbell * and cannot rely on the delay built in to the STOP
383f931551bSRalph Campbell */
384f931551bSRalph Campbell ret = qib_twsi_wr(dd, addr, 0);
385f931551bSRalph Campbell udelay(TWSI_BUF_WAIT_USEC);
386f931551bSRalph Campbell
387f931551bSRalph Campbell if (ret) {
388f931551bSRalph Campbell qib_dev_err(dd,
389f931551bSRalph Campbell "Failed to write interface read addr %02X\n",
390f931551bSRalph Campbell addr);
391f931551bSRalph Campbell ret = 1;
392f931551bSRalph Campbell goto bail;
393f931551bSRalph Campbell }
394f931551bSRalph Campbell ret = qib_twsi_wr(dd, dev | READ_CMD, QIB_TWSI_START);
395f931551bSRalph Campbell }
396f931551bSRalph Campbell if (ret) {
397f931551bSRalph Campbell stop_cmd(dd);
398f931551bSRalph Campbell ret = 1;
399f931551bSRalph Campbell goto bail;
400f931551bSRalph Campbell }
401f931551bSRalph Campbell
402f931551bSRalph Campbell /*
403f931551bSRalph Campbell * block devices keeps clocking data out as long as we ack,
404f931551bSRalph Campbell * automatically incrementing the address. Some have "pages"
405f931551bSRalph Campbell * whose boundaries will not be crossed, but the handling
406f931551bSRalph Campbell * of these is left to the caller, who is in a better
407f931551bSRalph Campbell * position to know.
408f931551bSRalph Campbell */
409f931551bSRalph Campbell while (len-- > 0) {
410f931551bSRalph Campbell /*
411f931551bSRalph Campbell * Get and store data, sending ACK if length remaining,
412f931551bSRalph Campbell * else STOP
413f931551bSRalph Campbell */
414f931551bSRalph Campbell *bp++ = rd_byte(dd, !len);
415f931551bSRalph Campbell }
416f931551bSRalph Campbell
417f931551bSRalph Campbell ret = 0;
418f931551bSRalph Campbell
419f931551bSRalph Campbell bail:
420f931551bSRalph Campbell return ret;
421f931551bSRalph Campbell }
422f931551bSRalph Campbell
423f931551bSRalph Campbell /*
424f931551bSRalph Campbell * qib_twsi_blk_wr
425f931551bSRalph Campbell * Formerly called qib_eeprom_internal_write, and only used for eeprom,
426f931551bSRalph Campbell * but now the general interface for data transfer to twsi devices.
427f931551bSRalph Campbell * One vestige of its former role is that it recognizes a device
428f931551bSRalph Campbell * QIB_TWSI_NO_DEV and does the correct operation for the legacy part,
429f931551bSRalph Campbell * which responded to all TWSI device codes, interpreting them as
430f931551bSRalph Campbell * address within device. On all other devices found on board handled by
431f931551bSRalph Campbell * this driver, the device is followed by a one-byte "address" which selects
432f931551bSRalph Campbell * the "register" or "offset" within the device to which data should
433f931551bSRalph Campbell * be written.
434f931551bSRalph Campbell */
qib_twsi_blk_wr(struct qib_devdata * dd,int dev,int addr,const void * buffer,int len)435f931551bSRalph Campbell int qib_twsi_blk_wr(struct qib_devdata *dd, int dev, int addr,
436f931551bSRalph Campbell const void *buffer, int len)
437f931551bSRalph Campbell {
438f931551bSRalph Campbell int sub_len;
439f931551bSRalph Campbell const u8 *bp = buffer;
440f931551bSRalph Campbell int max_wait_time, i;
441da12c1f6SMike Marciniszyn int ret = 1;
442f931551bSRalph Campbell
443f931551bSRalph Campbell while (len > 0) {
444f931551bSRalph Campbell if (dev == QIB_TWSI_NO_DEV) {
445f931551bSRalph Campbell if (qib_twsi_wr(dd, (addr << 1) | WRITE_CMD,
446f931551bSRalph Campbell QIB_TWSI_START)) {
447f931551bSRalph Campbell goto failed_write;
448f931551bSRalph Campbell }
449f931551bSRalph Campbell } else {
450f931551bSRalph Campbell /* Real I2C */
451f931551bSRalph Campbell if (qib_twsi_wr(dd, dev | WRITE_CMD, QIB_TWSI_START))
452f931551bSRalph Campbell goto failed_write;
453f931551bSRalph Campbell ret = qib_twsi_wr(dd, addr, 0);
454f931551bSRalph Campbell if (ret) {
4557fac3301SMike Marciniszyn qib_dev_err(dd,
4567fac3301SMike Marciniszyn "Failed to write interface write addr %02X\n",
4577fac3301SMike Marciniszyn addr);
458f931551bSRalph Campbell goto failed_write;
459f931551bSRalph Campbell }
460f931551bSRalph Campbell }
461f931551bSRalph Campbell
462f931551bSRalph Campbell sub_len = min(len, 4);
463f931551bSRalph Campbell addr += sub_len;
464f931551bSRalph Campbell len -= sub_len;
465f931551bSRalph Campbell
466f931551bSRalph Campbell for (i = 0; i < sub_len; i++)
467f931551bSRalph Campbell if (qib_twsi_wr(dd, *bp++, 0))
468f931551bSRalph Campbell goto failed_write;
469f931551bSRalph Campbell
470f931551bSRalph Campbell stop_cmd(dd);
471f931551bSRalph Campbell
472f931551bSRalph Campbell /*
473f931551bSRalph Campbell * Wait for write complete by waiting for a successful
474f931551bSRalph Campbell * read (the chip replies with a zero after the write
475f931551bSRalph Campbell * cmd completes, and before it writes to the eeprom.
476f931551bSRalph Campbell * The startcmd for the read will fail the ack until
477f931551bSRalph Campbell * the writes have completed. We do this inline to avoid
478f931551bSRalph Campbell * the debug prints that are in the real read routine
479f931551bSRalph Campbell * if the startcmd fails.
480f931551bSRalph Campbell * We also use the proper device address, so it doesn't matter
481f931551bSRalph Campbell * whether we have real eeprom_dev. Legacy likes any address.
482f931551bSRalph Campbell */
483f931551bSRalph Campbell max_wait_time = 100;
484f931551bSRalph Campbell while (qib_twsi_wr(dd, dev | READ_CMD, QIB_TWSI_START)) {
485f931551bSRalph Campbell stop_cmd(dd);
486f931551bSRalph Campbell if (!--max_wait_time)
487f931551bSRalph Campbell goto failed_write;
488f931551bSRalph Campbell }
489f931551bSRalph Campbell /* now read (and ignore) the resulting byte */
490f931551bSRalph Campbell rd_byte(dd, 1);
491f931551bSRalph Campbell }
492f931551bSRalph Campbell
493f931551bSRalph Campbell ret = 0;
494f931551bSRalph Campbell goto bail;
495f931551bSRalph Campbell
496f931551bSRalph Campbell failed_write:
497f931551bSRalph Campbell stop_cmd(dd);
498f931551bSRalph Campbell ret = 1;
499f931551bSRalph Campbell
500f931551bSRalph Campbell bail:
501f931551bSRalph Campbell return ret;
502f931551bSRalph Campbell }
503