Searched +full:stm32h7 +full:- +full:uart (Results 1 – 16 of 16) sorted by relevance
/openbmc/u-boot/arch/arm/dts/ |
H A D | stm32mp157c.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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H A D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 44 #include "armv7-m.dtsi" 45 #include <dt-bindings/clock/stm32h7-clks.h> 46 #include <dt-bindings/mfd/stm32h7-rcc.h> 50 clk_hse: clk-hse { 51 #clock-cells = <0>; 52 compatible = "fixed-clock"; 53 clock-frequency = <25000000>; 56 clk_lse: clk-lse { [all …]
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/openbmc/linux/Documentation/devicetree/bindings/serial/ |
H A D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Erwan Le Ray <erwan.leray@foss.st.com> 15 - st,stm32-uart 16 - st,stm32f7-uart 17 - st,stm32h7-uart 32 description: label associated with this uart 34 st,hw-flow-ctrl: [all …]
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp131.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp13-clks.h> 8 #include <dt-bindings/reset/stm32mp13-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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H A D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32h7-clks.h> 45 #include <dt-bindings/mfd/stm32h7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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H A D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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H A D | stm32h750i-art-pi.dts | 2 * Copyright 2021 - Dillon Min <dillon.minfei@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 42 * For art-pi board resources, you can refer to link: 43 * https://art-pi.gitee.io/website/ 46 /dts-v1/; 48 #include "stm32h7-pinctrl.dtsi" 49 #include <dt-bindings/interrupt-controller/irq.h> 50 #include <dt-bindings/gpio/gpio.h> 53 model = "RT-Thread STM32H750i-ART-PI board"; 54 compatible = "st,stm32h750i-art-pi", "st,stm32h750"; [all …]
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/openbmc/u-boot/drivers/serial/ |
H A D | serial_stm32.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 22 bool stm32f4 = uart_info->stm32f4; in _stm32_serial_setbrg() 45 _stm32_serial_setbrg(plat->base, plat->uart_info, in stm32_serial_setbrg() 46 plat->clock_rate, baudrate); in stm32_serial_setbrg() 54 bool stm32f4 = plat->uart_info->stm32f4; in stm32_serial_setconfig() 55 u8 uart_enable_bit = plat->uart_info->uart_enable_bit; in stm32_serial_setconfig() 56 u32 cr1 = plat->base + CR1_OFFSET(stm32f4); in stm32_serial_setconfig() 68 return -ENOTSUPP; /* not supported in driver*/ in stm32_serial_setconfig() 71 /* update usart configuration (uart need to be disable) in stm32_serial_setconfig() [all …]
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H A D | Kconfig | 11 Select a default baudrate, where "default" has a driver-specific 12 meaning of either setting the baudrate for the early debug UART 19 # non-dm serial code 32 In various cases, we need to specify which of the UART devices that 34 in U-Boot. 41 In very space-constrained devices even the full UART driver is too 42 large. In this case the debug UART can still be used in some cases. 43 This option enables the full UART in U-Boot, so if is it disabled, 44 the full UART driver will be omitted, thus saving space. 51 In very space-constrained devices even the full UART driver is too [all …]
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/openbmc/linux/arch/arm/ |
H A D | Kconfig.debug | 1 # SPDX-License-Identifier: GPL-2.0 44 once the kernel has booted up - it's a one time check. 107 1 - undefined instruction events 108 2 - system calls 109 4 - invalid data aborts 110 8 - SIGSEGV faults 111 16 - SIGBUS faults 115 bool "Kernel low-level debugging functions (read help!)" 123 UART definition, as specified below. Attempting to boot the kernel 128 prompt "Kernel low-level debugging port" [all …]
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/openbmc/linux/drivers/tty/serial/ |
H A D | stm32-usart.c | 1 // SPDX-License-Identifier: GPL-2.0 9 * Inspired by st-asc.c from STMicroelectronics (c) 15 #include <linux/dma-direction.h> 17 #include <linux/dma-mapping.h> 36 #include "stm32-usart.h" 120 val = readl_relaxed(port->membase + reg); in stm32_usart_set_bits() 122 writel_relaxed(val, port->membase + reg); in stm32_usart_set_bits() 129 val = readl_relaxed(port->membase + reg); in stm32_usart_clr_bits() 131 writel_relaxed(val, port->membase + reg); in stm32_usart_clr_bits() 137 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; in stm32_usart_tx_empty() [all …]
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/openbmc/linux/arch/arm64/boot/dts/st/ |
H A D | stm32mp251.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 13 #address-cells = <1>; 14 #size-cells = <0>; 17 compatible = "arm,cortex-a35"; 20 enable-method = "psci"; 24 arm-pmu { [all …]
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/openbmc/linux/ |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-03-18 03:00:46.767-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-18 03:00:46.892-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-03-17 03:00:37.547-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-17 03:00:37.671-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |