/openbmc/u-boot/arch/arm/dts/ |
H A D | armada-388-clearfog.dts | 11 * This file is dual-licensed: you can use it either under the terms 49 /dts-v1/; 50 #include <dt-bindings/input/input.h> 51 #include <dt-bindings/gpio/gpio.h> 52 #include "armada-388.dtsi" 53 #include "armada-38x-solidrun-microsom.dtsi" 57 compatible = "solidrun,clearfog-a1", "marvell,armada388", 61 /* So that mvebu u-boot can update the MAC addresses */ 65 spi1 = &spi1; 71 stdout-path = "serial0:115200n8"; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 16 #address-cells = <1>; 17 #size-cells = <0>; 18 enable-method = "rockchip,rk3066-smp"; 22 compatible = "arm,cortex-a9"; 23 next-level-cache = <&L2>; 25 operating-points = < [all …]
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H A D | rk3368.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/rk3368-cru.h> 44 #include <dt-bindings/gpio/gpio.h> 45 #include <dt-bindings/interrupt-controller/irq.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/pinctrl/rockchip.h> 48 #include <dt-bindings/thermal/thermal.h> 49 #include <dt-bindings/memory/rk3368-dmc.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <2>; [all …]
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H A D | armada-8040-mcbin.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 #include "armada-8040.dtsi" /* include SoC device tree */ 9 model = "MACCHIATOBin-8040"; 10 compatible = "marvell,armada8040-mcbin", 14 stdout-path = "serial0:115200n8"; 31 simple-bus { 32 compatible = "simple-bus"; 33 #address-cells = <1>; 34 #size-cells = <0>; 36 reg_usb3h0_vbus: usb3-vbus0 { [all …]
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H A D | armada-8040-clearfog-gt-8k.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 #include "armada-8040.dtsi" 9 model = "ClearFog-GT-8K"; 10 compatible = "solidrun,clearfog-gt-8k", 14 stdout-path = "serial0:115200n8"; 28 simple-bus { 29 compatible = "simple-bus"; 31 reg_usb3h0_vbus: usb3-vbus0 { 32 compatible = "regulator-fixed"; 33 pinctrl-names = "default"; [all …]
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H A D | armada-388-helios4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 /dts-v1/; 11 #include "armada-388.dtsi" 12 #include "armada-38x-solidrun-microsom.dtsi" 25 /* So that mvebu u-boot can update the MAC addresses */ 30 stdout-path = "serial0:115200n8"; 33 reg_12v: regulator-12v { 34 compatible = "regulator-fixed"; 35 regulator-name = "power_brick_12V"; 36 regulator-min-microvolt = <12000000>; [all …]
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H A D | sun7i-a20-olinuxino-micro.dts | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 /dts-v1/; 46 #include "sun7i-a20.dtsi" 47 #include "sunxi-common-regulators.dtsi" 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/input/input.h> 51 #include <dt-bindings/interrupt-controller/irq.h> 54 model = "Olimex A20-Olinuxino Micro"; 55 compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp-zc1751-xm016-dc2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm016-dc2 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; [all …]
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H A D | zynqmp-zcu100-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 12 /dts-v1/; 15 #include "zynqmp-clk-ccf.dtsi" 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/gpio/gpio.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 #include <dt-bindings/phy/phy.h> [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6ull-dhcor-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 6 #include <dt-bindings/clock/imx6ul-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pwm/pwm.h> 11 #include <dt-bindings/regulator/dlg,da9063-regulator.h> 16 /delete-property/ mmc0; 17 /delete-property/ mmc1; 21 /* Appropriate memory size will be filled by U-Boot */ [all …]
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/openbmc/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-8040-clearfog-gt-8k.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include "armada-8040.dtsi" 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/gpio/gpio.h> 16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040", 17 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 20 stdout-path = "serial0:115200n8"; 35 compatible = "pwm-fan"; 37 cooling-levels = <0 51 102 153 204 255>; 38 #cooling-cells = <2>; [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3128-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 arm-pmu { [all …]
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-388-clearfog.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include "armada-388-clearfog.dtsi" 13 compatible = "solidrun,clearfog-a1", "marvell,armada388", 17 internal-regs { 27 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-0 = <&rear_button_pins>; 36 pinctrl-names = "default"; [all …]
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H A D | armada-385-clearfog-gtr.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work 9 SERDES mapping - 10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0 12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1 14 4. mini PCIe CON2 - PCIe2 17 USB 2.0 mapping - 18 0. USB 2.0 - 0 USB pins header CON12 19 1. USB 2.0 - 1 mini PCIe CON2 20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3) [all …]
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H A D | armada-xp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 16 #include "armada-370-xp.dtsi" 19 #address-cells = <2>; 20 #size-cells = <2>; 23 compatible = "marvell,armadaxp", "marvell,armada-370-xp"; 31 compatible = "marvell,armadaxp-mbus", "simple-bus"; 38 internal-regs { 40 compatible = "marvell,armada-xp-sdram-controller"; [all …]
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H A D | armada-388-helios4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 /dts-v1/; 11 #include "armada-388.dtsi" 12 #include "armada-38x-solidrun-microsom.dtsi" 25 /* So that mvebu u-boot can update the MAC addresses */ 30 stdout-path = "serial0:115200n8"; 33 reg_12v: regulator-12v { 34 compatible = "regulator-fixed"; 35 regulator-name = "power_brick_12V"; 36 regulator-min-microvolt = <12000000>; [all …]
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H A D | armada-388-clearfog.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include "armada-388.dtsi" 9 #include "armada-38x-solidrun-microsom.dtsi" 13 /* So that mvebu u-boot can update the MAC addresses */ 20 stdout-path = "serial0:115200n8"; 23 reg_3p3v: regulator-3p3v { 24 compatible = "regulator-fixed"; 25 regulator-name = "3P3V"; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; [all …]
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H A D | armada-370.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 15 #include "armada-370-xp.dtsi" 18 #address-cells = <1>; 19 #size-cells = <1>; 22 compatible = "marvell,armada370", "marvell,armada-370-xp"; 31 compatible = "marvell,armada370-mbus", "simple-bus"; 39 compatible = "marvell,armada-370-pcie"; 43 #address-cells = <3>; [all …]
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/openbmc/linux/arch/arm/boot/dts/microchip/ |
H A D | at91-q5xr5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 8 /dts-v1/; 24 #address-cells = <1>; 25 #size-cells = <1>; 29 compatible = "atmel,osc", "fixed-clock"; 30 clock-frequency = <18432000>; 34 clock-frequency = <32768>; 38 clock-frequency = <18432000>; 51 compatible = "cfi-flash"; 52 #address-cells = <1>; [all …]
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H A D | at91-sama5d3_eds.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * at91-sama5d3_eds.dts - Device Tree file for the SAMA5D3 Ethernet 10 /dts-v1/; 15 compatible = "microchip,sama5d3-eds", "atmel,sama5d36", 19 stdout-path = "serial0:115200n8"; 22 gpio-keys { 23 compatible = "gpio-keys"; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pinctrl_key_gpio>; 28 button-3 { [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3368-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am437x-idk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 9 #include <dt-bindings/pinctrl/am43xx.h> 10 #include <dt-bindings/pwm/pwm.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 16 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43"; 19 stdout-path = &uart0; 22 v24_0d: fixed-regulator-v24_0d { [all …]
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