1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree file for Exegin Q5xR5 board 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2014 Owen Kirby <osk@exegin.com> 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring/dts-v1/; 9*724ba675SRob Herring#include "at91sam9g20.dtsi" 10*724ba675SRob Herring 11*724ba675SRob Herring/ { 12*724ba675SRob Herring model = "Exegin Q5x (rev5)"; 13*724ba675SRob Herring compatible = "exegin,q5xr5", "atmel,at91sam9g20", "atmel,at91sam9"; 14*724ba675SRob Herring 15*724ba675SRob Herring chosen { 16*724ba675SRob Herring bootargs = "console=ttyS0,115200 rootfstype=squashfs,jffs2"; 17*724ba675SRob Herring }; 18*724ba675SRob Herring 19*724ba675SRob Herring memory { 20*724ba675SRob Herring reg = <0x20000000 0x0>; 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring clocks { 24*724ba675SRob Herring #address-cells = <1>; 25*724ba675SRob Herring #size-cells = <1>; 26*724ba675SRob Herring ranges; 27*724ba675SRob Herring 28*724ba675SRob Herring main_clock: clock@0 { 29*724ba675SRob Herring compatible = "atmel,osc", "fixed-clock"; 30*724ba675SRob Herring clock-frequency = <18432000>; 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring slow_xtal { 34*724ba675SRob Herring clock-frequency = <32768>; 35*724ba675SRob Herring }; 36*724ba675SRob Herring 37*724ba675SRob Herring main_xtal { 38*724ba675SRob Herring clock-frequency = <18432000>; 39*724ba675SRob Herring }; 40*724ba675SRob Herring }; 41*724ba675SRob Herring}; 42*724ba675SRob Herring 43*724ba675SRob Herring&dbgu { 44*724ba675SRob Herring status = "okay"; 45*724ba675SRob Herring}; 46*724ba675SRob Herring 47*724ba675SRob Herring&ebi { 48*724ba675SRob Herring status = "okay"; 49*724ba675SRob Herring 50*724ba675SRob Herring flash: flash@0 { 51*724ba675SRob Herring compatible = "cfi-flash"; 52*724ba675SRob Herring #address-cells = <1>; 53*724ba675SRob Herring #size-cells = <1>; 54*724ba675SRob Herring reg = <0x0 0x1000000 0x800000>; 55*724ba675SRob Herring bank-width = <2>; 56*724ba675SRob Herring 57*724ba675SRob Herring partitions { 58*724ba675SRob Herring compatible = "fixed-partitions"; 59*724ba675SRob Herring #address-cells = <1>; 60*724ba675SRob Herring #size-cells = <1>; 61*724ba675SRob Herring 62*724ba675SRob Herring kernel@0 { 63*724ba675SRob Herring label = "kernel"; 64*724ba675SRob Herring reg = <0x0 0x200000>; 65*724ba675SRob Herring }; 66*724ba675SRob Herring 67*724ba675SRob Herring rootfs@200000 { 68*724ba675SRob Herring label = "rootfs"; 69*724ba675SRob Herring reg = <0x200000 0x600000>; 70*724ba675SRob Herring }; 71*724ba675SRob Herring }; 72*724ba675SRob Herring }; 73*724ba675SRob Herring}; 74*724ba675SRob Herring 75*724ba675SRob Herring&macb0 { 76*724ba675SRob Herring phy-mode = "mii"; 77*724ba675SRob Herring status = "okay"; 78*724ba675SRob Herring}; 79*724ba675SRob Herring 80*724ba675SRob Herring&pinctrl { 81*724ba675SRob Herring board { 82*724ba675SRob Herring pinctrl_pck0_as_mck: pck0_as_mck { 83*724ba675SRob Herring atmel,pins = <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; 84*724ba675SRob Herring }; 85*724ba675SRob Herring }; 86*724ba675SRob Herring 87*724ba675SRob Herring spi0 { 88*724ba675SRob Herring pinctrl_spi0: spi0-0 { 89*724ba675SRob Herring atmel,pins = 90*724ba675SRob Herring <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE 91*724ba675SRob Herring AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE 92*724ba675SRob Herring AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 93*724ba675SRob Herring }; 94*724ba675SRob Herring 95*724ba675SRob Herring pinctrl_spi0_npcs0: spi0_npcs0 { 96*724ba675SRob Herring atmel,pins = <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; 97*724ba675SRob Herring }; 98*724ba675SRob Herring 99*724ba675SRob Herring pinctrl_spi0_npcs1: spi0_npcs1 { 100*724ba675SRob Herring atmel,pins = <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; 101*724ba675SRob Herring }; 102*724ba675SRob Herring }; 103*724ba675SRob Herring 104*724ba675SRob Herring spi1 { 105*724ba675SRob Herring pinctrl_spi1: spi1-0 { 106*724ba675SRob Herring atmel,pins = 107*724ba675SRob Herring <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE 108*724ba675SRob Herring AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE 109*724ba675SRob Herring AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring pinctrl_spi1_npcs0: spi1_npcs0 { 113*724ba675SRob Herring atmel,pins = <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; 114*724ba675SRob Herring }; 115*724ba675SRob Herring 116*724ba675SRob Herring pinctrl_spi1_npcs1: spi1_npcs1 { 117*724ba675SRob Herring atmel,pins = <AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 118*724ba675SRob Herring }; 119*724ba675SRob Herring }; 120*724ba675SRob Herring}; 121*724ba675SRob Herring 122*724ba675SRob Herring&spi0 { 123*724ba675SRob Herring pinctrl-names = "default"; 124*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi0 &pinctrl_spi0_npcs0 &pinctrl_spi0_npcs1>; 125*724ba675SRob Herring cs-gpios = <&pioA 3 GPIO_ACTIVE_HIGH>, <&pioC 11 GPIO_ACTIVE_LOW>, <0>, <0>; 126*724ba675SRob Herring status = "okay"; 127*724ba675SRob Herring 128*724ba675SRob Herring flash@0 { 129*724ba675SRob Herring compatible = "jedec,spi-nor"; 130*724ba675SRob Herring spi-max-frequency = <20000000>; 131*724ba675SRob Herring reg = <0>; 132*724ba675SRob Herring #address-cells = <1>; 133*724ba675SRob Herring #size-cells = <1>; 134*724ba675SRob Herring 135*724ba675SRob Herring at91boot@0 { 136*724ba675SRob Herring label = "at91boot"; 137*724ba675SRob Herring reg = <0x0 0x4000>; 138*724ba675SRob Herring }; 139*724ba675SRob Herring 140*724ba675SRob Herring uenv@4000 { 141*724ba675SRob Herring label = "uboot-env"; 142*724ba675SRob Herring reg = <0x4000 0x4000>; 143*724ba675SRob Herring }; 144*724ba675SRob Herring 145*724ba675SRob Herring uboot@8000 { 146*724ba675SRob Herring label = "uboot"; 147*724ba675SRob Herring reg = <0x8000 0x3E000>; 148*724ba675SRob Herring }; 149*724ba675SRob Herring }; 150*724ba675SRob Herring}; 151*724ba675SRob Herring 152*724ba675SRob Herring&spi1 { 153*724ba675SRob Herring pinctrl-names = "default"; 154*724ba675SRob Herring pinctrl-0 = <&pinctrl_spi1 &pinctrl_spi1_npcs0 &pinctrl_spi1_npcs1>; 155*724ba675SRob Herring cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>, <&pioC 5 GPIO_ACTIVE_LOW>, <0>, <0>; 156*724ba675SRob Herring status = "okay"; 157*724ba675SRob Herring}; 158*724ba675SRob Herring 159*724ba675SRob Herring&usart0 { 160*724ba675SRob Herring pinctrl-0 = 161*724ba675SRob Herring <&pinctrl_usart0 162*724ba675SRob Herring &pinctrl_usart0_rts 163*724ba675SRob Herring &pinctrl_usart0_cts 164*724ba675SRob Herring &pinctrl_usart0_dtr_dsr 165*724ba675SRob Herring &pinctrl_usart0_dcd 166*724ba675SRob Herring &pinctrl_usart0_ri>; 167*724ba675SRob Herring status = "okay"; 168*724ba675SRob Herring}; 169*724ba675SRob Herring 170*724ba675SRob Herring&usb0 { 171*724ba675SRob Herring num-ports = <2>; 172*724ba675SRob Herring status = "okay"; 173*724ba675SRob Herring}; 174*724ba675SRob Herring 175*724ba675SRob Herring&usb1 { 176*724ba675SRob Herring status = "okay"; 177*724ba675SRob Herring}; 178*724ba675SRob Herring 179*724ba675SRob Herring&watchdog { 180*724ba675SRob Herring status = "okay"; 181*724ba675SRob Herring}; 182