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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
12 controller specific like delay in clock or data lines, etc. These properties
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <broonie@kernel.org>
[all …]
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
16 devices using different transports (I2C, SPI) and different functions (e.g.
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
[all …]
/openbmc/linux/drivers/iio/gyro/
H A Dadxrs450.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
25 /* The MSB for the spi commands */
67 * struct adxrs450_state - device instance specific data
68 * @us: actual spi_device
69 * @buf_lock: mutex to protect tx and rx
71 * @rx: receive buffer
74 struct spi_device *us; member
77 __be32 rx; member
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-dw-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
15 #include <linux/platform_data/dma-dw.h>
16 #include <linux/spi/spi.h>
19 #include "spi-dw.h"
30 if (s->dma_dev != chan->device->dev) in dw_spi_dma_chan_filter()
33 chan->private = s; in dw_spi_dma_chan_filter()
43 def_burst = dws->fifo_len / 2; in dw_spi_dma_maxburst_init()
45 ret = dma_get_slave_caps(dws->rxchan, &caps); in dw_spi_dma_maxburst_init()
51 dws->rxburst = min(max_burst, def_burst); in dw_spi_dma_maxburst_init()
[all …]
H A Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Designware SPI core controller driver (refer pxa2xx_spi.c)
9 #include <linux/dma-mapping.h>
14 #include <linux/delay.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/spi-mem.h>
21 #include "spi-dw.h"
30 u32 rx_sample_dly; /* RX sample delay */
64 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
65 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
[all …]
H A Dspi-mpc512x-psc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC512x PSC in SPI mode driver.
7 * Hongjun Chen <hong-jun.chen@freescale.com>
21 #include <linux/delay.h>
23 #include <linux/spi/spi.h>
37 switch (mps->type) { \
39 struct mpc52xx_psc __iomem *psc = mps->psc; \
40 __ret = &psc->regname; \
44 struct mpc5125_psc __iomem *psc = mps->psc; \
45 __ret = &psc->regname; \
[all …]
/openbmc/linux/net/nfc/nci/
H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/spi/spi.h>
12 #include <linux/crc-ccitt.h>
37 /* a NULL skb means we just want the SPI chip select line to raise */ in __nci_spi_send()
39 t.tx_buf = skb->data; in __nci_spi_send()
40 t.len = skb->len; in __nci_spi_send()
47 t.delay.value = nspi->xfer_udelay; in __nci_spi_send()
48 t.delay.unit = SPI_DELAY_UNIT_USECS; in __nci_spi_send()
49 t.speed_hz = nspi->xfer_speed_hz; in __nci_spi_send()
54 return spi_sync(nspi->spi, &m); in __nci_spi_send()
[all …]
/openbmc/u-boot/drivers/spi/
H A Dtegra210_qspi.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch-tegra/clk_rst.h>
13 #include <spi.h>
79 u32 rsvd[56]; /* 028-107 reserved */
81 u32 rsvd2[31]; /* 10c-187 reserved */
97 struct tegra_spi_platdata *plat = bus->platdata; in tegra210_qspi_ofdata_to_platdata()
98 const void *blob = gd->fdt_blob; in tegra210_qspi_ofdata_to_platdata()
101 plat->base = devfdt_get_addr(bus); in tegra210_qspi_ofdata_to_platdata()
102 plat->periph_id = clock_decode_periph_id(bus); in tegra210_qspi_ofdata_to_platdata()
104 if (plat->periph_id == PERIPH_ID_NONE) { in tegra210_qspi_ofdata_to_platdata()
[all …]
H A Dmscc_bb_spi.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Microsemi SoCs spi driver
12 #include <spi.h>
16 #include <linux/delay.h>
28 /* Delay 24 instructions for this particular application */
33 if (!priv->cs_active) { in mscc_bb_spi_cs_activate()
37 priv->cs_num = cs; in mscc_bb_spi_cs_activate()
41 priv->clk1 = ICPU_SW_MODE_SW_SPI_SCK; in mscc_bb_spi_cs_activate()
42 priv->clk2 = 0; in mscc_bb_spi_cs_activate()
45 priv->clk1 = 0; in mscc_bb_spi_cs_activate()
[all …]
H A Drk_spi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * spi driver for rockchip
7 * (C) Copyright 2008-2013 Rockchip Electronics
14 #include <dt-structs.h>
16 #include <spi.h>
31 s32 frequency; /* Default clock frequency, -1 for none */
33 uint deactivate_delay_us; /* Delay to wait after deactivate */
34 uint activate_delay_us; /* Delay to wait after activate */
55 debug("ctrl0: \t\t0x%08x\n", readl(&regs->ctrlr0)); in rkspi_dump_regs()
56 debug("ctrl1: \t\t0x%08x\n", readl(&regs->ctrlr1)); in rkspi_dump_regs()
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/power/qcom-rpmpd.h>
10 #include <dt-bindings/gpio/gpio.h>
13 interrupt-parent = <&intc>;
15 qcom,msm-id = <292 0x0>;
[all …]
H A Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,sm8350.h>
[all …]
H A Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
19 #address-cells = <2>;
[all …]
H A Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
[all …]
H A Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/qcom-rpmpd.h>
10 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
13 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
14 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
[all …]
H A Dmsm8976.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno
9 #include <dt-bindings/clock/qcom,gcc-msm8976.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <2>;
[all …]
H A Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
22 stdout-path = &lpuart0;
30 reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
37 * This will be automatically added to dtb if OP-TEE is installed.
40 * no-map;
46 compatible = "shared-dma-pool";
[all …]
/openbmc/linux/Documentation/networking/
H A Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
43 TX ring cause delay. Drivers usually delay cleaning up the
44 ring-buffers for various performance reasons, and packets stalling
48 (Intel 82599 chip). This driver (ixgbe) combines TX+RX ring cleanups,
49 and the cleanup interval is affected by the ethtool --coalesce setting
50 of parameter "rx-usecs".
54 # ethtool -C ethX rx-usecs 30
[all …]
/openbmc/linux/include/linux/iio/imu/
H A Dadis.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
12 #include <linux/spi/spi.h>
26 * struct adis_timeouts - ADIS chip variant timeouts
27 * @reset_ms - Wait time after rst pin goes inactive
28 * @sw_reset_ms - Wait time after sw reset command
29 * @self_test_ms - Wait time after self test command
38 * struct adis_data - ADIS chip variant specific data
39 * @read_delay: SPI delay for read operations in us
40 * @write_delay: SPI delay for write operations in us
[all …]
/openbmc/linux/drivers/iio/adc/
H A Dmax1241.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MAX1241 low-power, 12-bit serial ADC
5 * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf
8 #include <linux/delay.h>
13 #include <linux/spi/spi.h>
23 struct spi_device *spi; member
46 * tconv us. in max1241_read()
50 .delay.value = 8, in max1241_read()
51 .delay.unit = SPI_DELAY_UNIT_USECS, in max1241_read()
54 * Then read two bytes of data in our RX buffer. in max1241_read()
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
18 model = "PHYTEC phyCORE-AM64x";
19 compatible = "phytec,am64-phycore-som", "ti,am642";
32 reserved-memory {
33 #address-cells = <2>;
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dac14xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
[all …]

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