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/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dfsl,spba-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fsl,spba-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Shared Peripherals Bus Interface
10 - Shawn Guo <shawnguo@kernel.org>
13 A simple bus enabling access to shared peripherals.
15 The "spba-bus" follows the "simple-bus" set of properties, as
17 "simple-bus" because the SDMA controller uses this compatible flag to
19 the SDMA can access. There are no special clocks for the bus, because
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,esai.txt3 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
10 - compatible : Compatible list, should contain one of the following
12 "fsl,imx35-esai",
13 "fsl,vf610-esai",
14 "fsl,imx6ull-esai",
15 "fsl,imx8qm-esai",
17 - reg : Offset and length of the register set for the device.
19 - interrupts : Contains the spdif interrupt.
21 - dmas : Generic dma devicetree binding as described in
24 - dma-names : Two dmas have to be defined, "tx" and "rx".
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H A Dfsl,spdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
20 - fsl,imx35-spdif
21 - fsl,vf610-spdif
22 - fsl,imx6sx-spdif
23 - fsl,imx8qm-spdif
24 - fsl,imx8qxp-spdif
25 - fsl,imx8mq-spdif
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H A Dfsl,asrc.txt11 - compatible : Compatible list, should contain one of the following
13 "fsl,imx35-asrc",
14 "fsl,imx53-asrc",
15 "fsl,imx8qm-asrc",
16 "fsl,imx8qxp-asrc",
18 - reg : Offset and length of the register set for the device.
20 - interrupts : Contains the spdif interrupt.
22 - dmas : Generic dma devicetree binding as described in
25 - dma-names : Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc".
27 - clocks : Contains an entry for each entry in clock-names.
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/openbmc/u-boot/arch/arm/dts/
H A Dimx6qdl-u-boot.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 u-boot,dm-spl;
10 aips-bus@2000000 {
11 u-boot,dm-spl;
12 spba-bus@2000000 {
13 u-boot,dm-spl;
17 aips-bus@2100000 {
18 u-boot,dm-spl;
24 u-boot,dm-spl;
28 u-boot,dm-spl;
H A Dimx53.dtsi10 * http://www.opensource.org/licenses/gpl-license.html
15 #include "imx53-pinfunc.h"
16 #include <dt-bindings/clock/imx5-clock.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/input/input.h>
19 #include <dt-bindings/interrupt-controller/irq.h>
38 tzic: tz-interrupt-controller@fffc000 {
39 compatible = "fsl,imx53-tzic", "fsl,tzic";
40 interrupt-controller;
41 #interrupt-cells = <1>;
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H A Dimx6ul-opos6uldev-u-boot.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source extras for U-Boot for the OPOS6ULDev board
8 #include "imx6ul-opos6ul-u-boot.dtsi"
11 u-boot,dm-spl;
13 spba-bus@02000000 {
14 u-boot,dm-spl;
19 u-boot,dm-spl;
23 u-boot,dm-spl;
H A Dimx6sx.dtsi9 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6sx-pinfunc.h"
55 #address-cells = <1>;
56 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
62 next-level-cache = <&L2>;
63 operating-points = <
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H A Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
16 * Also for U-Boot there must be a pre-existing /memory node.
55 compatible = "fsl,imx-ckil", "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <32768>;
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H A Dimx6sl.dtsi10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "imx6sl-pinfunc.h"
12 #include <dt-bindings/clock/imx6sl-clock.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
21 * Also for U-Boot there must be a pre-existing /memory node.
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a9";
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H A Dimx6sll.dtsi9 #include <dt-bindings/clock/imx6sll-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx6sll-pinfunc.h"
43 #address-cells = <1>;
44 #size-cells = <0>;
47 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
51 operating-points = <
58 fsl,soc-operating-points = <
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx35.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include "imx35-pinfunc.h"
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1136jf-s";
48 avic: avic-interrupt-controller@68000000 {
49 compatible = "fsl,imx35-avic", "fsl,avic";
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H A Dimx31.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
7 #address-cells = <1>;
8 #size-cells = <1>;
11 * pre-existing /chosen node to be available to insert the
34 #address-cells = <1>;
35 #size-cells = <0>;
38 compatible = "arm,arm1136jf-s";
44 avic: interrupt-controller@68000000 {
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H A Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <32768>;
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H A Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
60 #address-cells = <1>;
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H A Dimx50.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 #include "imx50-pinfunc.h"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/imx5-clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a8";
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H A Dimx6sl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6sl-pinfunc.h"
7 #include <dt-bindings/clock/imx6sl-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a9";
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H A Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
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H A Dimx51.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx51-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
42 tzic: tz-interrupt-controller@e0000000 {
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H A Dimx25.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
13 * pre-existing /chosen node to be available to insert the
46 #address-cells = <1>;
47 #size-cells = <0>;
50 compatible = "arm,arm926ej-s";
56 asic: asic-interrupt-controller@68000000 {
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H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
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H A Dimx53.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx53-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
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/openbmc/qemu/include/hw/arm/
H A Dfsl-imx25.h4 * Copyright (C) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
36 #define TYPE_FSL_IMX25 "fsl-imx25"
89 * 0x43F8_0000 0x43F8_3FFF 16 Kbytes I2C-1
90 * 0x43F8_4000 0x43F8_7FFF 16 Kbytes I2C-3
91 * 0x43F8_8000 0x43F8_BFFF 16 Kbytes CAN-1
92 * 0x43F8_C000 0x43F8_FFFF 16 Kbytes CAN-2
93 * 0x43F9_0000 0x43F9_3FFF 16 Kbytes UART-1
94 * 0x43F9_4000 0x43F9_7FFF 16 Kbytes UART-2
95 * 0x43F9_8000 0x43F9_BFFF 16 Kbytes I2C-2
96 * 0x43F9_C000 0x43F9_FFFF 16 Kbytes 1-Wire
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