/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,sm8550-rpmh.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550 10 - Abel Vesa <abel.vesa@linaro.org> 11 - Neil Armstrong <neil.armstrong@linaro.org> 21 See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h 26 - qcom,sm8550-aggre1-noc 27 - qcom,sm8550-aggre2-noc [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,sm8550-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8550-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on SM8550 10 - Bjorn Andersson <andersson@kernel.org> 14 domains on SM8550 16 See also:: include/dt-bindings/clock/qcom,sm8550-gcc.h 20 const: qcom,sm8550-gcc 24 - description: Board XO source [all …]
|
H A D | qcom,sm8550-dispcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display Clock & Reset Controller for SM8550 10 - Bjorn Andersson <andersson@kernel.org> 11 - Neil Armstrong <neil.armstrong@linaro.org> 15 domains on SM8550. 17 See also:: include/dt-bindings/clock/qcom,sm8550-dispcc.h 22 - qcom,sm8550-dispcc [all …]
|
H A D | qcom,sm8450-gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konrad.dybcio@linaro.org> 17 include/dt-bindings/clock/qcom,sm8450-gpucc.h 18 include/dt-bindings/clock/qcom,sm8550-gpucc.h 19 include/dt-bindings/reset/qcom,sm8450-gpucc.h 24 - qcom,sm8450-gpucc 25 - qcom,sm8550-gpucc [all …]
|
H A D | qcom,sm8450-videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 16 See also:: include/dt-bindings/clock/qcom,videocc-sm8450.h 21 - qcom,sm8450-videocc 22 - qcom,sm8550-videocc 29 - description: Board XO source 30 - description: Video AHB clock from GCC [all …]
|
H A D | qcom,rpmhcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 20 - qcom,qdu1000-rpmh-clk 21 - qcom,sa8775p-rpmh-clk 22 - qcom,sc7180-rpmh-clk 23 - qcom,sc7280-rpmh-clk 24 - qcom,sc8180x-rpmh-clk 25 - qcom,sc8280xp-rpmh-clk [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | qcom,sm8550-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8550-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM8550 Display MDSS 10 - Neil Armstrong <neil.armstrong@linaro.org> 13 SM8550 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm8550-mdss 24 - description: Display MDSS AHB [all …]
|
H A D | qcom,sm8550-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8550-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SM8550 Display DPU 10 - Neil Armstrong <neil.armstrong@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm8550-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set [all …]
|
H A D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | qcom,sc8280xp-qmp-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 19 - qcom,sa8775p-qmp-gen4x2-pcie-phy 20 - qcom,sa8775p-qmp-gen4x4-pcie-phy 21 - qcom,sc8180x-qmp-pcie-phy 22 - qcom,sc8280xp-qmp-gen3x1-pcie-phy 23 - qcom,sc8280xp-qmp-gen3x2-pcie-phy [all …]
|
H A D | qcom,snps-eusb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Abel Vesa <abel.vesa@linaro.org> 17 const: qcom,sm8550-snps-eusb2-phy 22 "#phy-cells": 27 - description: ref 29 clock-names: 31 - const: ref [all …]
|
H A D | qcom,sc8280xp-qmp-usb43dp-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP) 10 - Vinod Koul <vkoul@kernel.org> 19 - qcom,sc7180-qmp-usb3-dp-phy 20 - qcom,sc7280-qmp-usb3-dp-phy 21 - qcom,sc8180x-qmp-usb3-dp-phy 22 - qcom,sc8280xp-qmp-usb43dp-phy [all …]
|
H A D | qcom,sc8280xp-qmp-ufs-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 19 - qcom,msm8996-qmp-ufs-phy 20 - qcom,msm8998-qmp-ufs-phy 21 - qcom,sa8775p-qmp-ufs-phy 22 - qcom,sc8180x-qmp-ufs-phy 23 - qcom,sc8280xp-qmp-ufs-phy [all …]
|
/openbmc/linux/drivers/clk/qcom/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
|
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 829 tristate "SM8550 Display Clock Controller" 834 SM8550 devices. 918 tristate "SM8550 Global Clock Controller" 922 Support for the global clock controller on SM8550 devices. 999 tristate "SM8550 Graphics Clock Controller" 1003 Support for the graphics clock controller on SM8550 devices. 1008 tristate "SM8550 TCSR Clock Controller" 1012 Support for the TCSR clock controller on SM8550 devices. 1046 tristate "SM8550 Video Clock Controller" [all …]
|
/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm8550.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 8 #include <dt-bindings/clock/qcom,sm8550-gcc.h> 9 #include <dt-bindings/clock/qcom,sm8550-gpucc.h> 10 #include <dt-bindings/clock/qcom,sm8550-tcsr.h> 11 #include <dt-bindings/clock/qcom,sm8550-dispcc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
|
H A D | sm8550-qrd.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include <dt-bindings/leds/common.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10 #include "sm8550.dtsi" 20 model = "Qualcomm Technologies, Inc. SM8550 QRD"; 21 compatible = "qcom,sm8550-qrd", "qcom,sm8550"; 22 chassis-type = "handset"; 28 wcd938x: audio-codec { 29 compatible = "qcom,wcd9385-codec"; [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/crypto/ |
H A D | qcom,inline-crypto-engine.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 15 - enum: 16 - qcom,sm8450-inline-crypto-engine 17 - qcom,sm8550-inline-crypto-engine 18 - const: qcom,inline-crypto-engine 27 - compatible [all …]
|
H A D | qcom-qce.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/qcom-qce.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bhupesh Sharma <bhupesh.sharma@linaro.org> 19 - const: qcom,crypto-v5.1 23 - const: qcom,crypto-v5.4 27 - items: 28 - enum: 29 - qcom,ipq4019-qce [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/firmware/ |
H A D | qcom,scm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | qcom,dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wesley Cheng <quic_wcheng@quicinc.com> 15 - enum: 16 - qcom,ipq4019-dwc3 17 - qcom,ipq5332-dwc3 18 - qcom,ipq6018-dwc3 19 - qcom,ipq8064-dwc3 20 - qcom,ipq8074-dwc3 [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/ufs/ |
H A D | qcom,ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Andy Gross <agross@kernel.org> 13 # Select only our matches, not all jedec,ufs-2.0 20 - compatible 25 - enum: 26 - qcom,msm8994-ufshc 27 - qcom,msm8996-ufshc [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | cpufreq-qcom-hw.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/cpufreq/cpufreq-qcom-hw.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 21 - description: v1 of CPUFREQ HW 23 - enum: 24 - qcom,qcm2290-cpufreq-hw 25 - qcom,sc7180-cpufreq-hw 26 - qcom,sdm845-cpufreq-hw [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm SDHCI controller (sdhci-msm) 10 - Bhupesh Sharma <bhupesh.sharma@linaro.org> 19 - enum: 20 - qcom,sdhci-msm-v4 22 - items: 23 - enum: [all …]
|