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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43 |
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| #
e3fdbef1 |
| 28-Jul-2023 |
Sricharan Ramabadhran <quic_srichara@quicinc.com> |
clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018
Add support for the global clock controller found on IPQ5018
based devices.
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-dev
clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018
Add support for the global clock controller found on IPQ5018
based devices.
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Co-developed-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/1690533192-22220-3-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
show more ...
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Revision tags: v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29 |
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| #
bac4675a |
| 12-May-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
clk: qcom: drop lcc-mdm9615 in favour of lcc-msm8960
The two LCC drivers, msm8960 and mdm9615 are almost the same. The only
difference is the platform clock: msm8960/apq8064 use pxo, while mdm9615
u
clk: qcom: drop lcc-mdm9615 in favour of lcc-msm8960
The two LCC drivers, msm8960 and mdm9615 are almost the same. The only
difference is the platform clock: msm8960/apq8064 use pxo, while mdm9615
uses cxo. Drop the lcc-mdm9615 in favour of using lcc-msm8960 instead.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230512211727.3445575-6-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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| #
a5c9c3ba |
| 08-Jun-2023 |
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
clk: qcom: Add lpass clock controller driver for SC8280XP
Add support for the lpass clock controller found on SC8280XP based devices.
This would allow lpass peripheral loader drivers to control the
clk: qcom: Add lpass clock controller driver for SC8280XP
Add support for the lpass clock controller found on SC8280XP based devices.
This would allow lpass peripheral loader drivers to control the clocks and
bring the subsystems out of reset.
Currently this patch only supports resets as the Q6DSP is in control of
LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg
channel.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-4-srinivas.kandagatla@linaro.org
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| #
bfae4074 |
| 24-May-2023 |
Jagadeesh Kona <quic_jkona@quicinc.com> |
clk: qcom: gpucc-sm8550: Add support for graphics clock controller
Add support for gpucc driver on SM8550, which provides clocks for the
graphics subsystem.
Co-developed-by: Taniya Das <quic_tdas@q
clk: qcom: gpucc-sm8550: Add support for graphics clock controller
Add support for gpucc driver on SM8550, which provides clocks for the
graphics subsystem.
Co-developed-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524181800.28717-3-quic_jkona@quicinc.com
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| #
728692d4 |
| 17-May-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
clk: qcom: Add support for SM8450 GPUCC
The GPUCC manages the clocks for the Adreno GPU found on the
sm8450 SoCs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Anders
clk: qcom: Add support for SM8450 GPUCC
The GPUCC manages the clocks for the Adreno GPU found on the
sm8450 SoCs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-4-4f40e282af1d@linaro.org
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| #
108cdc09 |
| 12-May-2023 |
Imran Shaik <quic_imrashai@quicinc.com> |
clk: qcom: Add GCC driver support for SDX75
Add Global Clock Controller (GCC) support for SDX75 platform.
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas
clk: qcom: Add GCC driver support for SDX75
Add Global Clock Controller (GCC) support for SDX75 platform.
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-6-quic_tdas@quicinc.com
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| #
f53153a3 |
| 24-May-2023 |
Jagadeesh Kona <quic_jkona@quicinc.com> |
clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550
Add support for the video clock controller for video clients to be able
to request for videocc clocks on SM8550 platform.
Co-
clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550
Add support for the video clock controller for video clients to be able
to request for videocc clocks on SM8550 platform.
Co-developed-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524145203.13153-4-quic_jkona@quicinc.com
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| #
441fe711 |
| 24-May-2023 |
Taniya Das <quic_tdas@quicinc.com> |
clk: qcom: videocc-sm8450: Add video clock controller driver for SM8450
Add support for the video clock controller driver for peripheral clock
clients to be able to request for video cc clocks.
Sig
clk: qcom: videocc-sm8450: Add video clock controller driver for SM8450
Add support for the video clock controller driver for peripheral clock
clients to be able to request for video cc clocks.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524140656.7076-3-quic_tdas@quicinc.com
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Revision tags: v6.1.28, v6.1.27, v6.1.26, v6.3 |
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| #
fd0b5b10 |
| 20-Apr-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
clk: qcom: Introduce SM8350 VIDEOCC
Add support for the Video Clock Controller found on the SM8350 SoC.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <kon
clk: qcom: Introduce SM8350 VIDEOCC
Add support for the Video Clock Controller found on the SM8350 SoC.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230413-topic-lahaina_vidcc-v4-2-86c714a66a81@linaro.org
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Revision tags: v6.1.25, v6.1.24 |
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| #
0afa16af |
| 11-Apr-2023 |
Shazad Hussain <quic_shazhuss@quicinc.com> |
clk: qcom: add the GPUCC driver for sa8775p
Add the clock driver for the Qualcomm Graphics Clock control module.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
[Bartosz: make ready for u
clk: qcom: add the GPUCC driver for sa8775p
Add the clock driver for the Qualcomm Graphics Clock control module.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
[Bartosz: make ready for upstream]
Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230411125910.401075-3-brgl@bgdev.pl
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Revision tags: v6.1.23, v6.1.22, v6.1.21, v6.1.20 |
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| #
d75b82cf |
| 16-Mar-2023 |
Devi Priya <quic_devipriy@quicinc.com> |
clk: qcom: Add Global Clock Controller driver for IPQ9574
Add Global Clock Controller (GCC) driver for ipq9574 based devices
Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Anu
clk: qcom: Add Global Clock Controller driver for IPQ9574
Add Global Clock Controller (GCC) driver for ipq9574 based devices
Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230316072940.29137-3-quic_devipriy@quicinc.com
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Revision tags: v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14 |
|
| #
33cc27a4 |
| 23-Feb-2023 |
Otto Pflüger <otto.pflueger@abscue.de> |
clk: qcom: Add global clock controller driver for MSM8917
This driver provides clocks, resets and power domains needed for various
components of the MSM8917 SoC and the very similar QM215 SoC.
Acco
clk: qcom: Add global clock controller driver for MSM8917
This driver provides clocks, resets and power domains needed for various
components of the MSM8917 SoC and the very similar QM215 SoC.
According to [1] in the downstream kernel, the GPU clock has a different
source mapping on QM215 (gcc_gfx3d_map vs gcc_gfx3d_map_qm215).
[1]: https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LF.UM.8.6.2-28000-89xx.0/include/dt-bindings/clock/msm-clocks-hwio-8952.h#L298
Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230223180935.60546-3-otto.pflueger@abscue.de
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| #
3d89d529 |
| 07-Mar-2023 |
Kathiravan T <quic_kathirav@quicinc.com> |
clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC
Add support for the global clock controller found on IPQ5332 SoC. PLL
used on IPQ5332 is of type Stromer Plus PLL, however the pro
clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC
Add support for the global clock controller found on IPQ5332 SoC. PLL
used on IPQ5332 is of type Stromer Plus PLL, however the programming
sequence is same as Stromer PLL, so lets re-use the Stromer PLL ops.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230307062232.4889-5-quic_kathirav@quicinc.com
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Revision tags: v6.1.13, v6.2, v6.1.12 |
|
| #
a808d58d |
| 13-Feb-2023 |
Danila Tikhonov <danila@jiaxyga.com> |
clk: qcom: Add Global Clock Controller (GCC) driver for SM7150
Add support for the global clock controller found on SM7150
based devices. This should allow most non-multimedia device
drivers to prob
clk: qcom: Add Global Clock Controller (GCC) driver for SM7150
Add support for the global clock controller found on SM7150
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Co-developed-by: David Wronek <davidwronek@gmail.com>
Signed-off-by: David Wronek <davidwronek@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230213165318.127160-3-danila@jiaxyga.com
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Revision tags: v6.1.11 |
|
| #
092209f1 |
| 08-Feb-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
clk: qcom: Add GPU clock controller driver for SM6115
Add support for the GPU clock controller found on SM6115.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersso
clk: qcom: Add GPU clock controller driver for SM6115
Add support for the GPU clock controller found on SM6115.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-11-konrad.dybcio@linaro.org
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| #
8397e242 |
| 08-Feb-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
clk: qcom: Add GPU clock controller driver for SM6375
Add support for the GPU clock controller found on SM6375.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dyb
clk: qcom: Add GPU clock controller driver for SM6375
Add support for the GPU clock controller found on SM6375.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-9-konrad.dybcio@linaro.org
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| #
a6b18286 |
| 08-Feb-2023 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
clk: qcom: Add GPU clock controller driver for SM6125
Add support for the GPU clock controller found on SM6125.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dyb
clk: qcom: Add GPU clock controller driver for SM6125
Add support for the GPU clock controller found on SM6125.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230208091340.124641-7-konrad.dybcio@linaro.org
show more ...
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Revision tags: v6.1.10, v6.1.9, v6.1.8 |
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| #
ca574a5d |
| 20-Jan-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
clk: qcom: add msm8996 Core Bus Framework (CBF) support
Add CBF clock driver as a part of MSM8996 CPU clocks. Significantly
based on AngeloGioacchino del Regno's work at [1].
The CBF is an intercon
clk: qcom: add msm8996 Core Bus Framework (CBF) support
Add CBF clock driver as a part of MSM8996 CPU clocks. Significantly
based on AngeloGioacchino del Regno's work at [1].
The CBF is an interconnect between two CPU clusters, setting it up
properly is required for booting the MSM8996 with all four cores
enabled.
[1] https://github.com/sonyxperiadev/kernel/blob/aosp/LE.UM.2.3.2.r1.4/drivers/clk/qcom/clk-cpu-8996.c
Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Dropped partially uninitialized variable "ret" from cbf_clk_notifier_cb()]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230120061417.2623751-4-dmitry.baryshkov@linaro.org
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| #
02772636 |
| 26-Jan-2023 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
clk: qcom: add the driver for the MSM8996 APCS clocks
Add a simple driver handling the APCS clocks on MSM8996. For now it
supports just a single aux clock, linking GPLL0 to CPU and CBF clocks.
Note
clk: qcom: add the driver for the MSM8996 APCS clocks
Add a simple driver handling the APCS clocks on MSM8996. For now it
supports just a single aux clock, linking GPLL0 to CPU and CBF clocks.
Note, there is little sense in registering sys_apcs_aux as a child of
gpll0. The PLL is always-on. And listing the gpll0 as a property of the
apcs would delay its probing until the GCC has been probed (while we
would like for the apcs to be probed as early as possible).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Fixed spelling of register, per Stephen's feedback]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230126230319.3977109-8-dmitry.baryshkov@linaro.org
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Revision tags: v6.1.7, v6.1.6 |
|
| #
1c9efb0b |
| 12-Jan-2023 |
Taniya Das <quic_tdas@quicinc.com> |
clk: qcom: Add QDU1000 and QRU1000 GCC support
Add Global Clock Controller (GCC) support for QDU1000 and QRU1000 SoCs.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Melody Olvera
clk: qcom: Add QDU1000 and QRU1000 GCC support
Add Global Clock Controller (GCC) support for QDU1000 and QRU1000 SoCs.
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Made gcc_pcie_0_pipe_clk_src use clk_regmap_phy_mux_ops]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112204446.30236-3-quic_molvera@quicinc.com
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| #
08c51ceb |
| 17-Jan-2023 |
Shazad Hussain <quic_shazhuss@quicinc.com> |
clk: qcom: add the GCC driver for sa8775p
Add support for the Global Clock Controller found in the QTI SA8775P
platforms.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
[Bartosz: made th
clk: qcom: add the GCC driver for sa8775p
Add support for the Global Clock Controller found in the QTI SA8775P
platforms.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
[Bartosz: made the driver ready for upstream]
Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Moved to core_initcall(), per request of Konrad]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117180429.305266-3-brgl@bgdev.pl
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|
Revision tags: v6.1.5, v6.0.19 |
|
| #
90114ca1 |
| 09-Jan-2023 |
Neil Armstrong <neil.armstrong@linaro.org> |
clk: qcom: add SM8550 DISPCC driver
Add support for the display clock controller found in SM8550
based devices.
This clock controller feeds the Multimedia Display SubSystem (MDSS).
This driver is b
clk: qcom: add SM8550 DISPCC driver
Add support for the display clock controller found in SM8550
based devices.
This clock controller feeds the Multimedia Display SubSystem (MDSS).
This driver is based on the SM8450 support.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-3-8a03d348c572@linaro.org
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Revision tags: v6.0.18, v6.1.4, v6.1.3, v6.0.17 |
|
| #
e9a7b78b |
| 04-Jan-2023 |
Abel Vesa <abel.vesa@linaro.org> |
clk: qcom: Add TCSR clock driver for SM8550
The TCSR clock controller found on SM8550 provides refclks
for PCIE, USB and UFS. Add clock driver for it.
This patch is based on initial code downstream
clk: qcom: Add TCSR clock driver for SM8550
The TCSR clock controller found on SM8550 provides refclks
for PCIE, USB and UFS. Add clock driver for it.
This patch is based on initial code downstream.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-5-abel.vesa@linaro.org
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Revision tags: v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13 |
|
| #
80f5451d |
| 13-Dec-2022 |
Konrad Dybcio <konrad.dybcio@linaro.org> |
clk: qcom: Add camera clock controller driver for SM6350
Add support for the camera clock controller found on SM6350.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konr
clk: qcom: Add camera clock controller driver for SM6350
Add support for the camera clock controller found on SM6350.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213152617.296426-2-konrad.dybcio@linaro.org
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Revision tags: v6.1, v6.0.12, v6.0.11 |
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955f2ea3 |
| 30-Nov-2022 |
Abel Vesa <abel.vesa@linaro.org> |
clk: qcom: Add GCC driver for SM8550
Add Global Clock controller (GCC) driver for SM8550 SoC,
which includes the gcc resets and gdsc.
This patch is based on an initial downstream driver.
Signed-of
clk: qcom: Add GCC driver for SM8550
Add Global Clock controller (GCC) driver for SM8550 SoC,
which includes the gcc resets and gdsc.
This patch is based on an initial downstream driver.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-6-abel.vesa@linaro.org
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