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/openbmc/u-boot/arch/x86/include/asm/
H A Dpirq_routing.h31 u8 link; /* IRQ line ID, 0=not routed */
67 * pirq_check_irq_routed() - Check whether an IRQ is routed to 8259 PIC
69 * This function checks whether an IRQ is routed to 8259 PIC for a given link.
77 * @return: true if the irq is already routed to 8259 for a given link,
101 * This function assigns the IRQ to a PIRQ link so that the PIRQ is routed to
109 * @irq: IRQ to which the PIRQ is routed
117 * PIRQs and finally 8259 PIC. The routed irq number is written to interrupt
H A Dirq.h40 * IRQ N is available to be routed
/openbmc/u-boot/arch/x86/lib/
H A Dpirq_routing.c28 /* Have we already routed it? */ in pirq_get_next_free_irq()
39 /* If it's not yet routed, use it */ in pirq_get_next_free_irq()
45 /* But if it was already routed, try the next one */ in pirq_get_next_free_irq()
76 debug("not routed\n"); in pirq_route_irqs()
84 /* yet not routed */ in pirq_route_irqs()
/openbmc/u-boot/doc/device-tree-bindings/thermal/
H A Dti_soc_thermal.txt15 the talert signal is routed to;
22 line the tshut signal is routed to. The informed GPIO will
/openbmc/u-boot/arch/arm/dts/
H A Darmada-385-turris-omnia.dts194 /* routed to PCIe0/mSATA connector (CN7A) */
202 /* routed to PCIe1/USB2 connector (CN61A) */
210 /* routed to PCIe2 connector (CN62A) */
218 /* routed to SFP+ */
377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
H A Dlogicpd-torpedo-37xx-devkit.dts32 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and
H A Dkirkwood-blackarmor-nas220.dts95 * Serial port routed to connector CN5
/openbmc/u-boot/board/freescale/corenet_ds/
H A Deth_superhydra.c23 * exist, and also which Fman's MACs are routed to which PHYs. So for a given
24 * Fman MAC, there is one and only PHY it connects to. MACs cannot be routed
43 * 1) An alias for each PHY node that an Ethernet node could be routed to.
559 * FM1 DTSEC5 is routed via EC1 to the first on-board in board_eth_init()
560 * RGMII port. FM2 DTSEC5 is routed via EC2 to the in board_eth_init()
562 * be routed to RGMII. in board_eth_init()
706 * FM1 DTSEC5 is routed via EC1 to the first on-board in board_eth_init()
707 * RGMII port. FM2 DTSEC5 is routed via EC2 to the in board_eth_init()
709 * be routed to RGMII. in board_eth_init()
H A Deth_hydra.c23 * exist, and also which Fman MACs are routed to which PHYs. So for a given
24 * Fman MAC, there is one and only PHY it connects to. MACs cannot be routed
43 * 1) An alias for each PHY node that an Ethernet node could be routed to.
452 * If DTSEC4 is RGMII, then it's routed via via EC1 to in board_eth_init()
454 * then it's routed via via EC2 to the second on-board in board_eth_init()
455 * RGMII port. The other DTSECs cannot be routed to in board_eth_init()
/openbmc/u-boot/doc/device-tree-bindings/misc/
H A Dintel,irq-router.txt32 8259 PIC. Bit N is 1 means IRQ N is available to be routed.
37 is which PIRQ line the PCI interrupt pin is routed to.
H A Dintel-lpc.txt39 0x80 - The PIRQ is not routed.
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Chassis/Buttons/
H A DHostSelector.interface.yaml5 reset button events are routed to the currently selected host or bmc's power
/openbmc/docs/designs/
H A Dmultihost-ipmi-design.md18 IPMB buses and the IPMB messages are routed to ipmid.
55 request coming from the hosts are routed to ipmid by the ipmbbridged. The IPMB
56 requests are routed from ipmid or any service by D-Bus interface and The
57 outgoing IPMB requests are routed by ipmbbridged to IPMB interface.
/openbmc/u-boot/board/congatec/conga-qeval20-qa3-e3845/
H A DREADME19 which is routed from the QSeven SoM to the X300 connector on the
/openbmc/u-boot/doc/
H A DREADME.fsl-hwconfig10 routed to the Wolfson WM8776 codec. The ngPIXIS can be programmed to
/openbmc/google-ipmi-sys/
H A Dpcie_i2c.hpp46 // Sys can query which i2c bus is routed to which pcie slot.
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dgpio.txt138 Some or all of the GPIOs provided by a GPIO controller may be routed to pins
189 Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
190 pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's
H A Dintel,x86-broadwell-pinctrl.txt24 - route - sets whether the pin is routed, either PIRQ_APIC_MASK or
28 - pirq-apic - the pin will be routed to the IOxAPIC
/openbmc/u-boot/board/tqc/tqm834x/
H A Dpci.c42 * are routed only to the PCI1 we do not account for the second one - this code
/openbmc/bmcweb/
H A DREADME.md39 options. All authentication mechanisms supporting username/password are routed
/openbmc/qemu/include/hw/intc/
H A Dloongarch_extioi_common.h17 /* irq from EXTIOI is routed to no more than 4 cpus */
/openbmc/u-boot/board/bluegiga/apx4devkit/
H A Dspl_boot.c145 * All address lines are routed from CPU to memory chip. in mxs_adjust_memory_params()
/openbmc/qemu/docs/
H A Dpci_expander_bridge.txt50 The interrupts from devices behind the PXB are routed through this device the same as if it were a
/openbmc/u-boot/board/freescale/b4860qds/
H A Deth_b4860qds.c15 * where the SGMII and XAUI cards exist, and also which Fman MACs are routed
17 * connects to. MACs cannot be routed to PHYs dynamically. This configuration
/openbmc/qemu/target/arm/tcg/
H A Dtlb_helper.c36 * ISV is only set for stage-2 data aborts routed to EL2 and in merge_syn_data_abort()
227 /* If SCR_EL3.GPF is unset, GPF may still be routed to EL2. */ in arm_deliver_fault()

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