| /openbmc/u-boot/doc/device-tree-bindings/net/ |
| H A D | stmmac.txt | 4 - compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
5 For backwards compatibility: "st,spear600-gmac" is also supported.
6 - reg: Address and length of the register set for the device
7 - interrupt-parent: Should be the phandle for the interrupt controller
9 - interrupts: Should contain the STMMAC interrupts
10 - interrupt-names: Should contain the interrupt names "macirq"
13 - phy-mode: See ethernet.txt file in the same directory.
14 - snps,reset-gpio gpio number for phy reset.
15 - snps,reset-active-low boolean flag to indicate if phy reset is active low.
16 - snps,reset-delays-us is triplet of delays
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| /openbmc/linux/drivers/power/reset/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Board level reset or power off"
5 Provides a number of drivers which either reset a complete board
8 Say Y here to enable board reset and power off
13 bool "ams AS3722 power-off driver"
16 This driver supports turning off board via a ams AS3722 power-off.
27 tristate "Atmel AT91 reset driver"
35 tristate "Atmel AT91 SAMA5D2-Compatible shutdown controller driver"
43 tristate "Actions Semi ATC260x PMIC power-off driver"
46 This driver provides power-off and restart support for a system
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| /openbmc/linux/drivers/remoteproc/ |
| H A D | ti_k3_r5_remoteproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017-2022 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
9 #include <linux/dma-mapping.h>
19 #include <linux/omap-mailbox.h>
23 #include <linux/reset.h>
33 /* R5 TI-SCI Processor Configuration Flags */
47 /* R5 TI-SCI Processor Control Flags */
50 /* R5 TI-SCI Processor Status Flags */
59 * struct k3_r5_mem - internal memory structure
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| /openbmc/linux/drivers/phy/amlogic/ |
| H A D | phy-meson-gxl-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/reset.h>
18 /* bits [31:27] are read-only */
66 /* bits [31:14] are read-only */
94 enum phy_mode mode; member
97 struct reset_control *reset; member
112 ret = reset_control_reset(priv->reset); in phy_meson_gxl_usb2_init()
116 ret = clk_prepare_enable(priv->clk); in phy_meson_gxl_usb2_init()
118 reset_control_rearm(priv->reset); in phy_meson_gxl_usb2_init()
129 clk_disable_unprepare(priv->clk); in phy_meson_gxl_usb2_exit()
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| H A D | phy-meson-g12a-usb3-pcie.c | 1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/reset.h>
19 #include <dt-bindings/phy/phy.h>
59 struct reset_control *reset; member
61 unsigned int mode; member
79 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_addr()
80 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_addr()
82 regmap_write(priv->regmap, PHY_R4, reg | PHY_R4_PHY_CR_CAP_ADDR); in phy_g12a_usb3_pcie_cr_bus_addr()
84 ret = regmap_read_poll_timeout(priv->regmap, PHY_R5, val, in phy_g12a_usb3_pcie_cr_bus_addr()
90 regmap_write(priv->regmap, PHY_R4, reg); in phy_g12a_usb3_pcie_cr_bus_addr()
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| /openbmc/u-boot/drivers/usb/host/ |
| H A D | dwc3-sti-glue.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
17 #include <reset-uclass.h>
23 #include <dwc3-sti-glue.h>
28 * struct sti_dwc3_glue_platdata - dwc3 STi glue driver private structure
33 * @softreset_ctl: reset controller for softreset signal
34 * @mode: drd static host/device config
42 enum usb_dr_mode mode; member
49 val = readl(plat->syscfg_base + plat->syscfg_offset); in sti_dwc3_glue_drd_init()
53 switch (plat->mode) { in sti_dwc3_glue_drd_init()
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| /openbmc/linux/sound/soc/codecs/ |
| H A D | es7241.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
27 struct gpio_desc *reset; member
38 /* put the device in reset */ in es7241_set_mode()
39 gpiod_set_value_cansleep(priv->reset, 0); in es7241_set_mode()
41 /* set the mode */ in es7241_set_mode()
42 gpiod_set_value_cansleep(priv->m0, m0); in es7241_set_mode()
43 gpiod_set_value_cansleep(priv->m1, m1); in es7241_set_mode()
45 /* take the device out of reset - datasheet does not specify a delay */ in es7241_set_mode()
46 gpiod_set_value_cansleep(priv->reset, 1); in es7241_set_mode()
50 const struct es7241_clock_mode *mode, in es7241_set_consumer_mode() argument
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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| H A D | lan9303.txt | 2 -------------------------------------------------
6 - compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
9 - "smsc,lan9303-mdio" for mdio managed mode
13 - reset-gpios: GPIO to be used to reset the whole device
14 - reset-duration: reset duration in milliseconds, defaults to 200 ms
23 auto-detected and mapped accordingly.
27 I2C managed mode:
31 fixed-link { /* RMII fixed link to LAN9303 */
33 full-duplex;
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| /openbmc/linux/drivers/net/hamradio/ |
| H A D | z8530.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
28 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
29 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
30 #define ERR_RES 0x30 /* Error Reset */
31 #define RES_H_IUS 0x38 /* Reset highest IUS */
33 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
34 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
35 #define RES_EOM_L 0xC0 /* Reset EOM latch */
58 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */
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| /openbmc/linux/arch/x86/realmode/rm/ |
| H A D | reboot.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/processor-flags.h>
6 #include <asm/msr-index.h>
11 * mode and jumping to the BIOS reset entry point, as if the CPU has
12 * really been reset. The previous version asked the keyboard
13 * controller to pulse the CPU reset line, which is more thorough, but
30 /* Disable paging to drop us out of long mode */
46 /* Set up the IDT for real mode. */
51 * mode. The GDT is not used in real mode; it is just needed here to
57 * Load the data segment registers with 16-bit compatible values
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| /openbmc/linux/Documentation/devicetree/bindings/usb/ |
| H A D | smsc,usb3503.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SMSC USB3503 High-Speed Hub Controller
10 - Dongjin Kim <tobetter@gmail.com>
15 - smsc,usb3503
16 - smsc,usb3503a
17 - smsc,usb3803
22 connect-gpios:
27 intn-gpios:
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| H A D | usb4604.txt | 1 SMSC USB4604 High-Speed Hub Controller
4 - compatible: Should be "smsc,usb4604"
7 - reg: Specifies the i2c slave address, it is required and should be 0x2d
9 - reset-gpios: Should specify GPIO for reset.
10 - initial-mode: Should specify initial mode.
11 (1 for HUB mode, 2 for STANDBY mode)
14 usb-hub@2d {
17 reset-gpios = <&gpx3 5 1>;
18 initial-mode = <1>;
|
| /openbmc/linux/drivers/tty/serial/ |
| H A D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
58 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
60 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
61 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
62 #define ERR_RES 0x30 /* Error Reset */
63 #define RES_H_IUS 0x38 /* Reset highest IUS */
65 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
66 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
67 #define RES_EOM_L 0xC0 /* Reset EOM latch */
[all …]
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| H A D | sunzilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
50 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
52 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
53 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
54 #define ERR_RES 0x30 /* Error Reset */
55 #define RES_H_IUS 0x38 /* Reset highest IUS */
57 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
58 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
59 #define RES_EOM_L 0xC0 /* Reset EOM latch */
[all …]
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| H A D | zs.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
79 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */
81 #define RES_RxINT_FC 0x20 /* Reset RxINT on First Character */
82 #define RES_Tx_P 0x28 /* Reset TxINT Pending */
83 #define ERR_RES 0x30 /* Error Reset */
84 #define RES_H_IUS 0x38 /* Reset highest IUS */
86 #define RES_Rx_CRC 0x40 /* Reset Rx CRC Checker */
87 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
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| /openbmc/linux/drivers/net/wireless/ath/ath5k/ |
| H A D | reset.c | 2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Luis Rodriguez <mcgrof@winlab.rutgers.edu>
5 * Copyright (c) 2007-2008 Pavel Roskin <proski@gnu.org>
6 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
23 Reset function and helpers
30 #include <linux/pci.h> /* To determine if a card is pci-e */
39 * DOC: Reset function and helpers
41 * Here we implement the main reset routine, used to bring the card
52 * ath5k_hw_register_timeout() - Poll a register for a flag/field change
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| /openbmc/linux/drivers/usb/misc/ |
| H A D | usb3503.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2012-2013 Dongjin Kim (tobetter@gmail.com)
44 enum usb3503_mode mode; member
51 struct gpio_desc *reset; member
58 struct device *dev = hub->dev; in usb3503_connect()
61 if (hub->regmap) { in usb3503_connect()
63 err = regmap_write(hub->regmap, USB3503_SP_ILOCK, in usb3503_connect()
71 /* PDS : Set the ports which are disabled in self-powered mode. */ in usb3503_connect()
72 if (hub->port_off_mask) { in usb3503_connect()
73 err = regmap_update_bits(hub->regmap, USB3503_PDS, in usb3503_connect()
[all …]
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| /openbmc/linux/drivers/gpu/drm/panel/ |
| H A D | panel-samsung-db7430.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Found in the Samsung Galaxy Beam GT-I8350 mobile phone.
16 #include <linux/media-bus-format.h>
49 * struct db7430 - state container for a panel controlled by the DB7430
59 /** @reset: reset GPIO line */
60 struct gpio_desc *reset; member
91 struct mipi_dbi *dbi = &db->dbi; in db7430_power_on()
95 ret = regulator_bulk_enable(ARRAY_SIZE(db->regulators), in db7430_power_on()
96 db->regulators); in db7430_power_on()
98 dev_err(db->dev, "failed to enable regulators: %d\n", ret); in db7430_power_on()
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| H A D | panel-samsung-s6d27a1.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Found in the Samsung Galaxy Ace 2 GT-I8160 mobile phone.
15 #include <linux/media-bus-format.h>
46 struct gpio_desc *reset; member
76 struct mipi_dbi *dbi = &ctx->dbi; in s6d27a1_read_mtp_id()
82 dev_err(ctx->dev, "unable to read MTP ID 1\n"); in s6d27a1_read_mtp_id()
87 dev_err(ctx->dev, "unable to read MTP ID 2\n"); in s6d27a1_read_mtp_id()
92 dev_err(ctx->dev, "unable to read MTP ID 3\n"); in s6d27a1_read_mtp_id()
95 dev_info(ctx->dev, "MTP ID: %02x %02x %02x\n", id1, id2, id3); in s6d27a1_read_mtp_id()
100 struct mipi_dbi *dbi = &ctx->dbi; in s6d27a1_power_on()
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| H A D | panel-widechips-ws2401.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Found in the Samsung Galaxy Ace 2 GT-I8160 mobile phone.
7 * Inspired by code and know-how in the vendor driver by Gareth Phillips.
18 #include <linux/media-bus-format.h>
29 #define WS2401_BCMODE 0xc1 /* Backlight control mode */
33 #define WS2401_WRMIE 0xc7 /* Write MIE mode */
58 * struct ws2401 - state container for a panel controlled by the WS2401
72 /** @reset: reset GPIO line */
73 struct gpio_desc *reset; member
106 struct mipi_dbi *dbi = &ws->dbi; in ws2401_read_mtp_id()
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | qca,ar71xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: ethernet-controller.yaml#
13 - Oleksij Rempel <o.rempel@pengutronix.de>
18 - items:
19 - enum:
20 - qca,ar7100-eth # Atheros AR7100
21 - qca,ar7240-eth # Atheros AR7240
22 - qca,ar7241-eth # Atheros AR7241
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| H A D | socionext,uniphier-ave4.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/socionext,uniphier-ave4.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - socionext,uniphier-pro4-ave4
20 - socionext,uniphier-pxs2-ave4
21 - socionext,uniphier-ld11-ave4
22 - socionext,uniphier-ld20-ave4
23 - socionext,uniphier-pxs3-ave4
[all …]
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| H A D | ethernet-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
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| /openbmc/u-boot/arch/arm/mach-at91/ |
| H A D | mpddrc.c | 1 // SPDX-License-Identifier: GPL-2.0+
17 int mode, in atmel_mpddr_op() argument
20 writel(mode, &mpddr->mr); in atmel_mpddr_op()
27 u16 version = readl(&mpddr->version) & 0xffff; in ddr2_decodtype_is_seq()
46 ba_off = (mpddr_value->cr & ATMEL_MPDDRC_CR_NC_MASK) + 9; in ddr2_init()
47 if (ddr2_decodtype_is_seq(base, mpddr_value->cr)) in ddr2_init()
48 ba_off += ((mpddr_value->cr & ATMEL_MPDDRC_CR_NR_MASK) >> 2) + 11; in ddr2_init()
50 ba_off += (mpddr_value->md & ATMEL_MPDDRC_MD_DBW_MASK) ? 1 : 2; in ddr2_init()
53 writel(mpddr_value->md, &mpddr->md); in ddr2_init()
56 writel(mpddr_value->cr, &mpddr->cr); in ddr2_init()
[all …]
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