16dedbd1dSSuman Anna // SPDX-License-Identifier: GPL-2.0-only
26dedbd1dSSuman Anna /*
36dedbd1dSSuman Anna * TI K3 R5F (MCU) Remote Processor driver
46dedbd1dSSuman Anna *
5e3865c85SSuman Anna * Copyright (C) 2017-2022 Texas Instruments Incorporated - https://www.ti.com/
66dedbd1dSSuman Anna * Suman Anna <s-anna@ti.com>
76dedbd1dSSuman Anna */
86dedbd1dSSuman Anna
96dedbd1dSSuman Anna #include <linux/dma-mapping.h>
106dedbd1dSSuman Anna #include <linux/err.h>
116dedbd1dSSuman Anna #include <linux/interrupt.h>
126dedbd1dSSuman Anna #include <linux/kernel.h>
136dedbd1dSSuman Anna #include <linux/mailbox_client.h>
146dedbd1dSSuman Anna #include <linux/module.h>
15*3440d8daSRob Herring #include <linux/of.h>
166dedbd1dSSuman Anna #include <linux/of_address.h>
176dedbd1dSSuman Anna #include <linux/of_reserved_mem.h>
18*3440d8daSRob Herring #include <linux/of_platform.h>
196dedbd1dSSuman Anna #include <linux/omap-mailbox.h>
206dedbd1dSSuman Anna #include <linux/platform_device.h>
216dedbd1dSSuman Anna #include <linux/pm_runtime.h>
226dedbd1dSSuman Anna #include <linux/remoteproc.h>
236dedbd1dSSuman Anna #include <linux/reset.h>
246dedbd1dSSuman Anna #include <linux/slab.h>
256dedbd1dSSuman Anna
266dedbd1dSSuman Anna #include "omap_remoteproc.h"
276dedbd1dSSuman Anna #include "remoteproc_internal.h"
286dedbd1dSSuman Anna #include "ti_sci_proc.h"
296dedbd1dSSuman Anna
306dedbd1dSSuman Anna /* This address can either be for ATCM or BTCM with the other at address 0x0 */
316dedbd1dSSuman Anna #define K3_R5_TCM_DEV_ADDR 0x41010000
326dedbd1dSSuman Anna
336dedbd1dSSuman Anna /* R5 TI-SCI Processor Configuration Flags */
346dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001
356dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002
366dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100
376dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200
386dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400
396dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800
406dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000
416dedbd1dSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000
427508ea19SSuman Anna /* Available from J7200 SoCs onwards */
437508ea19SSuman Anna #define PROC_BOOT_CFG_FLAG_R5_MEM_INIT_DIS 0x00004000
44ee99ee7cSSuman Anna /* Applicable to only AM64x SoCs */
45ee99ee7cSSuman Anna #define PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE 0x00008000
466dedbd1dSSuman Anna
476dedbd1dSSuman Anna /* R5 TI-SCI Processor Control Flags */
486dedbd1dSSuman Anna #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001
496dedbd1dSSuman Anna
506dedbd1dSSuman Anna /* R5 TI-SCI Processor Status Flags */
516dedbd1dSSuman Anna #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001
526dedbd1dSSuman Anna #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002
536dedbd1dSSuman Anna #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004
546dedbd1dSSuman Anna #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100
55ee99ee7cSSuman Anna /* Applicable to only AM64x SoCs */
56ee99ee7cSSuman Anna #define PROC_BOOT_STATUS_FLAG_R5_SINGLECORE_ONLY 0x00000200
576dedbd1dSSuman Anna
586dedbd1dSSuman Anna /**
596dedbd1dSSuman Anna * struct k3_r5_mem - internal memory structure
606dedbd1dSSuman Anna * @cpu_addr: MPU virtual address of the memory region
616dedbd1dSSuman Anna * @bus_addr: Bus address used to access the memory region
626dedbd1dSSuman Anna * @dev_addr: Device address from remoteproc view
636dedbd1dSSuman Anna * @size: Size of the memory region
646dedbd1dSSuman Anna */
656dedbd1dSSuman Anna struct k3_r5_mem {
666dedbd1dSSuman Anna void __iomem *cpu_addr;
676dedbd1dSSuman Anna phys_addr_t bus_addr;
686dedbd1dSSuman Anna u32 dev_addr;
696dedbd1dSSuman Anna size_t size;
706dedbd1dSSuman Anna };
716dedbd1dSSuman Anna
72ee99ee7cSSuman Anna /*
73ee99ee7cSSuman Anna * All cluster mode values are not applicable on all SoCs. The following
74ee99ee7cSSuman Anna * are the modes supported on various SoCs:
75ee99ee7cSSuman Anna * Split mode : AM65x, J721E, J7200 and AM64x SoCs
76ee99ee7cSSuman Anna * LockStep mode : AM65x, J721E and J7200 SoCs
77ee99ee7cSSuman Anna * Single-CPU mode : AM64x SoCs only
7851723657SDevarsh Thakkar * Single-Core mode : AM62x, AM62A SoCs
79ee99ee7cSSuman Anna */
806dedbd1dSSuman Anna enum cluster_mode {
816dedbd1dSSuman Anna CLUSTER_MODE_SPLIT = 0,
826dedbd1dSSuman Anna CLUSTER_MODE_LOCKSTEP,
83ee99ee7cSSuman Anna CLUSTER_MODE_SINGLECPU,
8451723657SDevarsh Thakkar CLUSTER_MODE_SINGLECORE
856dedbd1dSSuman Anna };
866dedbd1dSSuman Anna
876dedbd1dSSuman Anna /**
887508ea19SSuman Anna * struct k3_r5_soc_data - match data to handle SoC variations
89c3c21b35SSuman Anna * @tcm_is_double: flag to denote the larger unified TCMs in certain modes
907508ea19SSuman Anna * @tcm_ecc_autoinit: flag to denote the auto-initialization of TCMs for ECC
91ee99ee7cSSuman Anna * @single_cpu_mode: flag to denote if SoC/IP supports Single-CPU mode
9251723657SDevarsh Thakkar * @is_single_core: flag to denote if SoC/IP has only single core R5
937508ea19SSuman Anna */
947508ea19SSuman Anna struct k3_r5_soc_data {
95c3c21b35SSuman Anna bool tcm_is_double;
967508ea19SSuman Anna bool tcm_ecc_autoinit;
97ee99ee7cSSuman Anna bool single_cpu_mode;
9851723657SDevarsh Thakkar bool is_single_core;
997508ea19SSuman Anna };
1007508ea19SSuman Anna
1017508ea19SSuman Anna /**
1026dedbd1dSSuman Anna * struct k3_r5_cluster - K3 R5F Cluster structure
1036dedbd1dSSuman Anna * @dev: cached device pointer
1046dedbd1dSSuman Anna * @mode: Mode to configure the Cluster - Split or LockStep
1056dedbd1dSSuman Anna * @cores: list of R5 cores within the cluster
1067508ea19SSuman Anna * @soc_data: SoC-specific feature data for a R5FSS
1076dedbd1dSSuman Anna */
1086dedbd1dSSuman Anna struct k3_r5_cluster {
1096dedbd1dSSuman Anna struct device *dev;
1106dedbd1dSSuman Anna enum cluster_mode mode;
1116dedbd1dSSuman Anna struct list_head cores;
1127508ea19SSuman Anna const struct k3_r5_soc_data *soc_data;
1136dedbd1dSSuman Anna };
1146dedbd1dSSuman Anna
1156dedbd1dSSuman Anna /**
1166dedbd1dSSuman Anna * struct k3_r5_core - K3 R5 core structure
1176dedbd1dSSuman Anna * @elem: linked list item
1186dedbd1dSSuman Anna * @dev: cached device pointer
1196dedbd1dSSuman Anna * @rproc: rproc handle representing this core
1206dedbd1dSSuman Anna * @mem: internal memory regions data
121ea47c688SSuman Anna * @sram: on-chip SRAM memory regions data
1226dedbd1dSSuman Anna * @num_mems: number of internal memory regions
123ea47c688SSuman Anna * @num_sram: number of on-chip SRAM memory regions
1246dedbd1dSSuman Anna * @reset: reset control handle
1256dedbd1dSSuman Anna * @tsp: TI-SCI processor control handle
1266dedbd1dSSuman Anna * @ti_sci: TI-SCI handle
1276dedbd1dSSuman Anna * @ti_sci_id: TI-SCI device identifier
1286dedbd1dSSuman Anna * @atcm_enable: flag to control ATCM enablement
1296dedbd1dSSuman Anna * @btcm_enable: flag to control BTCM enablement
1306dedbd1dSSuman Anna * @loczrama: flag to dictate which TCM is at device address 0x0
1316dedbd1dSSuman Anna */
1326dedbd1dSSuman Anna struct k3_r5_core {
1336dedbd1dSSuman Anna struct list_head elem;
1346dedbd1dSSuman Anna struct device *dev;
1356dedbd1dSSuman Anna struct rproc *rproc;
1366dedbd1dSSuman Anna struct k3_r5_mem *mem;
137ea47c688SSuman Anna struct k3_r5_mem *sram;
1386dedbd1dSSuman Anna int num_mems;
139ea47c688SSuman Anna int num_sram;
1406dedbd1dSSuman Anna struct reset_control *reset;
1416dedbd1dSSuman Anna struct ti_sci_proc *tsp;
1426dedbd1dSSuman Anna const struct ti_sci_handle *ti_sci;
1436dedbd1dSSuman Anna u32 ti_sci_id;
1446dedbd1dSSuman Anna u32 atcm_enable;
1456dedbd1dSSuman Anna u32 btcm_enable;
1466dedbd1dSSuman Anna u32 loczrama;
1476dedbd1dSSuman Anna };
1486dedbd1dSSuman Anna
1496dedbd1dSSuman Anna /**
1506dedbd1dSSuman Anna * struct k3_r5_rproc - K3 remote processor state
1516dedbd1dSSuman Anna * @dev: cached device pointer
1526dedbd1dSSuman Anna * @cluster: cached pointer to parent cluster structure
1536dedbd1dSSuman Anna * @mbox: mailbox channel handle
1546dedbd1dSSuman Anna * @client: mailbox client to request the mailbox channel
1556dedbd1dSSuman Anna * @rproc: rproc handle
1566dedbd1dSSuman Anna * @core: cached pointer to r5 core structure being used
1576dedbd1dSSuman Anna * @rmem: reserved memory regions data
1586dedbd1dSSuman Anna * @num_rmems: number of reserved memory regions
1596dedbd1dSSuman Anna */
1606dedbd1dSSuman Anna struct k3_r5_rproc {
1616dedbd1dSSuman Anna struct device *dev;
1626dedbd1dSSuman Anna struct k3_r5_cluster *cluster;
1636dedbd1dSSuman Anna struct mbox_chan *mbox;
1646dedbd1dSSuman Anna struct mbox_client client;
1656dedbd1dSSuman Anna struct rproc *rproc;
1666dedbd1dSSuman Anna struct k3_r5_core *core;
1676dedbd1dSSuman Anna struct k3_r5_mem *rmem;
1686dedbd1dSSuman Anna int num_rmems;
1696dedbd1dSSuman Anna };
1706dedbd1dSSuman Anna
1716dedbd1dSSuman Anna /**
1726dedbd1dSSuman Anna * k3_r5_rproc_mbox_callback() - inbound mailbox message handler
1736dedbd1dSSuman Anna * @client: mailbox client pointer used for requesting the mailbox channel
1746dedbd1dSSuman Anna * @data: mailbox payload
1756dedbd1dSSuman Anna *
1766dedbd1dSSuman Anna * This handler is invoked by the OMAP mailbox driver whenever a mailbox
1776dedbd1dSSuman Anna * message is received. Usually, the mailbox payload simply contains
1786dedbd1dSSuman Anna * the index of the virtqueue that is kicked by the remote processor,
1796dedbd1dSSuman Anna * and we let remoteproc core handle it.
1806dedbd1dSSuman Anna *
1816dedbd1dSSuman Anna * In addition to virtqueue indices, we also have some out-of-band values
1826dedbd1dSSuman Anna * that indicate different events. Those values are deliberately very
1836dedbd1dSSuman Anna * large so they don't coincide with virtqueue indices.
1846dedbd1dSSuman Anna */
k3_r5_rproc_mbox_callback(struct mbox_client * client,void * data)1856dedbd1dSSuman Anna static void k3_r5_rproc_mbox_callback(struct mbox_client *client, void *data)
1866dedbd1dSSuman Anna {
1876dedbd1dSSuman Anna struct k3_r5_rproc *kproc = container_of(client, struct k3_r5_rproc,
1886dedbd1dSSuman Anna client);
1896dedbd1dSSuman Anna struct device *dev = kproc->rproc->dev.parent;
1906dedbd1dSSuman Anna const char *name = kproc->rproc->name;
1916dedbd1dSSuman Anna u32 msg = omap_mbox_message(data);
1926dedbd1dSSuman Anna
1936dedbd1dSSuman Anna dev_dbg(dev, "mbox msg: 0x%x\n", msg);
1946dedbd1dSSuman Anna
1956dedbd1dSSuman Anna switch (msg) {
1966dedbd1dSSuman Anna case RP_MBOX_CRASH:
1976dedbd1dSSuman Anna /*
1986dedbd1dSSuman Anna * remoteproc detected an exception, but error recovery is not
1996dedbd1dSSuman Anna * supported. So, just log this for now
2006dedbd1dSSuman Anna */
2016dedbd1dSSuman Anna dev_err(dev, "K3 R5F rproc %s crashed\n", name);
2026dedbd1dSSuman Anna break;
2036dedbd1dSSuman Anna case RP_MBOX_ECHO_REPLY:
2046dedbd1dSSuman Anna dev_info(dev, "received echo reply from %s\n", name);
2056dedbd1dSSuman Anna break;
2066dedbd1dSSuman Anna default:
2076dedbd1dSSuman Anna /* silently handle all other valid messages */
2086dedbd1dSSuman Anna if (msg >= RP_MBOX_READY && msg < RP_MBOX_END_MSG)
2096dedbd1dSSuman Anna return;
2106dedbd1dSSuman Anna if (msg > kproc->rproc->max_notifyid) {
2116dedbd1dSSuman Anna dev_dbg(dev, "dropping unknown message 0x%x", msg);
2126dedbd1dSSuman Anna return;
2136dedbd1dSSuman Anna }
2146dedbd1dSSuman Anna /* msg contains the index of the triggered vring */
2156dedbd1dSSuman Anna if (rproc_vq_interrupt(kproc->rproc, msg) == IRQ_NONE)
2166dedbd1dSSuman Anna dev_dbg(dev, "no message was found in vqid %d\n", msg);
2176dedbd1dSSuman Anna }
2186dedbd1dSSuman Anna }
2196dedbd1dSSuman Anna
2206dedbd1dSSuman Anna /* kick a virtqueue */
k3_r5_rproc_kick(struct rproc * rproc,int vqid)2216dedbd1dSSuman Anna static void k3_r5_rproc_kick(struct rproc *rproc, int vqid)
2226dedbd1dSSuman Anna {
2236dedbd1dSSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
2246dedbd1dSSuman Anna struct device *dev = rproc->dev.parent;
2256dedbd1dSSuman Anna mbox_msg_t msg = (mbox_msg_t)vqid;
2266dedbd1dSSuman Anna int ret;
2276dedbd1dSSuman Anna
2286dedbd1dSSuman Anna /* send the index of the triggered virtqueue in the mailbox payload */
2296dedbd1dSSuman Anna ret = mbox_send_message(kproc->mbox, (void *)msg);
2306dedbd1dSSuman Anna if (ret < 0)
2316dedbd1dSSuman Anna dev_err(dev, "failed to send mailbox message, status = %d\n",
2326dedbd1dSSuman Anna ret);
2336dedbd1dSSuman Anna }
2346dedbd1dSSuman Anna
k3_r5_split_reset(struct k3_r5_core * core)2356dedbd1dSSuman Anna static int k3_r5_split_reset(struct k3_r5_core *core)
2366dedbd1dSSuman Anna {
2376dedbd1dSSuman Anna int ret;
2386dedbd1dSSuman Anna
2396dedbd1dSSuman Anna ret = reset_control_assert(core->reset);
2406dedbd1dSSuman Anna if (ret) {
2416dedbd1dSSuman Anna dev_err(core->dev, "local-reset assert failed, ret = %d\n",
2426dedbd1dSSuman Anna ret);
2436dedbd1dSSuman Anna return ret;
2446dedbd1dSSuman Anna }
2456dedbd1dSSuman Anna
2466dedbd1dSSuman Anna ret = core->ti_sci->ops.dev_ops.put_device(core->ti_sci,
2476dedbd1dSSuman Anna core->ti_sci_id);
2486dedbd1dSSuman Anna if (ret) {
2496dedbd1dSSuman Anna dev_err(core->dev, "module-reset assert failed, ret = %d\n",
2506dedbd1dSSuman Anna ret);
2516dedbd1dSSuman Anna if (reset_control_deassert(core->reset))
2526dedbd1dSSuman Anna dev_warn(core->dev, "local-reset deassert back failed\n");
2536dedbd1dSSuman Anna }
2546dedbd1dSSuman Anna
2556dedbd1dSSuman Anna return ret;
2566dedbd1dSSuman Anna }
2576dedbd1dSSuman Anna
k3_r5_split_release(struct k3_r5_core * core)2586dedbd1dSSuman Anna static int k3_r5_split_release(struct k3_r5_core *core)
2596dedbd1dSSuman Anna {
2606dedbd1dSSuman Anna int ret;
2616dedbd1dSSuman Anna
2626dedbd1dSSuman Anna ret = core->ti_sci->ops.dev_ops.get_device(core->ti_sci,
2636dedbd1dSSuman Anna core->ti_sci_id);
2646dedbd1dSSuman Anna if (ret) {
2656dedbd1dSSuman Anna dev_err(core->dev, "module-reset deassert failed, ret = %d\n",
2666dedbd1dSSuman Anna ret);
2676dedbd1dSSuman Anna return ret;
2686dedbd1dSSuman Anna }
2696dedbd1dSSuman Anna
2706dedbd1dSSuman Anna ret = reset_control_deassert(core->reset);
2716dedbd1dSSuman Anna if (ret) {
2726dedbd1dSSuman Anna dev_err(core->dev, "local-reset deassert failed, ret = %d\n",
2736dedbd1dSSuman Anna ret);
2746dedbd1dSSuman Anna if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci,
2756dedbd1dSSuman Anna core->ti_sci_id))
2766dedbd1dSSuman Anna dev_warn(core->dev, "module-reset assert back failed\n");
2776dedbd1dSSuman Anna }
2786dedbd1dSSuman Anna
2796dedbd1dSSuman Anna return ret;
2806dedbd1dSSuman Anna }
2816dedbd1dSSuman Anna
k3_r5_lockstep_reset(struct k3_r5_cluster * cluster)2826dedbd1dSSuman Anna static int k3_r5_lockstep_reset(struct k3_r5_cluster *cluster)
2836dedbd1dSSuman Anna {
2846dedbd1dSSuman Anna struct k3_r5_core *core;
2856dedbd1dSSuman Anna int ret;
2866dedbd1dSSuman Anna
2876dedbd1dSSuman Anna /* assert local reset on all applicable cores */
2886dedbd1dSSuman Anna list_for_each_entry(core, &cluster->cores, elem) {
2896dedbd1dSSuman Anna ret = reset_control_assert(core->reset);
2906dedbd1dSSuman Anna if (ret) {
2916dedbd1dSSuman Anna dev_err(core->dev, "local-reset assert failed, ret = %d\n",
2926dedbd1dSSuman Anna ret);
2936dedbd1dSSuman Anna core = list_prev_entry(core, elem);
2946dedbd1dSSuman Anna goto unroll_local_reset;
2956dedbd1dSSuman Anna }
2966dedbd1dSSuman Anna }
2976dedbd1dSSuman Anna
2986dedbd1dSSuman Anna /* disable PSC modules on all applicable cores */
2996dedbd1dSSuman Anna list_for_each_entry(core, &cluster->cores, elem) {
3006dedbd1dSSuman Anna ret = core->ti_sci->ops.dev_ops.put_device(core->ti_sci,
3016dedbd1dSSuman Anna core->ti_sci_id);
3026dedbd1dSSuman Anna if (ret) {
3036dedbd1dSSuman Anna dev_err(core->dev, "module-reset assert failed, ret = %d\n",
3046dedbd1dSSuman Anna ret);
3056dedbd1dSSuman Anna goto unroll_module_reset;
3066dedbd1dSSuman Anna }
3076dedbd1dSSuman Anna }
3086dedbd1dSSuman Anna
3096dedbd1dSSuman Anna return 0;
3106dedbd1dSSuman Anna
3116dedbd1dSSuman Anna unroll_module_reset:
3126dedbd1dSSuman Anna list_for_each_entry_continue_reverse(core, &cluster->cores, elem) {
3136dedbd1dSSuman Anna if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci,
3146dedbd1dSSuman Anna core->ti_sci_id))
3156dedbd1dSSuman Anna dev_warn(core->dev, "module-reset assert back failed\n");
3166dedbd1dSSuman Anna }
3176dedbd1dSSuman Anna core = list_last_entry(&cluster->cores, struct k3_r5_core, elem);
3186dedbd1dSSuman Anna unroll_local_reset:
3196dedbd1dSSuman Anna list_for_each_entry_from_reverse(core, &cluster->cores, elem) {
3206dedbd1dSSuman Anna if (reset_control_deassert(core->reset))
3216dedbd1dSSuman Anna dev_warn(core->dev, "local-reset deassert back failed\n");
3226dedbd1dSSuman Anna }
3236dedbd1dSSuman Anna
3246dedbd1dSSuman Anna return ret;
3256dedbd1dSSuman Anna }
3266dedbd1dSSuman Anna
k3_r5_lockstep_release(struct k3_r5_cluster * cluster)3276dedbd1dSSuman Anna static int k3_r5_lockstep_release(struct k3_r5_cluster *cluster)
3286dedbd1dSSuman Anna {
3296dedbd1dSSuman Anna struct k3_r5_core *core;
3306dedbd1dSSuman Anna int ret;
3316dedbd1dSSuman Anna
3326dedbd1dSSuman Anna /* enable PSC modules on all applicable cores */
3336dedbd1dSSuman Anna list_for_each_entry_reverse(core, &cluster->cores, elem) {
3346dedbd1dSSuman Anna ret = core->ti_sci->ops.dev_ops.get_device(core->ti_sci,
3356dedbd1dSSuman Anna core->ti_sci_id);
3366dedbd1dSSuman Anna if (ret) {
3376dedbd1dSSuman Anna dev_err(core->dev, "module-reset deassert failed, ret = %d\n",
3386dedbd1dSSuman Anna ret);
3396dedbd1dSSuman Anna core = list_next_entry(core, elem);
3406dedbd1dSSuman Anna goto unroll_module_reset;
3416dedbd1dSSuman Anna }
3426dedbd1dSSuman Anna }
3436dedbd1dSSuman Anna
3446dedbd1dSSuman Anna /* deassert local reset on all applicable cores */
3456dedbd1dSSuman Anna list_for_each_entry_reverse(core, &cluster->cores, elem) {
3466dedbd1dSSuman Anna ret = reset_control_deassert(core->reset);
3476dedbd1dSSuman Anna if (ret) {
3486dedbd1dSSuman Anna dev_err(core->dev, "module-reset deassert failed, ret = %d\n",
3496dedbd1dSSuman Anna ret);
3506dedbd1dSSuman Anna goto unroll_local_reset;
3516dedbd1dSSuman Anna }
3526dedbd1dSSuman Anna }
3536dedbd1dSSuman Anna
3546dedbd1dSSuman Anna return 0;
3556dedbd1dSSuman Anna
3566dedbd1dSSuman Anna unroll_local_reset:
3576dedbd1dSSuman Anna list_for_each_entry_continue(core, &cluster->cores, elem) {
3586dedbd1dSSuman Anna if (reset_control_assert(core->reset))
3596dedbd1dSSuman Anna dev_warn(core->dev, "local-reset assert back failed\n");
3606dedbd1dSSuman Anna }
3616dedbd1dSSuman Anna core = list_first_entry(&cluster->cores, struct k3_r5_core, elem);
3626dedbd1dSSuman Anna unroll_module_reset:
3636dedbd1dSSuman Anna list_for_each_entry_from(core, &cluster->cores, elem) {
3646dedbd1dSSuman Anna if (core->ti_sci->ops.dev_ops.put_device(core->ti_sci,
3656dedbd1dSSuman Anna core->ti_sci_id))
3666dedbd1dSSuman Anna dev_warn(core->dev, "module-reset assert back failed\n");
3676dedbd1dSSuman Anna }
3686dedbd1dSSuman Anna
3696dedbd1dSSuman Anna return ret;
3706dedbd1dSSuman Anna }
3716dedbd1dSSuman Anna
k3_r5_core_halt(struct k3_r5_core * core)3726dedbd1dSSuman Anna static inline int k3_r5_core_halt(struct k3_r5_core *core)
3736dedbd1dSSuman Anna {
3746dedbd1dSSuman Anna return ti_sci_proc_set_control(core->tsp,
3756dedbd1dSSuman Anna PROC_BOOT_CTRL_FLAG_R5_CORE_HALT, 0);
3766dedbd1dSSuman Anna }
3776dedbd1dSSuman Anna
k3_r5_core_run(struct k3_r5_core * core)3786dedbd1dSSuman Anna static inline int k3_r5_core_run(struct k3_r5_core *core)
3796dedbd1dSSuman Anna {
3806dedbd1dSSuman Anna return ti_sci_proc_set_control(core->tsp,
3816dedbd1dSSuman Anna 0, PROC_BOOT_CTRL_FLAG_R5_CORE_HALT);
3826dedbd1dSSuman Anna }
3836dedbd1dSSuman Anna
k3_r5_rproc_request_mbox(struct rproc * rproc)384e3865c85SSuman Anna static int k3_r5_rproc_request_mbox(struct rproc *rproc)
385e3865c85SSuman Anna {
386e3865c85SSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
387e3865c85SSuman Anna struct mbox_client *client = &kproc->client;
388e3865c85SSuman Anna struct device *dev = kproc->dev;
389e3865c85SSuman Anna int ret;
390e3865c85SSuman Anna
391e3865c85SSuman Anna client->dev = dev;
392e3865c85SSuman Anna client->tx_done = NULL;
393e3865c85SSuman Anna client->rx_callback = k3_r5_rproc_mbox_callback;
394e3865c85SSuman Anna client->tx_block = false;
395e3865c85SSuman Anna client->knows_txdone = false;
396e3865c85SSuman Anna
397e3865c85SSuman Anna kproc->mbox = mbox_request_channel(client, 0);
398e3865c85SSuman Anna if (IS_ERR(kproc->mbox)) {
399e3865c85SSuman Anna ret = -EBUSY;
400e3865c85SSuman Anna dev_err(dev, "mbox_request_channel failed: %ld\n",
401e3865c85SSuman Anna PTR_ERR(kproc->mbox));
402e3865c85SSuman Anna return ret;
403e3865c85SSuman Anna }
404e3865c85SSuman Anna
405e3865c85SSuman Anna /*
406e3865c85SSuman Anna * Ping the remote processor, this is only for sanity-sake for now;
407e3865c85SSuman Anna * there is no functional effect whatsoever.
408e3865c85SSuman Anna *
409e3865c85SSuman Anna * Note that the reply will _not_ arrive immediately: this message
410e3865c85SSuman Anna * will wait in the mailbox fifo until the remote processor is booted.
411e3865c85SSuman Anna */
412e3865c85SSuman Anna ret = mbox_send_message(kproc->mbox, (void *)RP_MBOX_ECHO_REQUEST);
413e3865c85SSuman Anna if (ret < 0) {
414e3865c85SSuman Anna dev_err(dev, "mbox_send_message failed: %d\n", ret);
415e3865c85SSuman Anna mbox_free_channel(kproc->mbox);
416e3865c85SSuman Anna return ret;
417e3865c85SSuman Anna }
418e3865c85SSuman Anna
419e3865c85SSuman Anna return 0;
420e3865c85SSuman Anna }
421e3865c85SSuman Anna
4226dedbd1dSSuman Anna /*
4236dedbd1dSSuman Anna * The R5F cores have controls for both a reset and a halt/run. The code
4246dedbd1dSSuman Anna * execution from DDR requires the initial boot-strapping code to be run
4256dedbd1dSSuman Anna * from the internal TCMs. This function is used to release the resets on
4266dedbd1dSSuman Anna * applicable cores to allow loading into the TCMs. The .prepare() ops is
4276dedbd1dSSuman Anna * invoked by remoteproc core before any firmware loading, and is followed
4286dedbd1dSSuman Anna * by the .start() ops after loading to actually let the R5 cores run.
429ee99ee7cSSuman Anna *
430ee99ee7cSSuman Anna * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to
431ee99ee7cSSuman Anna * execute code, but combines the TCMs from both cores. The resets for both
432ee99ee7cSSuman Anna * cores need to be released to make this possible, as the TCMs are in general
433ee99ee7cSSuman Anna * private to each core. Only Core0 needs to be unhalted for running the
434ee99ee7cSSuman Anna * cluster in this mode. The function uses the same reset logic as LockStep
435ee99ee7cSSuman Anna * mode for this (though the behavior is agnostic of the reset release order).
4361168af40SSuman Anna * This callback is invoked only in remoteproc mode.
4376dedbd1dSSuman Anna */
k3_r5_rproc_prepare(struct rproc * rproc)4386dedbd1dSSuman Anna static int k3_r5_rproc_prepare(struct rproc *rproc)
4396dedbd1dSSuman Anna {
4406dedbd1dSSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
4416dedbd1dSSuman Anna struct k3_r5_cluster *cluster = kproc->cluster;
4426dedbd1dSSuman Anna struct k3_r5_core *core = kproc->core;
4436dedbd1dSSuman Anna struct device *dev = kproc->dev;
4447508ea19SSuman Anna u32 ctrl = 0, cfg = 0, stat = 0;
4457508ea19SSuman Anna u64 boot_vec = 0;
4467508ea19SSuman Anna bool mem_init_dis;
4476dedbd1dSSuman Anna int ret;
4486dedbd1dSSuman Anna
4497508ea19SSuman Anna ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl, &stat);
4507508ea19SSuman Anna if (ret < 0)
4517508ea19SSuman Anna return ret;
4527508ea19SSuman Anna mem_init_dis = !!(cfg & PROC_BOOT_CFG_FLAG_R5_MEM_INIT_DIS);
4537508ea19SSuman Anna
454ee99ee7cSSuman Anna /* Re-use LockStep-mode reset logic for Single-CPU mode */
455ee99ee7cSSuman Anna ret = (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
456ee99ee7cSSuman Anna cluster->mode == CLUSTER_MODE_SINGLECPU) ?
4576dedbd1dSSuman Anna k3_r5_lockstep_release(cluster) : k3_r5_split_release(core);
45834f26536SSuman Anna if (ret) {
4596dedbd1dSSuman Anna dev_err(dev, "unable to enable cores for TCM loading, ret = %d\n",
4606dedbd1dSSuman Anna ret);
4616dedbd1dSSuman Anna return ret;
4626dedbd1dSSuman Anna }
4636dedbd1dSSuman Anna
4646dedbd1dSSuman Anna /*
4657508ea19SSuman Anna * Newer IP revisions like on J7200 SoCs support h/w auto-initialization
4667508ea19SSuman Anna * of TCMs, so there is no need to perform the s/w memzero. This bit is
4677508ea19SSuman Anna * configurable through System Firmware, the default value does perform
4687508ea19SSuman Anna * auto-init, but account for it in case it is disabled
4697508ea19SSuman Anna */
4707508ea19SSuman Anna if (cluster->soc_data->tcm_ecc_autoinit && !mem_init_dis) {
4717508ea19SSuman Anna dev_dbg(dev, "leveraging h/w init for TCM memories\n");
4727508ea19SSuman Anna return 0;
4737508ea19SSuman Anna }
4747508ea19SSuman Anna
4757508ea19SSuman Anna /*
47634f26536SSuman Anna * Zero out both TCMs unconditionally (access from v8 Arm core is not
47734f26536SSuman Anna * affected by ATCM & BTCM enable configuration values) so that ECC
47834f26536SSuman Anna * can be effective on all TCM addresses.
47934f26536SSuman Anna */
48034f26536SSuman Anna dev_dbg(dev, "zeroing out ATCM memory\n");
48134f26536SSuman Anna memset(core->mem[0].cpu_addr, 0x00, core->mem[0].size);
48234f26536SSuman Anna
48334f26536SSuman Anna dev_dbg(dev, "zeroing out BTCM memory\n");
48434f26536SSuman Anna memset(core->mem[1].cpu_addr, 0x00, core->mem[1].size);
48534f26536SSuman Anna
48634f26536SSuman Anna return 0;
48734f26536SSuman Anna }
48834f26536SSuman Anna
48934f26536SSuman Anna /*
4906dedbd1dSSuman Anna * This function implements the .unprepare() ops and performs the complimentary
4916dedbd1dSSuman Anna * operations to that of the .prepare() ops. The function is used to assert the
4926dedbd1dSSuman Anna * resets on all applicable cores for the rproc device (depending on LockStep
4936dedbd1dSSuman Anna * or Split mode). This completes the second portion of powering down the R5F
4946dedbd1dSSuman Anna * cores. The cores themselves are only halted in the .stop() ops, and the
4956dedbd1dSSuman Anna * .unprepare() ops is invoked by the remoteproc core after the remoteproc is
4966dedbd1dSSuman Anna * stopped.
497ee99ee7cSSuman Anna *
498ee99ee7cSSuman Anna * The Single-CPU mode on applicable SoCs (eg: AM64x) combines the TCMs from
499ee99ee7cSSuman Anna * both cores. The access is made possible only with releasing the resets for
500ee99ee7cSSuman Anna * both cores, but with only Core0 unhalted. This function re-uses the same
501ee99ee7cSSuman Anna * reset assert logic as LockStep mode for this mode (though the behavior is
5021168af40SSuman Anna * agnostic of the reset assert order). This callback is invoked only in
5031168af40SSuman Anna * remoteproc mode.
5046dedbd1dSSuman Anna */
k3_r5_rproc_unprepare(struct rproc * rproc)5056dedbd1dSSuman Anna static int k3_r5_rproc_unprepare(struct rproc *rproc)
5066dedbd1dSSuman Anna {
5076dedbd1dSSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
5086dedbd1dSSuman Anna struct k3_r5_cluster *cluster = kproc->cluster;
5096dedbd1dSSuman Anna struct k3_r5_core *core = kproc->core;
5106dedbd1dSSuman Anna struct device *dev = kproc->dev;
5116dedbd1dSSuman Anna int ret;
5126dedbd1dSSuman Anna
513ee99ee7cSSuman Anna /* Re-use LockStep-mode reset logic for Single-CPU mode */
514ee99ee7cSSuman Anna ret = (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
515ee99ee7cSSuman Anna cluster->mode == CLUSTER_MODE_SINGLECPU) ?
5166dedbd1dSSuman Anna k3_r5_lockstep_reset(cluster) : k3_r5_split_reset(core);
5176dedbd1dSSuman Anna if (ret)
5186dedbd1dSSuman Anna dev_err(dev, "unable to disable cores, ret = %d\n", ret);
5196dedbd1dSSuman Anna
5206dedbd1dSSuman Anna return ret;
5216dedbd1dSSuman Anna }
5226dedbd1dSSuman Anna
5236dedbd1dSSuman Anna /*
5246dedbd1dSSuman Anna * The R5F start sequence includes two different operations
5256dedbd1dSSuman Anna * 1. Configure the boot vector for R5F core(s)
5266dedbd1dSSuman Anna * 2. Unhalt/Run the R5F core(s)
5276dedbd1dSSuman Anna *
5286dedbd1dSSuman Anna * The sequence is different between LockStep and Split modes. The LockStep
5296dedbd1dSSuman Anna * mode requires the boot vector to be configured only for Core0, and then
5306dedbd1dSSuman Anna * unhalt both the cores to start the execution - Core1 needs to be unhalted
5316dedbd1dSSuman Anna * first followed by Core0. The Split-mode requires that Core0 to be maintained
5326dedbd1dSSuman Anna * always in a higher power state that Core1 (implying Core1 needs to be started
5336dedbd1dSSuman Anna * always only after Core0 is started).
534ee99ee7cSSuman Anna *
535ee99ee7cSSuman Anna * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to execute
536ee99ee7cSSuman Anna * code, so only Core0 needs to be unhalted. The function uses the same logic
5371168af40SSuman Anna * flow as Split-mode for this. This callback is invoked only in remoteproc
5381168af40SSuman Anna * mode.
5396dedbd1dSSuman Anna */
k3_r5_rproc_start(struct rproc * rproc)5406dedbd1dSSuman Anna static int k3_r5_rproc_start(struct rproc *rproc)
5416dedbd1dSSuman Anna {
5426dedbd1dSSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
5436dedbd1dSSuman Anna struct k3_r5_cluster *cluster = kproc->cluster;
5446dedbd1dSSuman Anna struct device *dev = kproc->dev;
5456dedbd1dSSuman Anna struct k3_r5_core *core;
5466dedbd1dSSuman Anna u32 boot_addr;
5476dedbd1dSSuman Anna int ret;
5486dedbd1dSSuman Anna
549e3865c85SSuman Anna ret = k3_r5_rproc_request_mbox(rproc);
550e3865c85SSuman Anna if (ret)
5516dedbd1dSSuman Anna return ret;
5526dedbd1dSSuman Anna
5536dedbd1dSSuman Anna boot_addr = rproc->bootaddr;
5546dedbd1dSSuman Anna /* TODO: add boot_addr sanity checking */
5556dedbd1dSSuman Anna dev_dbg(dev, "booting R5F core using boot addr = 0x%x\n", boot_addr);
5566dedbd1dSSuman Anna
5576dedbd1dSSuman Anna /* boot vector need not be programmed for Core1 in LockStep mode */
5586dedbd1dSSuman Anna core = kproc->core;
5596dedbd1dSSuman Anna ret = ti_sci_proc_set_config(core->tsp, boot_addr, 0, 0);
5606dedbd1dSSuman Anna if (ret)
5616dedbd1dSSuman Anna goto put_mbox;
5626dedbd1dSSuman Anna
5636dedbd1dSSuman Anna /* unhalt/run all applicable cores */
5646dedbd1dSSuman Anna if (cluster->mode == CLUSTER_MODE_LOCKSTEP) {
5656dedbd1dSSuman Anna list_for_each_entry_reverse(core, &cluster->cores, elem) {
5666dedbd1dSSuman Anna ret = k3_r5_core_run(core);
5676dedbd1dSSuman Anna if (ret)
5686dedbd1dSSuman Anna goto unroll_core_run;
5696dedbd1dSSuman Anna }
5706dedbd1dSSuman Anna } else {
5716dedbd1dSSuman Anna ret = k3_r5_core_run(core);
5726dedbd1dSSuman Anna if (ret)
5736dedbd1dSSuman Anna goto put_mbox;
5746dedbd1dSSuman Anna }
5756dedbd1dSSuman Anna
5766dedbd1dSSuman Anna return 0;
5776dedbd1dSSuman Anna
5786dedbd1dSSuman Anna unroll_core_run:
5796dedbd1dSSuman Anna list_for_each_entry_continue(core, &cluster->cores, elem) {
5806dedbd1dSSuman Anna if (k3_r5_core_halt(core))
5816dedbd1dSSuman Anna dev_warn(core->dev, "core halt back failed\n");
5826dedbd1dSSuman Anna }
5836dedbd1dSSuman Anna put_mbox:
5846dedbd1dSSuman Anna mbox_free_channel(kproc->mbox);
5856dedbd1dSSuman Anna return ret;
5866dedbd1dSSuman Anna }
5876dedbd1dSSuman Anna
5886dedbd1dSSuman Anna /*
5896dedbd1dSSuman Anna * The R5F stop function includes the following operations
5906dedbd1dSSuman Anna * 1. Halt R5F core(s)
5916dedbd1dSSuman Anna *
5926dedbd1dSSuman Anna * The sequence is different between LockStep and Split modes, and the order
5936dedbd1dSSuman Anna * of cores the operations are performed are also in general reverse to that
5946dedbd1dSSuman Anna * of the start function. The LockStep mode requires each operation to be
5956dedbd1dSSuman Anna * performed first on Core0 followed by Core1. The Split-mode requires that
5966dedbd1dSSuman Anna * Core0 to be maintained always in a higher power state that Core1 (implying
5976dedbd1dSSuman Anna * Core1 needs to be stopped first before Core0).
5986dedbd1dSSuman Anna *
599ee99ee7cSSuman Anna * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to execute
600ee99ee7cSSuman Anna * code, so only Core0 needs to be halted. The function uses the same logic
601ee99ee7cSSuman Anna * flow as Split-mode for this.
602ee99ee7cSSuman Anna *
6036dedbd1dSSuman Anna * Note that the R5F halt operation in general is not effective when the R5F
6046dedbd1dSSuman Anna * core is running, but is needed to make sure the core won't run after
6056dedbd1dSSuman Anna * deasserting the reset the subsequent time. The asserting of reset can
6066dedbd1dSSuman Anna * be done here, but is preferred to be done in the .unprepare() ops - this
6076dedbd1dSSuman Anna * maintains the symmetric behavior between the .start(), .stop(), .prepare()
6086dedbd1dSSuman Anna * and .unprepare() ops, and also balances them well between sysfs 'state'
6091168af40SSuman Anna * flow and device bind/unbind or module removal. This callback is invoked
6101168af40SSuman Anna * only in remoteproc mode.
6116dedbd1dSSuman Anna */
k3_r5_rproc_stop(struct rproc * rproc)6126dedbd1dSSuman Anna static int k3_r5_rproc_stop(struct rproc *rproc)
6136dedbd1dSSuman Anna {
6146dedbd1dSSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
6156dedbd1dSSuman Anna struct k3_r5_cluster *cluster = kproc->cluster;
6166dedbd1dSSuman Anna struct k3_r5_core *core = kproc->core;
6176dedbd1dSSuman Anna int ret;
6186dedbd1dSSuman Anna
6196dedbd1dSSuman Anna /* halt all applicable cores */
6206dedbd1dSSuman Anna if (cluster->mode == CLUSTER_MODE_LOCKSTEP) {
6216dedbd1dSSuman Anna list_for_each_entry(core, &cluster->cores, elem) {
6226dedbd1dSSuman Anna ret = k3_r5_core_halt(core);
6236dedbd1dSSuman Anna if (ret) {
6246dedbd1dSSuman Anna core = list_prev_entry(core, elem);
6256dedbd1dSSuman Anna goto unroll_core_halt;
6266dedbd1dSSuman Anna }
6276dedbd1dSSuman Anna }
6286dedbd1dSSuman Anna } else {
6296dedbd1dSSuman Anna ret = k3_r5_core_halt(core);
6306dedbd1dSSuman Anna if (ret)
6316dedbd1dSSuman Anna goto out;
6326dedbd1dSSuman Anna }
6336dedbd1dSSuman Anna
6346dedbd1dSSuman Anna mbox_free_channel(kproc->mbox);
6356dedbd1dSSuman Anna
6366dedbd1dSSuman Anna return 0;
6376dedbd1dSSuman Anna
6386dedbd1dSSuman Anna unroll_core_halt:
6396dedbd1dSSuman Anna list_for_each_entry_from_reverse(core, &cluster->cores, elem) {
6406dedbd1dSSuman Anna if (k3_r5_core_run(core))
6416dedbd1dSSuman Anna dev_warn(core->dev, "core run back failed\n");
6426dedbd1dSSuman Anna }
6436dedbd1dSSuman Anna out:
6446dedbd1dSSuman Anna return ret;
6456dedbd1dSSuman Anna }
6466dedbd1dSSuman Anna
6476dedbd1dSSuman Anna /*
6481168af40SSuman Anna * Attach to a running R5F remote processor (IPC-only mode)
6491168af40SSuman Anna *
6501168af40SSuman Anna * The R5F attach callback only needs to request the mailbox, the remote
6511168af40SSuman Anna * processor is already booted, so there is no need to issue any TI-SCI
6521168af40SSuman Anna * commands to boot the R5F cores in IPC-only mode. This callback is invoked
6531168af40SSuman Anna * only in IPC-only mode.
6541168af40SSuman Anna */
k3_r5_rproc_attach(struct rproc * rproc)6551168af40SSuman Anna static int k3_r5_rproc_attach(struct rproc *rproc)
6561168af40SSuman Anna {
6571168af40SSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
6581168af40SSuman Anna struct device *dev = kproc->dev;
6591168af40SSuman Anna int ret;
6601168af40SSuman Anna
6611168af40SSuman Anna ret = k3_r5_rproc_request_mbox(rproc);
6621168af40SSuman Anna if (ret)
6631168af40SSuman Anna return ret;
6641168af40SSuman Anna
6651168af40SSuman Anna dev_info(dev, "R5F core initialized in IPC-only mode\n");
6661168af40SSuman Anna return 0;
6671168af40SSuman Anna }
6681168af40SSuman Anna
6691168af40SSuman Anna /*
6701168af40SSuman Anna * Detach from a running R5F remote processor (IPC-only mode)
6711168af40SSuman Anna *
6721168af40SSuman Anna * The R5F detach callback performs the opposite operation to attach callback
6731168af40SSuman Anna * and only needs to release the mailbox, the R5F cores are not stopped and
6741168af40SSuman Anna * will be left in booted state in IPC-only mode. This callback is invoked
6751168af40SSuman Anna * only in IPC-only mode.
6761168af40SSuman Anna */
k3_r5_rproc_detach(struct rproc * rproc)6771168af40SSuman Anna static int k3_r5_rproc_detach(struct rproc *rproc)
6781168af40SSuman Anna {
6791168af40SSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
6801168af40SSuman Anna struct device *dev = kproc->dev;
6811168af40SSuman Anna
6821168af40SSuman Anna mbox_free_channel(kproc->mbox);
6831168af40SSuman Anna dev_info(dev, "R5F core deinitialized in IPC-only mode\n");
6841168af40SSuman Anna return 0;
6851168af40SSuman Anna }
6861168af40SSuman Anna
6871168af40SSuman Anna /*
6881168af40SSuman Anna * This function implements the .get_loaded_rsc_table() callback and is used
6891168af40SSuman Anna * to provide the resource table for the booted R5F in IPC-only mode. The K3 R5F
6901168af40SSuman Anna * firmwares follow a design-by-contract approach and are expected to have the
6911168af40SSuman Anna * resource table at the base of the DDR region reserved for firmware usage.
6921168af40SSuman Anna * This provides flexibility for the remote processor to be booted by different
6931168af40SSuman Anna * bootloaders that may or may not have the ability to publish the resource table
6941168af40SSuman Anna * address and size through a DT property. This callback is invoked only in
6951168af40SSuman Anna * IPC-only mode.
6961168af40SSuman Anna */
k3_r5_get_loaded_rsc_table(struct rproc * rproc,size_t * rsc_table_sz)6971168af40SSuman Anna static struct resource_table *k3_r5_get_loaded_rsc_table(struct rproc *rproc,
6981168af40SSuman Anna size_t *rsc_table_sz)
6991168af40SSuman Anna {
7001168af40SSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
7011168af40SSuman Anna struct device *dev = kproc->dev;
7021168af40SSuman Anna
7031168af40SSuman Anna if (!kproc->rmem[0].cpu_addr) {
7041168af40SSuman Anna dev_err(dev, "memory-region #1 does not exist, loaded rsc table can't be found");
7051168af40SSuman Anna return ERR_PTR(-ENOMEM);
7061168af40SSuman Anna }
7071168af40SSuman Anna
7081168af40SSuman Anna /*
7091168af40SSuman Anna * NOTE: The resource table size is currently hard-coded to a maximum
7101168af40SSuman Anna * of 256 bytes. The most common resource table usage for K3 firmwares
7111168af40SSuman Anna * is to only have the vdev resource entry and an optional trace entry.
7121168af40SSuman Anna * The exact size could be computed based on resource table address, but
7131168af40SSuman Anna * the hard-coded value suffices to support the IPC-only mode.
7141168af40SSuman Anna */
7151168af40SSuman Anna *rsc_table_sz = 256;
7161168af40SSuman Anna return (struct resource_table *)kproc->rmem[0].cpu_addr;
7171168af40SSuman Anna }
7181168af40SSuman Anna
7191168af40SSuman Anna /*
7206dedbd1dSSuman Anna * Internal Memory translation helper
7216dedbd1dSSuman Anna *
7226dedbd1dSSuman Anna * Custom function implementing the rproc .da_to_va ops to provide address
7236dedbd1dSSuman Anna * translation (device address to kernel virtual address) for internal RAMs
7246dedbd1dSSuman Anna * present in a DSP or IPU device). The translated addresses can be used
7256dedbd1dSSuman Anna * either by the remoteproc core for loading, or by any rpmsg bus drivers.
7266dedbd1dSSuman Anna */
k3_r5_rproc_da_to_va(struct rproc * rproc,u64 da,size_t len,bool * is_iomem)72740df0a91SPeng Fan static void *k3_r5_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
7286dedbd1dSSuman Anna {
7296dedbd1dSSuman Anna struct k3_r5_rproc *kproc = rproc->priv;
7306dedbd1dSSuman Anna struct k3_r5_core *core = kproc->core;
7316dedbd1dSSuman Anna void __iomem *va = NULL;
7326dedbd1dSSuman Anna phys_addr_t bus_addr;
7336dedbd1dSSuman Anna u32 dev_addr, offset;
7346dedbd1dSSuman Anna size_t size;
7356dedbd1dSSuman Anna int i;
7366dedbd1dSSuman Anna
7376dedbd1dSSuman Anna if (len == 0)
7386dedbd1dSSuman Anna return NULL;
7396dedbd1dSSuman Anna
7406dedbd1dSSuman Anna /* handle both R5 and SoC views of ATCM and BTCM */
7416dedbd1dSSuman Anna for (i = 0; i < core->num_mems; i++) {
7426dedbd1dSSuman Anna bus_addr = core->mem[i].bus_addr;
7436dedbd1dSSuman Anna dev_addr = core->mem[i].dev_addr;
7446dedbd1dSSuman Anna size = core->mem[i].size;
7456dedbd1dSSuman Anna
7466dedbd1dSSuman Anna /* handle R5-view addresses of TCMs */
7476dedbd1dSSuman Anna if (da >= dev_addr && ((da + len) <= (dev_addr + size))) {
7486dedbd1dSSuman Anna offset = da - dev_addr;
7496dedbd1dSSuman Anna va = core->mem[i].cpu_addr + offset;
7506dedbd1dSSuman Anna return (__force void *)va;
7516dedbd1dSSuman Anna }
7526dedbd1dSSuman Anna
7536dedbd1dSSuman Anna /* handle SoC-view addresses of TCMs */
7546dedbd1dSSuman Anna if (da >= bus_addr && ((da + len) <= (bus_addr + size))) {
7556dedbd1dSSuman Anna offset = da - bus_addr;
7566dedbd1dSSuman Anna va = core->mem[i].cpu_addr + offset;
7576dedbd1dSSuman Anna return (__force void *)va;
7586dedbd1dSSuman Anna }
7596dedbd1dSSuman Anna }
7606dedbd1dSSuman Anna
761ea47c688SSuman Anna /* handle any SRAM regions using SoC-view addresses */
762ea47c688SSuman Anna for (i = 0; i < core->num_sram; i++) {
763ea47c688SSuman Anna dev_addr = core->sram[i].dev_addr;
764ea47c688SSuman Anna size = core->sram[i].size;
765ea47c688SSuman Anna
766ea47c688SSuman Anna if (da >= dev_addr && ((da + len) <= (dev_addr + size))) {
767ea47c688SSuman Anna offset = da - dev_addr;
768ea47c688SSuman Anna va = core->sram[i].cpu_addr + offset;
769ea47c688SSuman Anna return (__force void *)va;
770ea47c688SSuman Anna }
771ea47c688SSuman Anna }
772ea47c688SSuman Anna
7736dedbd1dSSuman Anna /* handle static DDR reserved memory regions */
7746dedbd1dSSuman Anna for (i = 0; i < kproc->num_rmems; i++) {
7756dedbd1dSSuman Anna dev_addr = kproc->rmem[i].dev_addr;
7766dedbd1dSSuman Anna size = kproc->rmem[i].size;
7776dedbd1dSSuman Anna
7786dedbd1dSSuman Anna if (da >= dev_addr && ((da + len) <= (dev_addr + size))) {
7796dedbd1dSSuman Anna offset = da - dev_addr;
7806dedbd1dSSuman Anna va = kproc->rmem[i].cpu_addr + offset;
7816dedbd1dSSuman Anna return (__force void *)va;
7826dedbd1dSSuman Anna }
7836dedbd1dSSuman Anna }
7846dedbd1dSSuman Anna
7856dedbd1dSSuman Anna return NULL;
7866dedbd1dSSuman Anna }
7876dedbd1dSSuman Anna
7886dedbd1dSSuman Anna static const struct rproc_ops k3_r5_rproc_ops = {
7896dedbd1dSSuman Anna .prepare = k3_r5_rproc_prepare,
7906dedbd1dSSuman Anna .unprepare = k3_r5_rproc_unprepare,
7916dedbd1dSSuman Anna .start = k3_r5_rproc_start,
7926dedbd1dSSuman Anna .stop = k3_r5_rproc_stop,
7936dedbd1dSSuman Anna .kick = k3_r5_rproc_kick,
7946dedbd1dSSuman Anna .da_to_va = k3_r5_rproc_da_to_va,
7956dedbd1dSSuman Anna };
7966dedbd1dSSuman Anna
7976dedbd1dSSuman Anna /*
7986dedbd1dSSuman Anna * Internal R5F Core configuration
7996dedbd1dSSuman Anna *
8006dedbd1dSSuman Anna * Each R5FSS has a cluster-level setting for configuring the processor
8016dedbd1dSSuman Anna * subsystem either in a safety/fault-tolerant LockStep mode or a performance
802ee99ee7cSSuman Anna * oriented Split mode on most SoCs. A fewer SoCs support a non-safety mode
803ee99ee7cSSuman Anna * as an alternate for LockStep mode that exercises only a single R5F core
804ee99ee7cSSuman Anna * called Single-CPU mode. Each R5F core has a number of settings to either
8056dedbd1dSSuman Anna * enable/disable each of the TCMs, control which TCM appears at the R5F core's
8066dedbd1dSSuman Anna * address 0x0. These settings need to be configured before the resets for the
8076dedbd1dSSuman Anna * corresponding core are released. These settings are all protected and managed
8086dedbd1dSSuman Anna * by the System Processor.
8096dedbd1dSSuman Anna *
8106dedbd1dSSuman Anna * This function is used to pre-configure these settings for each R5F core, and
8116dedbd1dSSuman Anna * the configuration is all done through various ti_sci_proc functions that
8126dedbd1dSSuman Anna * communicate with the System Processor. The function also ensures that both
8136dedbd1dSSuman Anna * the cores are halted before the .prepare() step.
8146dedbd1dSSuman Anna *
8156dedbd1dSSuman Anna * The function is called from k3_r5_cluster_rproc_init() and is invoked either
816ee99ee7cSSuman Anna * once (in LockStep mode or Single-CPU modes) or twice (in Split mode). Support
817ee99ee7cSSuman Anna * for LockStep-mode is dictated by an eFUSE register bit, and the config
818ee99ee7cSSuman Anna * settings retrieved from DT are adjusted accordingly as per the permitted
819ee99ee7cSSuman Anna * cluster mode. Another eFUSE register bit dictates if the R5F cluster only
820ee99ee7cSSuman Anna * supports a Single-CPU mode. All cluster level settings like Cluster mode and
821ee99ee7cSSuman Anna * TEINIT (exception handling state dictating ARM or Thumb mode) can only be set
822ee99ee7cSSuman Anna * and retrieved using Core0.
8236dedbd1dSSuman Anna *
8246dedbd1dSSuman Anna * The function behavior is different based on the cluster mode. The R5F cores
8256dedbd1dSSuman Anna * are configured independently as per their individual settings in Split mode.
8266dedbd1dSSuman Anna * They are identically configured in LockStep mode using the primary Core0
8276dedbd1dSSuman Anna * settings. However, some individual settings cannot be set in LockStep mode.
8286dedbd1dSSuman Anna * This is overcome by switching to Split-mode initially and then programming
8296dedbd1dSSuman Anna * both the cores with the same settings, before reconfiguing again for
8306dedbd1dSSuman Anna * LockStep mode.
8316dedbd1dSSuman Anna */
k3_r5_rproc_configure(struct k3_r5_rproc * kproc)8326dedbd1dSSuman Anna static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc)
8336dedbd1dSSuman Anna {
8346dedbd1dSSuman Anna struct k3_r5_cluster *cluster = kproc->cluster;
8356dedbd1dSSuman Anna struct device *dev = kproc->dev;
8366dedbd1dSSuman Anna struct k3_r5_core *core0, *core, *temp;
8376dedbd1dSSuman Anna u32 ctrl = 0, cfg = 0, stat = 0;
8386dedbd1dSSuman Anna u32 set_cfg = 0, clr_cfg = 0;
8396dedbd1dSSuman Anna u64 boot_vec = 0;
8406dedbd1dSSuman Anna bool lockstep_en;
841ee99ee7cSSuman Anna bool single_cpu;
8426dedbd1dSSuman Anna int ret;
8436dedbd1dSSuman Anna
8446dedbd1dSSuman Anna core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);
845ee99ee7cSSuman Anna if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
84651723657SDevarsh Thakkar cluster->mode == CLUSTER_MODE_SINGLECPU ||
84751723657SDevarsh Thakkar cluster->mode == CLUSTER_MODE_SINGLECORE) {
848ee99ee7cSSuman Anna core = core0;
849ee99ee7cSSuman Anna } else {
850ee99ee7cSSuman Anna core = kproc->core;
851ee99ee7cSSuman Anna }
8526dedbd1dSSuman Anna
8536dedbd1dSSuman Anna ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl,
8546dedbd1dSSuman Anna &stat);
8556dedbd1dSSuman Anna if (ret < 0)
8566dedbd1dSSuman Anna return ret;
8576dedbd1dSSuman Anna
8586dedbd1dSSuman Anna dev_dbg(dev, "boot_vector = 0x%llx, cfg = 0x%x ctrl = 0x%x stat = 0x%x\n",
8596dedbd1dSSuman Anna boot_vec, cfg, ctrl, stat);
8606dedbd1dSSuman Anna
8617f402919SDevarsh Thakkar single_cpu = !!(stat & PROC_BOOT_STATUS_FLAG_R5_SINGLECORE_ONLY);
8627f402919SDevarsh Thakkar lockstep_en = !!(stat & PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED);
8637f402919SDevarsh Thakkar
8647f402919SDevarsh Thakkar /* Override to single CPU mode if set in status flag */
865ee99ee7cSSuman Anna if (single_cpu && cluster->mode == CLUSTER_MODE_SPLIT) {
866ee99ee7cSSuman Anna dev_err(cluster->dev, "split-mode not permitted, force configuring for single-cpu mode\n");
867ee99ee7cSSuman Anna cluster->mode = CLUSTER_MODE_SINGLECPU;
868ee99ee7cSSuman Anna }
869ee99ee7cSSuman Anna
8707f402919SDevarsh Thakkar /* Override to split mode if lockstep enable bit is not set in status flag */
8716dedbd1dSSuman Anna if (!lockstep_en && cluster->mode == CLUSTER_MODE_LOCKSTEP) {
8726dedbd1dSSuman Anna dev_err(cluster->dev, "lockstep mode not permitted, force configuring for split-mode\n");
8736dedbd1dSSuman Anna cluster->mode = CLUSTER_MODE_SPLIT;
8746dedbd1dSSuman Anna }
8756dedbd1dSSuman Anna
8766dedbd1dSSuman Anna /* always enable ARM mode and set boot vector to 0 */
8776dedbd1dSSuman Anna boot_vec = 0x0;
8786dedbd1dSSuman Anna if (core == core0) {
8796dedbd1dSSuman Anna clr_cfg = PROC_BOOT_CFG_FLAG_R5_TEINIT;
8806dedbd1dSSuman Anna /*
881ee99ee7cSSuman Anna * Single-CPU configuration bit can only be configured
882ee99ee7cSSuman Anna * on Core0 and system firmware will NACK any requests
883ee99ee7cSSuman Anna * with the bit configured, so program it only on
884ee99ee7cSSuman Anna * permitted cores
885ee99ee7cSSuman Anna */
88651723657SDevarsh Thakkar if (cluster->mode == CLUSTER_MODE_SINGLECPU ||
88751723657SDevarsh Thakkar cluster->mode == CLUSTER_MODE_SINGLECORE) {
888ee99ee7cSSuman Anna set_cfg = PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE;
889ee99ee7cSSuman Anna } else {
890ee99ee7cSSuman Anna /*
891ee99ee7cSSuman Anna * LockStep configuration bit is Read-only on Split-mode
892ee99ee7cSSuman Anna * _only_ devices and system firmware will NACK any
893ee99ee7cSSuman Anna * requests with the bit configured, so program it only
894ee99ee7cSSuman Anna * on permitted devices
8956dedbd1dSSuman Anna */
8966dedbd1dSSuman Anna if (lockstep_en)
8976dedbd1dSSuman Anna clr_cfg |= PROC_BOOT_CFG_FLAG_R5_LOCKSTEP;
8986dedbd1dSSuman Anna }
899ee99ee7cSSuman Anna }
9006dedbd1dSSuman Anna
9016dedbd1dSSuman Anna if (core->atcm_enable)
9026dedbd1dSSuman Anna set_cfg |= PROC_BOOT_CFG_FLAG_R5_ATCM_EN;
9036dedbd1dSSuman Anna else
9046dedbd1dSSuman Anna clr_cfg |= PROC_BOOT_CFG_FLAG_R5_ATCM_EN;
9056dedbd1dSSuman Anna
9066dedbd1dSSuman Anna if (core->btcm_enable)
9076dedbd1dSSuman Anna set_cfg |= PROC_BOOT_CFG_FLAG_R5_BTCM_EN;
9086dedbd1dSSuman Anna else
9096dedbd1dSSuman Anna clr_cfg |= PROC_BOOT_CFG_FLAG_R5_BTCM_EN;
9106dedbd1dSSuman Anna
9116dedbd1dSSuman Anna if (core->loczrama)
9126dedbd1dSSuman Anna set_cfg |= PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE;
9136dedbd1dSSuman Anna else
9146dedbd1dSSuman Anna clr_cfg |= PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE;
9156dedbd1dSSuman Anna
9166dedbd1dSSuman Anna if (cluster->mode == CLUSTER_MODE_LOCKSTEP) {
9176dedbd1dSSuman Anna /*
9186dedbd1dSSuman Anna * work around system firmware limitations to make sure both
9196dedbd1dSSuman Anna * cores are programmed symmetrically in LockStep. LockStep
9206dedbd1dSSuman Anna * and TEINIT config is only allowed with Core0.
9216dedbd1dSSuman Anna */
9226dedbd1dSSuman Anna list_for_each_entry(temp, &cluster->cores, elem) {
9236dedbd1dSSuman Anna ret = k3_r5_core_halt(temp);
9246dedbd1dSSuman Anna if (ret)
9256dedbd1dSSuman Anna goto out;
9266dedbd1dSSuman Anna
9276dedbd1dSSuman Anna if (temp != core) {
9286dedbd1dSSuman Anna clr_cfg &= ~PROC_BOOT_CFG_FLAG_R5_LOCKSTEP;
9296dedbd1dSSuman Anna clr_cfg &= ~PROC_BOOT_CFG_FLAG_R5_TEINIT;
9306dedbd1dSSuman Anna }
9316dedbd1dSSuman Anna ret = ti_sci_proc_set_config(temp->tsp, boot_vec,
9326dedbd1dSSuman Anna set_cfg, clr_cfg);
9336dedbd1dSSuman Anna if (ret)
9346dedbd1dSSuman Anna goto out;
9356dedbd1dSSuman Anna }
9366dedbd1dSSuman Anna
9376dedbd1dSSuman Anna set_cfg = PROC_BOOT_CFG_FLAG_R5_LOCKSTEP;
9386dedbd1dSSuman Anna clr_cfg = 0;
9396dedbd1dSSuman Anna ret = ti_sci_proc_set_config(core->tsp, boot_vec,
9406dedbd1dSSuman Anna set_cfg, clr_cfg);
9416dedbd1dSSuman Anna } else {
9426dedbd1dSSuman Anna ret = k3_r5_core_halt(core);
9436dedbd1dSSuman Anna if (ret)
9446dedbd1dSSuman Anna goto out;
9456dedbd1dSSuman Anna
9466dedbd1dSSuman Anna ret = ti_sci_proc_set_config(core->tsp, boot_vec,
9476dedbd1dSSuman Anna set_cfg, clr_cfg);
9486dedbd1dSSuman Anna }
9496dedbd1dSSuman Anna
9506dedbd1dSSuman Anna out:
9516dedbd1dSSuman Anna return ret;
9526dedbd1dSSuman Anna }
9536dedbd1dSSuman Anna
k3_r5_reserved_mem_init(struct k3_r5_rproc * kproc)9546dedbd1dSSuman Anna static int k3_r5_reserved_mem_init(struct k3_r5_rproc *kproc)
9556dedbd1dSSuman Anna {
9566dedbd1dSSuman Anna struct device *dev = kproc->dev;
9576dedbd1dSSuman Anna struct device_node *np = dev_of_node(dev);
9586dedbd1dSSuman Anna struct device_node *rmem_np;
9596dedbd1dSSuman Anna struct reserved_mem *rmem;
9606dedbd1dSSuman Anna int num_rmems;
9616dedbd1dSSuman Anna int ret, i;
9626dedbd1dSSuman Anna
9636dedbd1dSSuman Anna num_rmems = of_property_count_elems_of_size(np, "memory-region",
9646dedbd1dSSuman Anna sizeof(phandle));
9656dedbd1dSSuman Anna if (num_rmems <= 0) {
9666dedbd1dSSuman Anna dev_err(dev, "device does not have reserved memory regions, ret = %d\n",
9676dedbd1dSSuman Anna num_rmems);
9686dedbd1dSSuman Anna return -EINVAL;
9696dedbd1dSSuman Anna }
9706dedbd1dSSuman Anna if (num_rmems < 2) {
9716dedbd1dSSuman Anna dev_err(dev, "device needs at least two memory regions to be defined, num = %d\n",
9726dedbd1dSSuman Anna num_rmems);
9736dedbd1dSSuman Anna return -EINVAL;
9746dedbd1dSSuman Anna }
9756dedbd1dSSuman Anna
9766dedbd1dSSuman Anna /* use reserved memory region 0 for vring DMA allocations */
9776dedbd1dSSuman Anna ret = of_reserved_mem_device_init_by_idx(dev, np, 0);
9786dedbd1dSSuman Anna if (ret) {
9796dedbd1dSSuman Anna dev_err(dev, "device cannot initialize DMA pool, ret = %d\n",
9806dedbd1dSSuman Anna ret);
9816dedbd1dSSuman Anna return ret;
9826dedbd1dSSuman Anna }
9836dedbd1dSSuman Anna
9846dedbd1dSSuman Anna num_rmems--;
9856dedbd1dSSuman Anna kproc->rmem = kcalloc(num_rmems, sizeof(*kproc->rmem), GFP_KERNEL);
9866dedbd1dSSuman Anna if (!kproc->rmem) {
9876dedbd1dSSuman Anna ret = -ENOMEM;
9886dedbd1dSSuman Anna goto release_rmem;
9896dedbd1dSSuman Anna }
9906dedbd1dSSuman Anna
9916dedbd1dSSuman Anna /* use remaining reserved memory regions for static carveouts */
9926dedbd1dSSuman Anna for (i = 0; i < num_rmems; i++) {
9936dedbd1dSSuman Anna rmem_np = of_parse_phandle(np, "memory-region", i + 1);
9946dedbd1dSSuman Anna if (!rmem_np) {
9956dedbd1dSSuman Anna ret = -EINVAL;
9966dedbd1dSSuman Anna goto unmap_rmem;
9976dedbd1dSSuman Anna }
9986dedbd1dSSuman Anna
9996dedbd1dSSuman Anna rmem = of_reserved_mem_lookup(rmem_np);
10006dedbd1dSSuman Anna if (!rmem) {
10016dedbd1dSSuman Anna of_node_put(rmem_np);
10026dedbd1dSSuman Anna ret = -EINVAL;
10036dedbd1dSSuman Anna goto unmap_rmem;
10046dedbd1dSSuman Anna }
10056dedbd1dSSuman Anna of_node_put(rmem_np);
10066dedbd1dSSuman Anna
10076dedbd1dSSuman Anna kproc->rmem[i].bus_addr = rmem->base;
10086dedbd1dSSuman Anna /*
10096dedbd1dSSuman Anna * R5Fs do not have an MMU, but have a Region Address Translator
10106dedbd1dSSuman Anna * (RAT) module that provides a fixed entry translation between
10116dedbd1dSSuman Anna * the 32-bit processor addresses to 64-bit bus addresses. The
10126dedbd1dSSuman Anna * RAT is programmable only by the R5F cores. Support for RAT
10136dedbd1dSSuman Anna * is currently not supported, so 64-bit address regions are not
10146dedbd1dSSuman Anna * supported. The absence of MMUs implies that the R5F device
10156dedbd1dSSuman Anna * addresses/supported memory regions are restricted to 32-bit
10166dedbd1dSSuman Anna * bus addresses, and are identical
10176dedbd1dSSuman Anna */
10186dedbd1dSSuman Anna kproc->rmem[i].dev_addr = (u32)rmem->base;
10196dedbd1dSSuman Anna kproc->rmem[i].size = rmem->size;
10206dedbd1dSSuman Anna kproc->rmem[i].cpu_addr = ioremap_wc(rmem->base, rmem->size);
10216dedbd1dSSuman Anna if (!kproc->rmem[i].cpu_addr) {
10226dedbd1dSSuman Anna dev_err(dev, "failed to map reserved memory#%d at %pa of size %pa\n",
10236dedbd1dSSuman Anna i + 1, &rmem->base, &rmem->size);
10246dedbd1dSSuman Anna ret = -ENOMEM;
10256dedbd1dSSuman Anna goto unmap_rmem;
10266dedbd1dSSuman Anna }
10276dedbd1dSSuman Anna
10286dedbd1dSSuman Anna dev_dbg(dev, "reserved memory%d: bus addr %pa size 0x%zx va %pK da 0x%x\n",
10296dedbd1dSSuman Anna i + 1, &kproc->rmem[i].bus_addr,
10306dedbd1dSSuman Anna kproc->rmem[i].size, kproc->rmem[i].cpu_addr,
10316dedbd1dSSuman Anna kproc->rmem[i].dev_addr);
10326dedbd1dSSuman Anna }
10336dedbd1dSSuman Anna kproc->num_rmems = num_rmems;
10346dedbd1dSSuman Anna
10356dedbd1dSSuman Anna return 0;
10366dedbd1dSSuman Anna
10376dedbd1dSSuman Anna unmap_rmem:
10386dedbd1dSSuman Anna for (i--; i >= 0; i--)
10396dedbd1dSSuman Anna iounmap(kproc->rmem[i].cpu_addr);
10406dedbd1dSSuman Anna kfree(kproc->rmem);
10416dedbd1dSSuman Anna release_rmem:
10426dedbd1dSSuman Anna of_reserved_mem_device_release(dev);
10436dedbd1dSSuman Anna return ret;
10446dedbd1dSSuman Anna }
10456dedbd1dSSuman Anna
k3_r5_reserved_mem_exit(struct k3_r5_rproc * kproc)10466dedbd1dSSuman Anna static void k3_r5_reserved_mem_exit(struct k3_r5_rproc *kproc)
10476dedbd1dSSuman Anna {
10486dedbd1dSSuman Anna int i;
10496dedbd1dSSuman Anna
10506dedbd1dSSuman Anna for (i = 0; i < kproc->num_rmems; i++)
10516dedbd1dSSuman Anna iounmap(kproc->rmem[i].cpu_addr);
10526dedbd1dSSuman Anna kfree(kproc->rmem);
10536dedbd1dSSuman Anna
10546dedbd1dSSuman Anna of_reserved_mem_device_release(kproc->dev);
10556dedbd1dSSuman Anna }
10566dedbd1dSSuman Anna
1057c3c21b35SSuman Anna /*
1058c3c21b35SSuman Anna * Each R5F core within a typical R5FSS instance has a total of 64 KB of TCMs,
1059c3c21b35SSuman Anna * split equally into two 32 KB banks between ATCM and BTCM. The TCMs from both
1060c3c21b35SSuman Anna * cores are usable in Split-mode, but only the Core0 TCMs can be used in
1061c3c21b35SSuman Anna * LockStep-mode. The newer revisions of the R5FSS IP maximizes these TCMs by
1062c3c21b35SSuman Anna * leveraging the Core1 TCMs as well in certain modes where they would have
1063ee99ee7cSSuman Anna * otherwise been unusable (Eg: LockStep-mode on J7200 SoCs, Single-CPU mode on
1064ee99ee7cSSuman Anna * AM64x SoCs). This is done by making a Core1 TCM visible immediately after the
1065ee99ee7cSSuman Anna * corresponding Core0 TCM. The SoC memory map uses the larger 64 KB sizes for
1066ee99ee7cSSuman Anna * the Core0 TCMs, and the dts representation reflects this increased size on
1067ee99ee7cSSuman Anna * supported SoCs. The Core0 TCM sizes therefore have to be adjusted to only
1068ee99ee7cSSuman Anna * half the original size in Split mode.
1069c3c21b35SSuman Anna */
k3_r5_adjust_tcm_sizes(struct k3_r5_rproc * kproc)1070c3c21b35SSuman Anna static void k3_r5_adjust_tcm_sizes(struct k3_r5_rproc *kproc)
1071c3c21b35SSuman Anna {
1072c3c21b35SSuman Anna struct k3_r5_cluster *cluster = kproc->cluster;
1073c3c21b35SSuman Anna struct k3_r5_core *core = kproc->core;
1074c3c21b35SSuman Anna struct device *cdev = core->dev;
1075c3c21b35SSuman Anna struct k3_r5_core *core0;
1076c3c21b35SSuman Anna
1077c3c21b35SSuman Anna if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
1078ee99ee7cSSuman Anna cluster->mode == CLUSTER_MODE_SINGLECPU ||
107951723657SDevarsh Thakkar cluster->mode == CLUSTER_MODE_SINGLECORE ||
1080c3c21b35SSuman Anna !cluster->soc_data->tcm_is_double)
1081c3c21b35SSuman Anna return;
1082c3c21b35SSuman Anna
1083c3c21b35SSuman Anna core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);
1084c3c21b35SSuman Anna if (core == core0) {
1085c3c21b35SSuman Anna WARN_ON(core->mem[0].size != SZ_64K);
1086c3c21b35SSuman Anna WARN_ON(core->mem[1].size != SZ_64K);
1087c3c21b35SSuman Anna
1088c3c21b35SSuman Anna core->mem[0].size /= 2;
1089c3c21b35SSuman Anna core->mem[1].size /= 2;
1090c3c21b35SSuman Anna
1091c3c21b35SSuman Anna dev_dbg(cdev, "adjusted TCM sizes, ATCM = 0x%zx BTCM = 0x%zx\n",
1092c3c21b35SSuman Anna core->mem[0].size, core->mem[1].size);
1093c3c21b35SSuman Anna }
1094c3c21b35SSuman Anna }
1095c3c21b35SSuman Anna
10961168af40SSuman Anna /*
10971168af40SSuman Anna * This function checks and configures a R5F core for IPC-only or remoteproc
10981168af40SSuman Anna * mode. The driver is configured to be in IPC-only mode for a R5F core when
10991168af40SSuman Anna * the core has been loaded and started by a bootloader. The IPC-only mode is
11001168af40SSuman Anna * detected by querying the System Firmware for reset, power on and halt status
11011168af40SSuman Anna * and ensuring that the core is running. Any incomplete steps at bootloader
11021168af40SSuman Anna * are validated and errored out.
11031168af40SSuman Anna *
11041168af40SSuman Anna * In IPC-only mode, the driver state flags for ATCM, BTCM and LOCZRAMA settings
11051168af40SSuman Anna * and cluster mode parsed originally from kernel DT are updated to reflect the
11061168af40SSuman Anna * actual values configured by bootloader. The driver internal device memory
11071168af40SSuman Anna * addresses for TCMs are also updated.
11081168af40SSuman Anna */
k3_r5_rproc_configure_mode(struct k3_r5_rproc * kproc)11091168af40SSuman Anna static int k3_r5_rproc_configure_mode(struct k3_r5_rproc *kproc)
11101168af40SSuman Anna {
11111168af40SSuman Anna struct k3_r5_cluster *cluster = kproc->cluster;
11121168af40SSuman Anna struct k3_r5_core *core = kproc->core;
11131168af40SSuman Anna struct device *cdev = core->dev;
11147f402919SDevarsh Thakkar bool r_state = false, c_state = false, lockstep_en = false, single_cpu = false;
11151168af40SSuman Anna u32 ctrl = 0, cfg = 0, stat = 0, halted = 0;
11161168af40SSuman Anna u64 boot_vec = 0;
11171168af40SSuman Anna u32 atcm_enable, btcm_enable, loczrama;
11181168af40SSuman Anna struct k3_r5_core *core0;
11197f402919SDevarsh Thakkar enum cluster_mode mode = cluster->mode;
11201168af40SSuman Anna int ret;
11211168af40SSuman Anna
11221168af40SSuman Anna core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);
11231168af40SSuman Anna
11241168af40SSuman Anna ret = core->ti_sci->ops.dev_ops.is_on(core->ti_sci, core->ti_sci_id,
11251168af40SSuman Anna &r_state, &c_state);
11261168af40SSuman Anna if (ret) {
11271168af40SSuman Anna dev_err(cdev, "failed to get initial state, mode cannot be determined, ret = %d\n",
11281168af40SSuman Anna ret);
11291168af40SSuman Anna return ret;
11301168af40SSuman Anna }
11311168af40SSuman Anna if (r_state != c_state) {
11321168af40SSuman Anna dev_warn(cdev, "R5F core may have been powered on by a different host, programmed state (%d) != actual state (%d)\n",
11331168af40SSuman Anna r_state, c_state);
11341168af40SSuman Anna }
11351168af40SSuman Anna
11361168af40SSuman Anna ret = reset_control_status(core->reset);
11371168af40SSuman Anna if (ret < 0) {
11381168af40SSuman Anna dev_err(cdev, "failed to get initial local reset status, ret = %d\n",
11391168af40SSuman Anna ret);
11401168af40SSuman Anna return ret;
11411168af40SSuman Anna }
11421168af40SSuman Anna
11431168af40SSuman Anna ret = ti_sci_proc_get_status(core->tsp, &boot_vec, &cfg, &ctrl,
11441168af40SSuman Anna &stat);
11451168af40SSuman Anna if (ret < 0) {
11461168af40SSuman Anna dev_err(cdev, "failed to get initial processor status, ret = %d\n",
11471168af40SSuman Anna ret);
11481168af40SSuman Anna return ret;
11491168af40SSuman Anna }
11501168af40SSuman Anna atcm_enable = cfg & PROC_BOOT_CFG_FLAG_R5_ATCM_EN ? 1 : 0;
11511168af40SSuman Anna btcm_enable = cfg & PROC_BOOT_CFG_FLAG_R5_BTCM_EN ? 1 : 0;
11521168af40SSuman Anna loczrama = cfg & PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE ? 1 : 0;
11537f402919SDevarsh Thakkar single_cpu = cfg & PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE ? 1 : 0;
11547f402919SDevarsh Thakkar lockstep_en = cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP ? 1 : 0;
11557f402919SDevarsh Thakkar
115651723657SDevarsh Thakkar if (single_cpu && mode != CLUSTER_MODE_SINGLECORE)
11577f402919SDevarsh Thakkar mode = CLUSTER_MODE_SINGLECPU;
11587f402919SDevarsh Thakkar if (lockstep_en)
11597f402919SDevarsh Thakkar mode = CLUSTER_MODE_LOCKSTEP;
11607f402919SDevarsh Thakkar
11611168af40SSuman Anna halted = ctrl & PROC_BOOT_CTRL_FLAG_R5_CORE_HALT;
11621168af40SSuman Anna
11631168af40SSuman Anna /*
11641168af40SSuman Anna * IPC-only mode detection requires both local and module resets to
11651168af40SSuman Anna * be deasserted and R5F core to be unhalted. Local reset status is
11661168af40SSuman Anna * irrelevant if module reset is asserted (POR value has local reset
11671168af40SSuman Anna * deasserted), and is deemed as remoteproc mode
11681168af40SSuman Anna */
11691168af40SSuman Anna if (c_state && !ret && !halted) {
11701168af40SSuman Anna dev_info(cdev, "configured R5F for IPC-only mode\n");
11711168af40SSuman Anna kproc->rproc->state = RPROC_DETACHED;
11721168af40SSuman Anna ret = 1;
11731168af40SSuman Anna /* override rproc ops with only required IPC-only mode ops */
11741168af40SSuman Anna kproc->rproc->ops->prepare = NULL;
11751168af40SSuman Anna kproc->rproc->ops->unprepare = NULL;
11761168af40SSuman Anna kproc->rproc->ops->start = NULL;
11771168af40SSuman Anna kproc->rproc->ops->stop = NULL;
11781168af40SSuman Anna kproc->rproc->ops->attach = k3_r5_rproc_attach;
11791168af40SSuman Anna kproc->rproc->ops->detach = k3_r5_rproc_detach;
11801168af40SSuman Anna kproc->rproc->ops->get_loaded_rsc_table =
11811168af40SSuman Anna k3_r5_get_loaded_rsc_table;
11821168af40SSuman Anna } else if (!c_state) {
11831168af40SSuman Anna dev_info(cdev, "configured R5F for remoteproc mode\n");
11841168af40SSuman Anna ret = 0;
11851168af40SSuman Anna } else {
11861168af40SSuman Anna dev_err(cdev, "mismatched mode: local_reset = %s, module_reset = %s, core_state = %s\n",
11871168af40SSuman Anna !ret ? "deasserted" : "asserted",
11881168af40SSuman Anna c_state ? "deasserted" : "asserted",
11891168af40SSuman Anna halted ? "halted" : "unhalted");
11901168af40SSuman Anna ret = -EINVAL;
11911168af40SSuman Anna }
11921168af40SSuman Anna
11931168af40SSuman Anna /* fixup TCMs, cluster & core flags to actual values in IPC-only mode */
11941168af40SSuman Anna if (ret > 0) {
11951168af40SSuman Anna if (core == core0)
11961168af40SSuman Anna cluster->mode = mode;
11971168af40SSuman Anna core->atcm_enable = atcm_enable;
11981168af40SSuman Anna core->btcm_enable = btcm_enable;
11991168af40SSuman Anna core->loczrama = loczrama;
12001168af40SSuman Anna core->mem[0].dev_addr = loczrama ? 0 : K3_R5_TCM_DEV_ADDR;
12011168af40SSuman Anna core->mem[1].dev_addr = loczrama ? K3_R5_TCM_DEV_ADDR : 0;
12021168af40SSuman Anna }
12031168af40SSuman Anna
12041168af40SSuman Anna return ret;
12051168af40SSuman Anna }
12061168af40SSuman Anna
k3_r5_cluster_rproc_init(struct platform_device * pdev)12076dedbd1dSSuman Anna static int k3_r5_cluster_rproc_init(struct platform_device *pdev)
12086dedbd1dSSuman Anna {
12096dedbd1dSSuman Anna struct k3_r5_cluster *cluster = platform_get_drvdata(pdev);
12106dedbd1dSSuman Anna struct device *dev = &pdev->dev;
12116dedbd1dSSuman Anna struct k3_r5_rproc *kproc;
12126dedbd1dSSuman Anna struct k3_r5_core *core, *core1;
12136dedbd1dSSuman Anna struct device *cdev;
12146dedbd1dSSuman Anna const char *fw_name;
12156dedbd1dSSuman Anna struct rproc *rproc;
12161168af40SSuman Anna int ret, ret1;
12176dedbd1dSSuman Anna
12186dedbd1dSSuman Anna core1 = list_last_entry(&cluster->cores, struct k3_r5_core, elem);
12196dedbd1dSSuman Anna list_for_each_entry(core, &cluster->cores, elem) {
12206dedbd1dSSuman Anna cdev = core->dev;
12216dedbd1dSSuman Anna ret = rproc_of_parse_firmware(cdev, 0, &fw_name);
12226dedbd1dSSuman Anna if (ret) {
12236dedbd1dSSuman Anna dev_err(dev, "failed to parse firmware-name property, ret = %d\n",
12246dedbd1dSSuman Anna ret);
12256dedbd1dSSuman Anna goto out;
12266dedbd1dSSuman Anna }
12276dedbd1dSSuman Anna
12286dedbd1dSSuman Anna rproc = rproc_alloc(cdev, dev_name(cdev), &k3_r5_rproc_ops,
12296dedbd1dSSuman Anna fw_name, sizeof(*kproc));
12306dedbd1dSSuman Anna if (!rproc) {
12316dedbd1dSSuman Anna ret = -ENOMEM;
12326dedbd1dSSuman Anna goto out;
12336dedbd1dSSuman Anna }
12346dedbd1dSSuman Anna
12356dedbd1dSSuman Anna /* K3 R5s have a Region Address Translator (RAT) but no MMU */
12366dedbd1dSSuman Anna rproc->has_iommu = false;
12376dedbd1dSSuman Anna /* error recovery is not supported at present */
12386dedbd1dSSuman Anna rproc->recovery_disabled = true;
12396dedbd1dSSuman Anna
12406dedbd1dSSuman Anna kproc = rproc->priv;
12416dedbd1dSSuman Anna kproc->cluster = cluster;
12426dedbd1dSSuman Anna kproc->core = core;
12436dedbd1dSSuman Anna kproc->dev = cdev;
12446dedbd1dSSuman Anna kproc->rproc = rproc;
12456dedbd1dSSuman Anna core->rproc = rproc;
12466dedbd1dSSuman Anna
12471168af40SSuman Anna ret = k3_r5_rproc_configure_mode(kproc);
12481168af40SSuman Anna if (ret < 0)
12491168af40SSuman Anna goto err_config;
12501168af40SSuman Anna if (ret)
12511168af40SSuman Anna goto init_rmem;
12521168af40SSuman Anna
12536dedbd1dSSuman Anna ret = k3_r5_rproc_configure(kproc);
12546dedbd1dSSuman Anna if (ret) {
12556dedbd1dSSuman Anna dev_err(dev, "initial configure failed, ret = %d\n",
12566dedbd1dSSuman Anna ret);
12576dedbd1dSSuman Anna goto err_config;
12586dedbd1dSSuman Anna }
12596dedbd1dSSuman Anna
12601168af40SSuman Anna init_rmem:
1261c3c21b35SSuman Anna k3_r5_adjust_tcm_sizes(kproc);
1262c3c21b35SSuman Anna
12636dedbd1dSSuman Anna ret = k3_r5_reserved_mem_init(kproc);
12646dedbd1dSSuman Anna if (ret) {
12656dedbd1dSSuman Anna dev_err(dev, "reserved memory init failed, ret = %d\n",
12666dedbd1dSSuman Anna ret);
12676dedbd1dSSuman Anna goto err_config;
12686dedbd1dSSuman Anna }
12696dedbd1dSSuman Anna
12706dedbd1dSSuman Anna ret = rproc_add(rproc);
12716dedbd1dSSuman Anna if (ret) {
12726dedbd1dSSuman Anna dev_err(dev, "rproc_add failed, ret = %d\n", ret);
12736dedbd1dSSuman Anna goto err_add;
12746dedbd1dSSuman Anna }
12756dedbd1dSSuman Anna
127651723657SDevarsh Thakkar /* create only one rproc in lockstep, single-cpu or
127751723657SDevarsh Thakkar * single core mode
127851723657SDevarsh Thakkar */
1279ee99ee7cSSuman Anna if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
128051723657SDevarsh Thakkar cluster->mode == CLUSTER_MODE_SINGLECPU ||
128151723657SDevarsh Thakkar cluster->mode == CLUSTER_MODE_SINGLECORE)
12826dedbd1dSSuman Anna break;
12836dedbd1dSSuman Anna }
12846dedbd1dSSuman Anna
12856dedbd1dSSuman Anna return 0;
12866dedbd1dSSuman Anna
12876dedbd1dSSuman Anna err_split:
12881168af40SSuman Anna if (rproc->state == RPROC_ATTACHED) {
12891168af40SSuman Anna ret1 = rproc_detach(rproc);
12901168af40SSuman Anna if (ret1) {
12911168af40SSuman Anna dev_err(kproc->dev, "failed to detach rproc, ret = %d\n",
12921168af40SSuman Anna ret1);
12931168af40SSuman Anna return ret1;
12941168af40SSuman Anna }
12951168af40SSuman Anna }
12961168af40SSuman Anna
12976dedbd1dSSuman Anna rproc_del(rproc);
12986dedbd1dSSuman Anna err_add:
12996dedbd1dSSuman Anna k3_r5_reserved_mem_exit(kproc);
13006dedbd1dSSuman Anna err_config:
13016dedbd1dSSuman Anna rproc_free(rproc);
13026dedbd1dSSuman Anna core->rproc = NULL;
13036dedbd1dSSuman Anna out:
13046dedbd1dSSuman Anna /* undo core0 upon any failures on core1 in split-mode */
13056dedbd1dSSuman Anna if (cluster->mode == CLUSTER_MODE_SPLIT && core == core1) {
13066dedbd1dSSuman Anna core = list_prev_entry(core, elem);
13076dedbd1dSSuman Anna rproc = core->rproc;
13086dedbd1dSSuman Anna kproc = rproc->priv;
13096dedbd1dSSuman Anna goto err_split;
13106dedbd1dSSuman Anna }
13116dedbd1dSSuman Anna return ret;
13126dedbd1dSSuman Anna }
13136dedbd1dSSuman Anna
k3_r5_cluster_rproc_exit(void * data)131423168229SArnd Bergmann static void k3_r5_cluster_rproc_exit(void *data)
13156dedbd1dSSuman Anna {
131623168229SArnd Bergmann struct k3_r5_cluster *cluster = platform_get_drvdata(data);
13176dedbd1dSSuman Anna struct k3_r5_rproc *kproc;
13186dedbd1dSSuman Anna struct k3_r5_core *core;
13196dedbd1dSSuman Anna struct rproc *rproc;
13201168af40SSuman Anna int ret;
13216dedbd1dSSuman Anna
13226dedbd1dSSuman Anna /*
1323ee99ee7cSSuman Anna * lockstep mode and single-cpu modes have only one rproc associated
1324ee99ee7cSSuman Anna * with first core, whereas split-mode has two rprocs associated with
1325ee99ee7cSSuman Anna * each core, and requires that core1 be powered down first
13266dedbd1dSSuman Anna */
1327ee99ee7cSSuman Anna core = (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
1328ee99ee7cSSuman Anna cluster->mode == CLUSTER_MODE_SINGLECPU) ?
13296dedbd1dSSuman Anna list_first_entry(&cluster->cores, struct k3_r5_core, elem) :
13306dedbd1dSSuman Anna list_last_entry(&cluster->cores, struct k3_r5_core, elem);
13316dedbd1dSSuman Anna
13326dedbd1dSSuman Anna list_for_each_entry_from_reverse(core, &cluster->cores, elem) {
13336dedbd1dSSuman Anna rproc = core->rproc;
13346dedbd1dSSuman Anna kproc = rproc->priv;
13356dedbd1dSSuman Anna
13361168af40SSuman Anna if (rproc->state == RPROC_ATTACHED) {
13371168af40SSuman Anna ret = rproc_detach(rproc);
13381168af40SSuman Anna if (ret) {
13391168af40SSuman Anna dev_err(kproc->dev, "failed to detach rproc, ret = %d\n", ret);
13401168af40SSuman Anna return;
13411168af40SSuman Anna }
13421168af40SSuman Anna }
13431168af40SSuman Anna
13446dedbd1dSSuman Anna rproc_del(rproc);
13456dedbd1dSSuman Anna
13466dedbd1dSSuman Anna k3_r5_reserved_mem_exit(kproc);
13476dedbd1dSSuman Anna
13486dedbd1dSSuman Anna rproc_free(rproc);
13496dedbd1dSSuman Anna core->rproc = NULL;
13506dedbd1dSSuman Anna }
13516dedbd1dSSuman Anna }
13526dedbd1dSSuman Anna
k3_r5_core_of_get_internal_memories(struct platform_device * pdev,struct k3_r5_core * core)13536dedbd1dSSuman Anna static int k3_r5_core_of_get_internal_memories(struct platform_device *pdev,
13546dedbd1dSSuman Anna struct k3_r5_core *core)
13556dedbd1dSSuman Anna {
13566dedbd1dSSuman Anna static const char * const mem_names[] = {"atcm", "btcm"};
13576dedbd1dSSuman Anna struct device *dev = &pdev->dev;
13586dedbd1dSSuman Anna struct resource *res;
13596dedbd1dSSuman Anna int num_mems;
13606dedbd1dSSuman Anna int i;
13616dedbd1dSSuman Anna
13626dedbd1dSSuman Anna num_mems = ARRAY_SIZE(mem_names);
13636dedbd1dSSuman Anna core->mem = devm_kcalloc(dev, num_mems, sizeof(*core->mem), GFP_KERNEL);
13646dedbd1dSSuman Anna if (!core->mem)
13656dedbd1dSSuman Anna return -ENOMEM;
13666dedbd1dSSuman Anna
13676dedbd1dSSuman Anna for (i = 0; i < num_mems; i++) {
13686dedbd1dSSuman Anna res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
13696dedbd1dSSuman Anna mem_names[i]);
13706dedbd1dSSuman Anna if (!res) {
13716dedbd1dSSuman Anna dev_err(dev, "found no memory resource for %s\n",
13726dedbd1dSSuman Anna mem_names[i]);
13736dedbd1dSSuman Anna return -EINVAL;
13746dedbd1dSSuman Anna }
13756dedbd1dSSuman Anna if (!devm_request_mem_region(dev, res->start,
13766dedbd1dSSuman Anna resource_size(res),
13776dedbd1dSSuman Anna dev_name(dev))) {
13786dedbd1dSSuman Anna dev_err(dev, "could not request %s region for resource\n",
13796dedbd1dSSuman Anna mem_names[i]);
13806dedbd1dSSuman Anna return -EBUSY;
13816dedbd1dSSuman Anna }
13826dedbd1dSSuman Anna
13836dedbd1dSSuman Anna /*
13846dedbd1dSSuman Anna * TCMs are designed in general to support RAM-like backing
13856dedbd1dSSuman Anna * memories. So, map these as Normal Non-Cached memories. This
13866dedbd1dSSuman Anna * also avoids/fixes any potential alignment faults due to
13876dedbd1dSSuman Anna * unaligned data accesses when using memcpy() or memset()
13886dedbd1dSSuman Anna * functions (normally seen with device type memory).
13896dedbd1dSSuman Anna */
13906dedbd1dSSuman Anna core->mem[i].cpu_addr = devm_ioremap_wc(dev, res->start,
13916dedbd1dSSuman Anna resource_size(res));
13926dedbd1dSSuman Anna if (!core->mem[i].cpu_addr) {
13936dedbd1dSSuman Anna dev_err(dev, "failed to map %s memory\n", mem_names[i]);
13946dedbd1dSSuman Anna return -ENOMEM;
13956dedbd1dSSuman Anna }
13966dedbd1dSSuman Anna core->mem[i].bus_addr = res->start;
13976dedbd1dSSuman Anna
13986dedbd1dSSuman Anna /*
13996dedbd1dSSuman Anna * TODO:
14006dedbd1dSSuman Anna * The R5F cores can place ATCM & BTCM anywhere in its address
14016dedbd1dSSuman Anna * based on the corresponding Region Registers in the System
14026dedbd1dSSuman Anna * Control coprocessor. For now, place ATCM and BTCM at
14036dedbd1dSSuman Anna * addresses 0 and 0x41010000 (same as the bus address on AM65x
14046dedbd1dSSuman Anna * SoCs) based on loczrama setting
14056dedbd1dSSuman Anna */
14066dedbd1dSSuman Anna if (!strcmp(mem_names[i], "atcm")) {
14076dedbd1dSSuman Anna core->mem[i].dev_addr = core->loczrama ?
14086dedbd1dSSuman Anna 0 : K3_R5_TCM_DEV_ADDR;
14096dedbd1dSSuman Anna } else {
14106dedbd1dSSuman Anna core->mem[i].dev_addr = core->loczrama ?
14116dedbd1dSSuman Anna K3_R5_TCM_DEV_ADDR : 0;
14126dedbd1dSSuman Anna }
14136dedbd1dSSuman Anna core->mem[i].size = resource_size(res);
14146dedbd1dSSuman Anna
14156dedbd1dSSuman Anna dev_dbg(dev, "memory %5s: bus addr %pa size 0x%zx va %pK da 0x%x\n",
14166dedbd1dSSuman Anna mem_names[i], &core->mem[i].bus_addr,
14176dedbd1dSSuman Anna core->mem[i].size, core->mem[i].cpu_addr,
14186dedbd1dSSuman Anna core->mem[i].dev_addr);
14196dedbd1dSSuman Anna }
14206dedbd1dSSuman Anna core->num_mems = num_mems;
14216dedbd1dSSuman Anna
14226dedbd1dSSuman Anna return 0;
14236dedbd1dSSuman Anna }
14246dedbd1dSSuman Anna
k3_r5_core_of_get_sram_memories(struct platform_device * pdev,struct k3_r5_core * core)1425ea47c688SSuman Anna static int k3_r5_core_of_get_sram_memories(struct platform_device *pdev,
1426ea47c688SSuman Anna struct k3_r5_core *core)
1427ea47c688SSuman Anna {
1428ea47c688SSuman Anna struct device_node *np = pdev->dev.of_node;
1429ea47c688SSuman Anna struct device *dev = &pdev->dev;
1430ea47c688SSuman Anna struct device_node *sram_np;
1431ea47c688SSuman Anna struct resource res;
1432ea47c688SSuman Anna int num_sram;
1433ea47c688SSuman Anna int i, ret;
1434ea47c688SSuman Anna
1435ea47c688SSuman Anna num_sram = of_property_count_elems_of_size(np, "sram", sizeof(phandle));
1436ea47c688SSuman Anna if (num_sram <= 0) {
1437ea47c688SSuman Anna dev_dbg(dev, "device does not use reserved on-chip memories, num_sram = %d\n",
1438ea47c688SSuman Anna num_sram);
1439ea47c688SSuman Anna return 0;
1440ea47c688SSuman Anna }
1441ea47c688SSuman Anna
1442ea47c688SSuman Anna core->sram = devm_kcalloc(dev, num_sram, sizeof(*core->sram), GFP_KERNEL);
1443ea47c688SSuman Anna if (!core->sram)
1444ea47c688SSuman Anna return -ENOMEM;
1445ea47c688SSuman Anna
1446ea47c688SSuman Anna for (i = 0; i < num_sram; i++) {
1447ea47c688SSuman Anna sram_np = of_parse_phandle(np, "sram", i);
1448ea47c688SSuman Anna if (!sram_np)
1449ea47c688SSuman Anna return -EINVAL;
1450ea47c688SSuman Anna
1451ea47c688SSuman Anna if (!of_device_is_available(sram_np)) {
1452ea47c688SSuman Anna of_node_put(sram_np);
1453ea47c688SSuman Anna return -EINVAL;
1454ea47c688SSuman Anna }
1455ea47c688SSuman Anna
1456ea47c688SSuman Anna ret = of_address_to_resource(sram_np, 0, &res);
1457ea47c688SSuman Anna of_node_put(sram_np);
1458ea47c688SSuman Anna if (ret)
1459ea47c688SSuman Anna return -EINVAL;
1460ea47c688SSuman Anna
1461ea47c688SSuman Anna core->sram[i].bus_addr = res.start;
1462ea47c688SSuman Anna core->sram[i].dev_addr = res.start;
1463ea47c688SSuman Anna core->sram[i].size = resource_size(&res);
1464ea47c688SSuman Anna core->sram[i].cpu_addr = devm_ioremap_wc(dev, res.start,
1465ea47c688SSuman Anna resource_size(&res));
1466ea47c688SSuman Anna if (!core->sram[i].cpu_addr) {
1467ea47c688SSuman Anna dev_err(dev, "failed to parse and map sram%d memory at %pad\n",
1468ea47c688SSuman Anna i, &res.start);
1469ea47c688SSuman Anna return -ENOMEM;
1470ea47c688SSuman Anna }
1471ea47c688SSuman Anna
1472ea47c688SSuman Anna dev_dbg(dev, "memory sram%d: bus addr %pa size 0x%zx va %pK da 0x%x\n",
1473ea47c688SSuman Anna i, &core->sram[i].bus_addr,
1474ea47c688SSuman Anna core->sram[i].size, core->sram[i].cpu_addr,
1475ea47c688SSuman Anna core->sram[i].dev_addr);
1476ea47c688SSuman Anna }
1477ea47c688SSuman Anna core->num_sram = num_sram;
1478ea47c688SSuman Anna
1479ea47c688SSuman Anna return 0;
1480ea47c688SSuman Anna }
1481ea47c688SSuman Anna
14826dedbd1dSSuman Anna static
k3_r5_core_of_get_tsp(struct device * dev,const struct ti_sci_handle * sci)14836dedbd1dSSuman Anna struct ti_sci_proc *k3_r5_core_of_get_tsp(struct device *dev,
14846dedbd1dSSuman Anna const struct ti_sci_handle *sci)
14856dedbd1dSSuman Anna {
14866dedbd1dSSuman Anna struct ti_sci_proc *tsp;
14876dedbd1dSSuman Anna u32 temp[2];
14886dedbd1dSSuman Anna int ret;
14896dedbd1dSSuman Anna
14906dedbd1dSSuman Anna ret = of_property_read_u32_array(dev_of_node(dev), "ti,sci-proc-ids",
14916dedbd1dSSuman Anna temp, 2);
14926dedbd1dSSuman Anna if (ret < 0)
14936dedbd1dSSuman Anna return ERR_PTR(ret);
14946dedbd1dSSuman Anna
14956dedbd1dSSuman Anna tsp = devm_kzalloc(dev, sizeof(*tsp), GFP_KERNEL);
14966dedbd1dSSuman Anna if (!tsp)
14976dedbd1dSSuman Anna return ERR_PTR(-ENOMEM);
14986dedbd1dSSuman Anna
14996dedbd1dSSuman Anna tsp->dev = dev;
15006dedbd1dSSuman Anna tsp->sci = sci;
15016dedbd1dSSuman Anna tsp->ops = &sci->ops.proc_ops;
15026dedbd1dSSuman Anna tsp->proc_id = temp[0];
15036dedbd1dSSuman Anna tsp->host_id = temp[1];
15046dedbd1dSSuman Anna
15056dedbd1dSSuman Anna return tsp;
15066dedbd1dSSuman Anna }
15076dedbd1dSSuman Anna
k3_r5_core_of_init(struct platform_device * pdev)15086dedbd1dSSuman Anna static int k3_r5_core_of_init(struct platform_device *pdev)
15096dedbd1dSSuman Anna {
15106dedbd1dSSuman Anna struct device *dev = &pdev->dev;
15116dedbd1dSSuman Anna struct device_node *np = dev_of_node(dev);
15126dedbd1dSSuman Anna struct k3_r5_core *core;
15136dedbd1dSSuman Anna int ret;
15146dedbd1dSSuman Anna
15156dedbd1dSSuman Anna if (!devres_open_group(dev, k3_r5_core_of_init, GFP_KERNEL))
15166dedbd1dSSuman Anna return -ENOMEM;
15176dedbd1dSSuman Anna
15186dedbd1dSSuman Anna core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL);
15196dedbd1dSSuman Anna if (!core) {
15206dedbd1dSSuman Anna ret = -ENOMEM;
15216dedbd1dSSuman Anna goto err;
15226dedbd1dSSuman Anna }
15236dedbd1dSSuman Anna
15246dedbd1dSSuman Anna core->dev = dev;
15256dedbd1dSSuman Anna /*
15266dedbd1dSSuman Anna * Use SoC Power-on-Reset values as default if no DT properties are
15276dedbd1dSSuman Anna * used to dictate the TCM configurations
15286dedbd1dSSuman Anna */
15296dedbd1dSSuman Anna core->atcm_enable = 0;
15306dedbd1dSSuman Anna core->btcm_enable = 1;
15316dedbd1dSSuman Anna core->loczrama = 1;
15326dedbd1dSSuman Anna
15336dedbd1dSSuman Anna ret = of_property_read_u32(np, "ti,atcm-enable", &core->atcm_enable);
15346dedbd1dSSuman Anna if (ret < 0 && ret != -EINVAL) {
15356dedbd1dSSuman Anna dev_err(dev, "invalid format for ti,atcm-enable, ret = %d\n",
15366dedbd1dSSuman Anna ret);
15376dedbd1dSSuman Anna goto err;
15386dedbd1dSSuman Anna }
15396dedbd1dSSuman Anna
15406dedbd1dSSuman Anna ret = of_property_read_u32(np, "ti,btcm-enable", &core->btcm_enable);
15416dedbd1dSSuman Anna if (ret < 0 && ret != -EINVAL) {
15426dedbd1dSSuman Anna dev_err(dev, "invalid format for ti,btcm-enable, ret = %d\n",
15436dedbd1dSSuman Anna ret);
15446dedbd1dSSuman Anna goto err;
15456dedbd1dSSuman Anna }
15466dedbd1dSSuman Anna
15476dedbd1dSSuman Anna ret = of_property_read_u32(np, "ti,loczrama", &core->loczrama);
15486dedbd1dSSuman Anna if (ret < 0 && ret != -EINVAL) {
15496dedbd1dSSuman Anna dev_err(dev, "invalid format for ti,loczrama, ret = %d\n", ret);
15506dedbd1dSSuman Anna goto err;
15516dedbd1dSSuman Anna }
15526dedbd1dSSuman Anna
15536dedbd1dSSuman Anna core->ti_sci = devm_ti_sci_get_by_phandle(dev, "ti,sci");
15546dedbd1dSSuman Anna if (IS_ERR(core->ti_sci)) {
15556dedbd1dSSuman Anna ret = PTR_ERR(core->ti_sci);
15566dedbd1dSSuman Anna if (ret != -EPROBE_DEFER) {
15576dedbd1dSSuman Anna dev_err(dev, "failed to get ti-sci handle, ret = %d\n",
15586dedbd1dSSuman Anna ret);
15596dedbd1dSSuman Anna }
15606dedbd1dSSuman Anna core->ti_sci = NULL;
15616dedbd1dSSuman Anna goto err;
15626dedbd1dSSuman Anna }
15636dedbd1dSSuman Anna
15646dedbd1dSSuman Anna ret = of_property_read_u32(np, "ti,sci-dev-id", &core->ti_sci_id);
15656dedbd1dSSuman Anna if (ret) {
15666dedbd1dSSuman Anna dev_err(dev, "missing 'ti,sci-dev-id' property\n");
15676dedbd1dSSuman Anna goto err;
15686dedbd1dSSuman Anna }
15696dedbd1dSSuman Anna
15706dedbd1dSSuman Anna core->reset = devm_reset_control_get_exclusive(dev, NULL);
15716dedbd1dSSuman Anna if (IS_ERR_OR_NULL(core->reset)) {
15726dedbd1dSSuman Anna ret = PTR_ERR_OR_ZERO(core->reset);
15736dedbd1dSSuman Anna if (!ret)
15746dedbd1dSSuman Anna ret = -ENODEV;
15756dedbd1dSSuman Anna if (ret != -EPROBE_DEFER) {
15766dedbd1dSSuman Anna dev_err(dev, "failed to get reset handle, ret = %d\n",
15776dedbd1dSSuman Anna ret);
15786dedbd1dSSuman Anna }
15796dedbd1dSSuman Anna goto err;
15806dedbd1dSSuman Anna }
15816dedbd1dSSuman Anna
15826dedbd1dSSuman Anna core->tsp = k3_r5_core_of_get_tsp(dev, core->ti_sci);
15836dedbd1dSSuman Anna if (IS_ERR(core->tsp)) {
158434c4da6dSChristophe JAILLET ret = PTR_ERR(core->tsp);
15856dedbd1dSSuman Anna dev_err(dev, "failed to construct ti-sci proc control, ret = %d\n",
15866dedbd1dSSuman Anna ret);
15876dedbd1dSSuman Anna goto err;
15886dedbd1dSSuman Anna }
15896dedbd1dSSuman Anna
15906dedbd1dSSuman Anna ret = k3_r5_core_of_get_internal_memories(pdev, core);
15916dedbd1dSSuman Anna if (ret) {
15926dedbd1dSSuman Anna dev_err(dev, "failed to get internal memories, ret = %d\n",
15936dedbd1dSSuman Anna ret);
15946dedbd1dSSuman Anna goto err;
15956dedbd1dSSuman Anna }
15966dedbd1dSSuman Anna
1597ea47c688SSuman Anna ret = k3_r5_core_of_get_sram_memories(pdev, core);
1598ea47c688SSuman Anna if (ret) {
1599ea47c688SSuman Anna dev_err(dev, "failed to get sram memories, ret = %d\n", ret);
1600ea47c688SSuman Anna goto err;
1601ea47c688SSuman Anna }
1602ea47c688SSuman Anna
16036dedbd1dSSuman Anna ret = ti_sci_proc_request(core->tsp);
16046dedbd1dSSuman Anna if (ret < 0) {
16056dedbd1dSSuman Anna dev_err(dev, "ti_sci_proc_request failed, ret = %d\n", ret);
16066dedbd1dSSuman Anna goto err;
16076dedbd1dSSuman Anna }
16086dedbd1dSSuman Anna
16096dedbd1dSSuman Anna platform_set_drvdata(pdev, core);
16106dedbd1dSSuman Anna devres_close_group(dev, k3_r5_core_of_init);
16116dedbd1dSSuman Anna
16126dedbd1dSSuman Anna return 0;
16136dedbd1dSSuman Anna
16146dedbd1dSSuman Anna err:
16156dedbd1dSSuman Anna devres_release_group(dev, k3_r5_core_of_init);
16166dedbd1dSSuman Anna return ret;
16176dedbd1dSSuman Anna }
16186dedbd1dSSuman Anna
16196dedbd1dSSuman Anna /*
16206dedbd1dSSuman Anna * free the resources explicitly since driver model is not being used
16216dedbd1dSSuman Anna * for the child R5F devices
16226dedbd1dSSuman Anna */
k3_r5_core_of_exit(struct platform_device * pdev)16236dedbd1dSSuman Anna static void k3_r5_core_of_exit(struct platform_device *pdev)
16246dedbd1dSSuman Anna {
16256dedbd1dSSuman Anna struct k3_r5_core *core = platform_get_drvdata(pdev);
16266dedbd1dSSuman Anna struct device *dev = &pdev->dev;
16276dedbd1dSSuman Anna int ret;
16286dedbd1dSSuman Anna
16296dedbd1dSSuman Anna ret = ti_sci_proc_release(core->tsp);
16306dedbd1dSSuman Anna if (ret)
16316dedbd1dSSuman Anna dev_err(dev, "failed to release proc, ret = %d\n", ret);
16326dedbd1dSSuman Anna
16336dedbd1dSSuman Anna platform_set_drvdata(pdev, NULL);
16346dedbd1dSSuman Anna devres_release_group(dev, k3_r5_core_of_init);
16356dedbd1dSSuman Anna }
16366dedbd1dSSuman Anna
k3_r5_cluster_of_exit(void * data)163723168229SArnd Bergmann static void k3_r5_cluster_of_exit(void *data)
16386dedbd1dSSuman Anna {
163923168229SArnd Bergmann struct k3_r5_cluster *cluster = platform_get_drvdata(data);
16406dedbd1dSSuman Anna struct platform_device *cpdev;
16416dedbd1dSSuman Anna struct k3_r5_core *core, *temp;
16426dedbd1dSSuman Anna
16436dedbd1dSSuman Anna list_for_each_entry_safe_reverse(core, temp, &cluster->cores, elem) {
16446dedbd1dSSuman Anna list_del(&core->elem);
16456dedbd1dSSuman Anna cpdev = to_platform_device(core->dev);
16466dedbd1dSSuman Anna k3_r5_core_of_exit(cpdev);
16476dedbd1dSSuman Anna }
16486dedbd1dSSuman Anna }
16496dedbd1dSSuman Anna
k3_r5_cluster_of_init(struct platform_device * pdev)16506dedbd1dSSuman Anna static int k3_r5_cluster_of_init(struct platform_device *pdev)
16516dedbd1dSSuman Anna {
16526dedbd1dSSuman Anna struct k3_r5_cluster *cluster = platform_get_drvdata(pdev);
16536dedbd1dSSuman Anna struct device *dev = &pdev->dev;
16546dedbd1dSSuman Anna struct device_node *np = dev_of_node(dev);
16556dedbd1dSSuman Anna struct platform_device *cpdev;
16566dedbd1dSSuman Anna struct device_node *child;
16576dedbd1dSSuman Anna struct k3_r5_core *core;
16586dedbd1dSSuman Anna int ret;
16596dedbd1dSSuman Anna
16606dedbd1dSSuman Anna for_each_available_child_of_node(np, child) {
16616dedbd1dSSuman Anna cpdev = of_find_device_by_node(child);
16626dedbd1dSSuman Anna if (!cpdev) {
16636dedbd1dSSuman Anna ret = -ENODEV;
16646dedbd1dSSuman Anna dev_err(dev, "could not get R5 core platform device\n");
1665fa220c05SMiaoqian Lin of_node_put(child);
16666dedbd1dSSuman Anna goto fail;
16676dedbd1dSSuman Anna }
16686dedbd1dSSuman Anna
16696dedbd1dSSuman Anna ret = k3_r5_core_of_init(cpdev);
16706dedbd1dSSuman Anna if (ret) {
16716dedbd1dSSuman Anna dev_err(dev, "k3_r5_core_of_init failed, ret = %d\n",
16726dedbd1dSSuman Anna ret);
16736dedbd1dSSuman Anna put_device(&cpdev->dev);
1674fa220c05SMiaoqian Lin of_node_put(child);
16756dedbd1dSSuman Anna goto fail;
16766dedbd1dSSuman Anna }
16776dedbd1dSSuman Anna
16786dedbd1dSSuman Anna core = platform_get_drvdata(cpdev);
16796dedbd1dSSuman Anna put_device(&cpdev->dev);
16806dedbd1dSSuman Anna list_add_tail(&core->elem, &cluster->cores);
16816dedbd1dSSuman Anna }
16826dedbd1dSSuman Anna
16836dedbd1dSSuman Anna return 0;
16846dedbd1dSSuman Anna
16856dedbd1dSSuman Anna fail:
16866dedbd1dSSuman Anna k3_r5_cluster_of_exit(pdev);
16876dedbd1dSSuman Anna return ret;
16886dedbd1dSSuman Anna }
16896dedbd1dSSuman Anna
k3_r5_probe(struct platform_device * pdev)16906dedbd1dSSuman Anna static int k3_r5_probe(struct platform_device *pdev)
16916dedbd1dSSuman Anna {
16926dedbd1dSSuman Anna struct device *dev = &pdev->dev;
16936dedbd1dSSuman Anna struct device_node *np = dev_of_node(dev);
16946dedbd1dSSuman Anna struct k3_r5_cluster *cluster;
16957508ea19SSuman Anna const struct k3_r5_soc_data *data;
16966dedbd1dSSuman Anna int ret;
16976dedbd1dSSuman Anna int num_cores;
16986dedbd1dSSuman Anna
16997508ea19SSuman Anna data = of_device_get_match_data(&pdev->dev);
17007508ea19SSuman Anna if (!data) {
17017508ea19SSuman Anna dev_err(dev, "SoC-specific data is not defined\n");
17027508ea19SSuman Anna return -ENODEV;
17037508ea19SSuman Anna }
17047508ea19SSuman Anna
17056dedbd1dSSuman Anna cluster = devm_kzalloc(dev, sizeof(*cluster), GFP_KERNEL);
17066dedbd1dSSuman Anna if (!cluster)
17076dedbd1dSSuman Anna return -ENOMEM;
17086dedbd1dSSuman Anna
17096dedbd1dSSuman Anna cluster->dev = dev;
17107508ea19SSuman Anna cluster->soc_data = data;
17116dedbd1dSSuman Anna INIT_LIST_HEAD(&cluster->cores);
17126dedbd1dSSuman Anna
17136dedbd1dSSuman Anna ret = of_property_read_u32(np, "ti,cluster-mode", &cluster->mode);
17146dedbd1dSSuman Anna if (ret < 0 && ret != -EINVAL) {
17156dedbd1dSSuman Anna dev_err(dev, "invalid format for ti,cluster-mode, ret = %d\n",
17166dedbd1dSSuman Anna ret);
17176dedbd1dSSuman Anna return ret;
17186dedbd1dSSuman Anna }
17196dedbd1dSSuman Anna
17207f402919SDevarsh Thakkar if (ret == -EINVAL) {
17217f402919SDevarsh Thakkar /*
17227f402919SDevarsh Thakkar * default to most common efuse configurations - Split-mode on AM64x
17237f402919SDevarsh Thakkar * and LockStep-mode on all others
172451723657SDevarsh Thakkar * default to most common efuse configurations -
172551723657SDevarsh Thakkar * Split-mode on AM64x
172651723657SDevarsh Thakkar * Single core on AM62x
172751723657SDevarsh Thakkar * LockStep-mode on all others
17287f402919SDevarsh Thakkar */
172951723657SDevarsh Thakkar if (!data->is_single_core)
17307f402919SDevarsh Thakkar cluster->mode = data->single_cpu_mode ?
17317f402919SDevarsh Thakkar CLUSTER_MODE_SPLIT : CLUSTER_MODE_LOCKSTEP;
173251723657SDevarsh Thakkar else
173351723657SDevarsh Thakkar cluster->mode = CLUSTER_MODE_SINGLECORE;
17347f402919SDevarsh Thakkar }
17357f402919SDevarsh Thakkar
173651723657SDevarsh Thakkar if ((cluster->mode == CLUSTER_MODE_SINGLECPU && !data->single_cpu_mode) ||
173751723657SDevarsh Thakkar (cluster->mode == CLUSTER_MODE_SINGLECORE && !data->is_single_core)) {
17387f402919SDevarsh Thakkar dev_err(dev, "Cluster mode = %d is not supported on this SoC\n", cluster->mode);
17397f402919SDevarsh Thakkar return -EINVAL;
17407f402919SDevarsh Thakkar }
17417f402919SDevarsh Thakkar
17426dedbd1dSSuman Anna num_cores = of_get_available_child_count(np);
174351723657SDevarsh Thakkar if (num_cores != 2 && !data->is_single_core) {
174451723657SDevarsh Thakkar dev_err(dev, "MCU cluster requires both R5F cores to be enabled but num_cores is set to = %d\n",
174551723657SDevarsh Thakkar num_cores);
174651723657SDevarsh Thakkar return -ENODEV;
174751723657SDevarsh Thakkar }
174851723657SDevarsh Thakkar
174951723657SDevarsh Thakkar if (num_cores != 1 && data->is_single_core) {
175051723657SDevarsh Thakkar dev_err(dev, "SoC supports only single core R5 but num_cores is set to %d\n",
17516dedbd1dSSuman Anna num_cores);
17526dedbd1dSSuman Anna return -ENODEV;
17536dedbd1dSSuman Anna }
17546dedbd1dSSuman Anna
17556dedbd1dSSuman Anna platform_set_drvdata(pdev, cluster);
17566dedbd1dSSuman Anna
17576dedbd1dSSuman Anna ret = devm_of_platform_populate(dev);
17586dedbd1dSSuman Anna if (ret) {
17596dedbd1dSSuman Anna dev_err(dev, "devm_of_platform_populate failed, ret = %d\n",
17606dedbd1dSSuman Anna ret);
17616dedbd1dSSuman Anna return ret;
17626dedbd1dSSuman Anna }
17636dedbd1dSSuman Anna
17646dedbd1dSSuman Anna ret = k3_r5_cluster_of_init(pdev);
17656dedbd1dSSuman Anna if (ret) {
17666dedbd1dSSuman Anna dev_err(dev, "k3_r5_cluster_of_init failed, ret = %d\n", ret);
17676dedbd1dSSuman Anna return ret;
17686dedbd1dSSuman Anna }
17696dedbd1dSSuman Anna
177023168229SArnd Bergmann ret = devm_add_action_or_reset(dev, k3_r5_cluster_of_exit, pdev);
17716dedbd1dSSuman Anna if (ret)
17726dedbd1dSSuman Anna return ret;
17736dedbd1dSSuman Anna
17746dedbd1dSSuman Anna ret = k3_r5_cluster_rproc_init(pdev);
17756dedbd1dSSuman Anna if (ret) {
17766dedbd1dSSuman Anna dev_err(dev, "k3_r5_cluster_rproc_init failed, ret = %d\n",
17776dedbd1dSSuman Anna ret);
17786dedbd1dSSuman Anna return ret;
17796dedbd1dSSuman Anna }
17806dedbd1dSSuman Anna
178123168229SArnd Bergmann ret = devm_add_action_or_reset(dev, k3_r5_cluster_rproc_exit, pdev);
17826dedbd1dSSuman Anna if (ret)
17836dedbd1dSSuman Anna return ret;
17846dedbd1dSSuman Anna
17856dedbd1dSSuman Anna return 0;
17866dedbd1dSSuman Anna }
17876dedbd1dSSuman Anna
17887508ea19SSuman Anna static const struct k3_r5_soc_data am65_j721e_soc_data = {
1789c3c21b35SSuman Anna .tcm_is_double = false,
17907508ea19SSuman Anna .tcm_ecc_autoinit = false,
1791ee99ee7cSSuman Anna .single_cpu_mode = false,
179251723657SDevarsh Thakkar .is_single_core = false,
17937508ea19SSuman Anna };
17947508ea19SSuman Anna
1795b20dc021SHari Nagalla static const struct k3_r5_soc_data j7200_j721s2_soc_data = {
1796c3c21b35SSuman Anna .tcm_is_double = true,
17977508ea19SSuman Anna .tcm_ecc_autoinit = true,
1798ee99ee7cSSuman Anna .single_cpu_mode = false,
179951723657SDevarsh Thakkar .is_single_core = false,
1800ee99ee7cSSuman Anna };
1801ee99ee7cSSuman Anna
1802ee99ee7cSSuman Anna static const struct k3_r5_soc_data am64_soc_data = {
1803ee99ee7cSSuman Anna .tcm_is_double = true,
1804ee99ee7cSSuman Anna .tcm_ecc_autoinit = true,
1805ee99ee7cSSuman Anna .single_cpu_mode = true,
180651723657SDevarsh Thakkar .is_single_core = false,
180751723657SDevarsh Thakkar };
180851723657SDevarsh Thakkar
180951723657SDevarsh Thakkar static const struct k3_r5_soc_data am62_soc_data = {
181051723657SDevarsh Thakkar .tcm_is_double = false,
181151723657SDevarsh Thakkar .tcm_ecc_autoinit = true,
181251723657SDevarsh Thakkar .single_cpu_mode = false,
181351723657SDevarsh Thakkar .is_single_core = true,
18147508ea19SSuman Anna };
18157508ea19SSuman Anna
18166dedbd1dSSuman Anna static const struct of_device_id k3_r5_of_match[] = {
18177508ea19SSuman Anna { .compatible = "ti,am654-r5fss", .data = &am65_j721e_soc_data, },
18187508ea19SSuman Anna { .compatible = "ti,j721e-r5fss", .data = &am65_j721e_soc_data, },
1819b20dc021SHari Nagalla { .compatible = "ti,j7200-r5fss", .data = &j7200_j721s2_soc_data, },
1820ee99ee7cSSuman Anna { .compatible = "ti,am64-r5fss", .data = &am64_soc_data, },
182151723657SDevarsh Thakkar { .compatible = "ti,am62-r5fss", .data = &am62_soc_data, },
1822b20dc021SHari Nagalla { .compatible = "ti,j721s2-r5fss", .data = &j7200_j721s2_soc_data, },
18236dedbd1dSSuman Anna { /* sentinel */ },
18246dedbd1dSSuman Anna };
18256dedbd1dSSuman Anna MODULE_DEVICE_TABLE(of, k3_r5_of_match);
18266dedbd1dSSuman Anna
18276dedbd1dSSuman Anna static struct platform_driver k3_r5_rproc_driver = {
18286dedbd1dSSuman Anna .probe = k3_r5_probe,
18296dedbd1dSSuman Anna .driver = {
18306dedbd1dSSuman Anna .name = "k3_r5_rproc",
18316dedbd1dSSuman Anna .of_match_table = k3_r5_of_match,
18326dedbd1dSSuman Anna },
18336dedbd1dSSuman Anna };
18346dedbd1dSSuman Anna
18356dedbd1dSSuman Anna module_platform_driver(k3_r5_rproc_driver);
18366dedbd1dSSuman Anna
18376dedbd1dSSuman Anna MODULE_LICENSE("GPL v2");
18386dedbd1dSSuman Anna MODULE_DESCRIPTION("TI K3 R5F remote processor driver");
18396dedbd1dSSuman Anna MODULE_AUTHOR("Suman Anna <s-anna@ti.com>");
1840