/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | renesas,usb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car generation 3 USB 2.0 PHY 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 15 - items: 16 - const: renesas,usb2-phy-r8a77470 # RZ/G1C 18 - items: 19 - enum: [all …]
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H A D | renesas,usb3-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/renesas,usb3-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car generation 3 USB 3.0 PHY 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 15 - enum: 16 - renesas,r8a774a1-usb3-phy # RZ/G2M 17 - renesas,r8a774b1-usb3-phy # RZ/G2N 18 - renesas,r8a774e1-usb3-phy # RZ/G2H [all …]
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/openbmc/linux/drivers/phy/renesas/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PHY_R8A779F0_ETHERNET_SERDES) += r8a779f0-ether-serdes.o 3 obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o 4 obj-$(CONFIG_PHY_RCAR_GEN3_PCIE) += phy-rcar-gen3-pcie.o 5 obj-$(CONFIG_PHY_RCAR_GEN3_USB2) += phy-rcar-gen3-usb2.o 6 obj-$(CONFIG_PHY_RCAR_GEN3_USB3) += phy-rcar-gen3-usb3.o
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H A D | phy-rcar-gen3-usb2.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Renesas R-Car Gen3 for USB2.0 PHY driver 5 * Copyright (C) 2015-2017 Renesas Electronics Corporation 7 * This is based on the phy-rcar-gen2 driver: 12 #include <linux/extcon-provider.h> 18 #include <linux/phy/phy.h> 26 /******* USB2.0 Host registers (original offset is +0x200) *******/ 100 struct phy *phy; member 135 * ---------------------+---------------++--------------+------------ 146 if (ch->extcon_host) { in rcar_gen3_phy_usb2_work() [all …]
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/openbmc/u-boot/drivers/phy/ |
H A D | phy-rcar-gen3.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Renesas RCar Gen3 USB PHY driver 13 #include <generic-phy.h> 21 /* USB2.0 Host registers (original offset is +0x200) */ 58 static int rcar_gen3_phy_phy_init(struct phy *phy) in rcar_gen3_phy_phy_init() argument 60 struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); in rcar_gen3_phy_phy_init() 62 /* Initialize USB2 part */ in rcar_gen3_phy_phy_init() 63 writel(0, priv->regs + USB2_INT_ENABLE); in rcar_gen3_phy_phy_init() 64 writel(USB2_SPD_RSM_TIMSET_INIT, priv->regs + USB2_SPD_RSM_TIMSET); in rcar_gen3_phy_phy_init() 65 writel(USB2_OC_TIMSET_INIT, priv->regs + USB2_OC_TIMSET); in rcar_gen3_phy_phy_init() [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0+ 3 # Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 4 # Written by Jean-Jacques Hiblot <jjhiblot@ti.com> 6 obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o 7 obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o 8 obj-$(CONFIG_BCM6318_USBH_PHY) += bcm6318-usbh-phy.o 9 obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o 10 obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o 11 obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o 12 obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | r8a77990.dtsi | 1 /* SPDX-License-Identifier: GPL-2.0 */ 8 #include <dt-bindings/clock/renesas-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77990-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 18 #address-cells = <1>; 19 #size-cells = <0>; 22 compatible = "arm,cortex-a53", "arm,armv8"; 25 power-domains = <&sysc 5>; [all …]
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H A D | r8a7795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a7795-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 42 compatible = "fixed-clock"; [all …]
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H A D | r8a77965.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/r8a77965-sysc.h> 19 #address-cells = <2>; 20 #size-cells = <2>; 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 45 compatible = "fixed-clock"; [all …]
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H A D | r8a77995.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/r8a77995-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 18 /* External CAN clock - to be overridden by boards that provide it */ 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; 22 clock-frequency = <0>; [all …]
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H A D | r8a7796.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a7796-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | r8a77951.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car H3 (R8A77951) SoC 8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a7795-sysc.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; [all …]
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H A D | r8a774b1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774b1-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; [all …]
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H A D | r8a774a1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774a1-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; [all …]
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H A D | r8a774e1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774e1-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; [all …]
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H A D | r8a77965.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/r8a77965-sysc.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; [all …]
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H A D | r8a77961.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77961-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; [all …]
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H A D | r8a77960.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a7796-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; [all …]
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H A D | r8a77995.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car D3 (R8A77995) SoC 9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/r8a77995-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; [all …]
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H A D | r8a774c0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a774c0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; [all …]
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H A D | r8a77990.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77990-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; [all …]
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H A D | r9a07g043.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/clock/r9a07g043-cpg.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 15 audio_clk1: audio1-clk { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 19 clock-frequency = <0>; 22 audio_clk2: audio2-clk { 23 compatible = "fixed-clock"; [all …]
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H A D | r9a07g054.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g054-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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H A D | r9a07g044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g044-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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/openbmc/linux/arch/arm/boot/dts/renesas/ |
H A D | r7s9210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r7s9210-cpg-mssr.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 20 #clock-cells = <0>; 21 compatible = "fixed-clock"; 23 clock-frequency = <0>; 27 #clock-cells = <0>; [all …]
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