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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Drenesas,rcar-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/renesas,rcar-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car remote processor controller
10 - Julien Massot <julien.massot@iot.bzh>
14 boots firmwares on the Renesas R-Car family chipset.
15 R-Car gen3 family may have a realtime processor, this processor shares peripheral
20 const: renesas,rcar-cr7
25 power-domains:
[all …]
/openbmc/linux/drivers/pmdomain/renesas/
H A Dr8a77965-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car M3-N System Controller
6 * Based on Renesas R-Car M3-W System Controller
13 #include <dt-bindings/power/r8a77965-sysc.h>
15 #include "rcar-sysc.h"
18 { "always-on", 0, 0, R8A77965_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
19 { "ca57-scu", 0x1c0, 0, R8A77965_PD_CA57_SCU, R8A77965_PD_ALWAYS_ON,
21 { "ca57-cpu0", 0x80, 0, R8A77965_PD_CA57_CPU0, R8A77965_PD_CA57_SCU,
23 { "ca57-cpu1", 0x80, 1, R8A77965_PD_CA57_CPU1, R8A77965_PD_CA57_SCU,
25 { "cr7", 0x240, 0, R8A77965_PD_CR7, R8A77965_PD_ALWAYS_ON },
[all …]
H A Dr8a77990-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car E3 System Controller
12 #include <dt-bindings/power/r8a77990-sysc.h>
14 #include "rcar-sysc.h"
17 { "always-on", 0, 0, R8A77990_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
18 { "ca53-scu", 0x140, 0, R8A77990_PD_CA53_SCU, R8A77990_PD_ALWAYS_ON,
20 { "ca53-cpu0", 0x200, 0, R8A77990_PD_CA53_CPU0, R8A77990_PD_CA53_SCU,
22 { "ca53-cpu1", 0x200, 1, R8A77990_PD_CA53_CPU1, R8A77990_PD_CA53_SCU,
24 { "cr7", 0x240, 0, R8A77990_PD_CR7, R8A77990_PD_ALWAYS_ON },
27 { "3dg-a", 0x100, 0, R8A77990_PD_3DG_A, R8A77990_PD_ALWAYS_ON },
[all …]
H A Dr8a7796-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car M3-W/W+ System Controller
6 * Copyright (C) 2018-2019 Renesas Electronics Corporation
12 #include <dt-bindings/power/r8a7796-sysc.h>
14 #include "rcar-sysc.h"
17 { "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
18 { "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
20 { "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
22 { "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
24 { "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON,
[all …]
H A Dr8a77980-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car V3H System Controller
12 #include <dt-bindings/power/r8a77980-sysc.h>
14 #include "rcar-sysc.h"
17 { "always-on", 0, 0, R8A77980_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
18 { "ca53-scu", 0x140, 0, R8A77980_PD_CA53_SCU, R8A77980_PD_ALWAYS_ON,
20 { "ca53-cpu0", 0x200, 0, R8A77980_PD_CA53_CPU0, R8A77980_PD_CA53_SCU,
22 { "ca53-cpu1", 0x200, 1, R8A77980_PD_CA53_CPU1, R8A77980_PD_CA53_SCU,
24 { "ca53-cpu2", 0x200, 2, R8A77980_PD_CA53_CPU2, R8A77980_PD_CA53_SCU,
26 { "ca53-cpu3", 0x200, 3, R8A77980_PD_CA53_CPU3, R8A77980_PD_CA53_SCU,
[all …]
H A Dr8a7795-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car H3 System Controller
5 * Copyright (C) 2016-2017 Glider bvba
12 #include <dt-bindings/power/r8a7795-sysc.h>
14 #include "rcar-sysc.h"
17 { "always-on", 0, 0, R8A7795_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
18 { "ca57-scu", 0x1c0, 0, R8A7795_PD_CA57_SCU, R8A7795_PD_ALWAYS_ON,
20 { "ca57-cpu0", 0x80, 0, R8A7795_PD_CA57_CPU0, R8A7795_PD_CA57_SCU,
22 { "ca57-cpu1", 0x80, 1, R8A7795_PD_CA57_CPU1, R8A7795_PD_CA57_SCU,
24 { "ca57-cpu2", 0x80, 2, R8A7795_PD_CA57_CPU2, R8A7795_PD_CA57_SCU,
[all …]
/openbmc/linux/drivers/remoteproc/
H A Drcar_rproc.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/soc/renesas/rcar-rst.h>
25 struct device *dev = &rproc->dev; in rcar_rproc_mem_alloc()
28 dev_dbg(dev, "map memory: %pa+%zx\n", &mem->dma, mem->len); in rcar_rproc_mem_alloc()
29 va = ioremap_wc(mem->dma, mem->len); in rcar_rproc_mem_alloc()
32 &mem->dma, mem->len); in rcar_rproc_mem_alloc()
33 return -ENOMEM; in rcar_rproc_mem_alloc()
37 mem->va = va; in rcar_rproc_mem_alloc()
45 dev_dbg(&rproc->dev, "unmap memory: %pa\n", &mem->dma); in rcar_rproc_mem_release()
46 iounmap(mem->va); in rcar_rproc_mem_release()
[all …]
/openbmc/u-boot/board/renesas/koelsch/
H A Dkoelsch_spl.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/mach-types.h>
18 #include <asm/arch/rcar-mstp.h>
54 /* ICIALLU - Invalidate I$ to PoU */ in spl_init_sys()
55 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
56 /* BPIALL - Invalidate branch predictors */ in spl_init_sys()
57 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
366 /* Unknown, likely ES1.0-specific delay */ in board_init_f()
376 /* UART clocks enabled and gd valid - init serial console */ in spl_board_init()
387 * put U-Boot into RAM and SPL will start it from RAM. in board_boot_order()
/openbmc/u-boot/board/renesas/gose/
H A Dgose_spl.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/mach-types.h>
18 #include <asm/arch/rcar-mstp.h>
50 /* ICIALLU - Invalidate I$ to PoU */ in spl_init_sys()
51 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
52 /* BPIALL - Invalidate branch predictors */ in spl_init_sys()
53 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
374 /* UART clocks enabled and gd valid - init serial console */ in spl_board_init()
385 * put U-Boot into RAM and SPL will start it from RAM. in board_boot_order()
/openbmc/u-boot/board/renesas/lager/
H A Dlager_spl.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/mach-types.h>
18 #include <asm/arch/rcar-mstp.h>
50 /* ICIALLU - Invalidate I$ to PoU */ in spl_init_sys()
51 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
52 /* BPIALL - Invalidate branch predictors */ in spl_init_sys()
53 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
362 /* UART clocks enabled and gd valid - init serial console */ in spl_board_init()
373 * put U-Boot into RAM and SPL will start it from RAM. in board_boot_order()
/openbmc/u-boot/board/renesas/alt/
H A Dalt_spl.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/mach-types.h>
18 #include <asm/arch/rcar-mstp.h>
50 /* ICIALLU - Invalidate I$ to PoU */ in spl_init_sys()
51 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
52 /* BPIALL - Invalidate branch predictors */ in spl_init_sys()
53 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
377 /* UART clocks enabled and gd valid - init serial console */ in spl_board_init()
388 * put U-Boot into RAM and SPL will start it from RAM. in board_boot_order()
/openbmc/u-boot/board/renesas/silk/
H A Dsilk_spl.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/mach-types.h>
18 #include <asm/arch/rcar-mstp.h>
50 /* ICIALLU - Invalidate I$ to PoU */ in spl_init_sys()
51 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
52 /* BPIALL - Invalidate branch predictors */ in spl_init_sys()
53 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
391 /* UART clocks enabled and gd valid - init serial console */ in spl_board_init()
402 * put U-Boot into RAM and SPL will start it from RAM. in board_boot_order()
/openbmc/u-boot/board/renesas/stout/
H A Dstout_spl.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/mach-types.h>
18 #include <asm/arch/rcar-mstp.h>
54 /* ICIALLU - Invalidate I$ to PoU */ in spl_init_sys()
55 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
56 /* BPIALL - Invalidate branch predictors */ in spl_init_sys()
57 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
443 /* UART clocks enabled and gd valid - init serial console */ in spl_board_init()
454 * put U-Boot into RAM and SPL will start it from RAM. in board_boot_order()
/openbmc/u-boot/board/renesas/porter/
H A Dporter_spl.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/mach-types.h>
18 #include <asm/arch/rcar-mstp.h>
54 /* ICIALLU - Invalidate I$ to PoU */ in spl_init_sys()
55 "mcr 15, 0, %0, cr7, cr5, 0 \n" in spl_init_sys()
56 /* BPIALL - Invalidate branch predictors */ in spl_init_sys()
57 "mcr 15, 0, %0, cr7, cr5, 6 \n" in spl_init_sys()
457 /* UART clocks enabled and gd valid - init serial console */ in spl_board_init()
468 * put U-Boot into RAM and SPL will start it from RAM. in board_boot_order()