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/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8997.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Maxim MAX8997 is a Power Management IC which includes voltage and current
15 motor driver, flash LED driver and Micro-USB Interface Controller.
22 const: maxim,max8997-pmic
24 charger-supply:
30 - description: irq1 interrupt
31 - description: alert interrupt
[all …]
H A Drohm,bd71847-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71847-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
21 regulator-boot-on at least for BUCK5. LDO6 is supplied by it and it must
22 not be disabled by driver at startup. If BUCK5 is disabled at startup the
23 voltage monitoring for LDO5/LDO6 can cause PMIC to reset.
26 # BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6
[all …]
H A Dnxp,pca9450-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/nxp,pca9450-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Robin Gong <yibin.gong@nxp.com>
18 https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf
21 # BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6,
28 - nxp,pca9450a
29 - nxp,pca9450b
30 - nxp,pca9450c
[all …]
H A Drohm,bd71815-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71815-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
20 buck1, buck2, buck3, buck4, buck5,
33 regulator-name:
37 "^((ldo|buck)[1-5]|ldolpsr|ldodvref)$":
[all …]
H A Drohm,bd71828-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71828-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml.
16 The regulator controller is represented as a sub-node of the PMIC node
21 BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7
25 "^LDO[1-7]$":
32 regulator-name:
[all …]
H A Drohm,bd71837-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/rohm,bd71837-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
15 Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
21 regulator-boot-on at least for BUCK6 and BUCK7 so that those are not
23 if they are disabled at startup the voltage monitoring for LDO5/LDO6 will
24 cause PMIC to reset.
27 # BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7, BUCK8
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71837-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
35 clock-names:
38 "#clock-cells":
[all …]
H A Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
25 - rohm,bd71850
[all …]
H A Drohm,bd71815-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71815AGW is a single-chip power management ICs for battery-powered
15 for LED and a 500 mA single-cell linear charger. Also included is a Coulomb
16 counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs.
30 gpio-controller: true
32 "#gpio-cells":
[all …]
H A Dsamsung,s5m8767.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 Management IC (PMIC).
16 The Samsung S5M8767 is a Power Management IC which includes voltage
17 and current regulators, RTC, clock outputs and other sub-blocks.
21 const: samsung,s5m8767-pmic
39 s5m8767,pmic-buck2-dvs-voltage:
40 $ref: /schemas/types.yaml#/definitions/uint32-array
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mq-pico-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "TechNexion PICO-PI-8M";
16 compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
19 stdout-path = &uart1;
22 pmic_osc: clock-pmic {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <32768>;
[all …]
H A Dimx8mq-phanbell.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2017-2019 NXP
6 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pmic_osc: clock-pmic {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
[all …]
H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
[all …]
H A Dimx8mp-icore-mx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 compatible = "engicam,icore-mx8mp", "fsl,imx8mp";
13 cpu-supply = <&buck2>;
17 cpu-supply = <&buck2>;
21 cpu-supply = <&buck2>;
25 cpu-supply = <&buck2>;
29 clock-frequency = <100000>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_i2c1>;
34 pca9450: pmic@25 {
[all …]
H A Dimx8mm-kontron-sl.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 compatible = "kontron,imx8mm-sl", "fsl,imx8mm";
23 stdout-path = &uart3;
28 cpu-supply = <&reg_vdd_arm>;
32 cpu-supply = <&reg_vdd_arm>;
36 cpu-supply = <&reg_vdd_arm>;
40 cpu-supply = <&reg_vdd_arm>;
44 operating-points-v2 = <&ddrc_opp_table>;
46 ddrc_opp_table: opp-table {
47 compatible = "operating-points-v2";
[all …]
H A Dimx8mp-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/net/ti-dp83867.h>
11 model = "PHYTEC phyCORE-i.MX8MP";
12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp";
26 cpu-supply = <&buck2>;
30 cpu-supply = <&buck2>;
34 cpu-supply = <&buck2>;
38 cpu-supply = <&buck2>;
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_fec>;
[all …]
H A Dimx8mm-kontron-osm-s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
10 model = "Kontron OSM-S i.MX8MM (N802X SOM)";
11 compatible = "kontron,imx8mm-osm-s", "fsl,imx8mm";
29 stdout-path = &uart3;
34 cpu-supply = <&reg_vdd_arm>;
38 cpu-supply = <&reg_vdd_arm>;
42 cpu-supply = <&reg_vdd_arm>;
46 cpu-supply = <&reg_vdd_arm>;
50 operating-points-v2 = <&ddrc_opp_table>;
[all …]
H A Dimx8mm-evkb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019-2020 NXP
6 /dts-v1/;
8 #include "imx8mm-evk.dtsi"
12 compatible = "fsl,imx8mm-evkb", "fsl,imx8mm";
16 /delete-node/ pmic@4b;
18 pmic@25 {
21 pinctrl-0 = <&pinctrl_pmic>;
22 pinctrl-names = "default";
23 interrupt-parent = <&gpio1>;
[all …]
H A Dimx8mn-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "fsl,imx8mn-evk", "fsl,imx8mn";
18 cpu-supply = <&buck2>;
22 cpu-supply = <&buck2>;
26 cpu-supply = <&buck2>;
30 cpu-supply = <&buck2>;
34 pmic: pmic@25 { label
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4210-trats.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
37 stdout-path = "serial2:115200n8";
40 vemmc_reg: regulator-0 {
41 compatible = "regulator-fixed";
42 regulator-name = "VMEM_VDD_2.8V";
43 regulator-min-microvolt = <2800000>;
44 regulator-max-microvolt = <2800000>;
[all …]
H A Dexynos4210-origen.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
19 #include "exynos-mfc-reserved-memory.dtsi"
40 stdout-path = "serial2:115200n8";
43 mmc_reg: voltage-regulator {
[all …]
H A Dexynos4210-i9100.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 based Galaxy S2 (GT-I9100 version) device tree
11 /dts-v1/;
13 #include "exynos4412-ppmu-common.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/linux-event-codes.h>
19 model = "Samsung Galaxy S2 (GT-I9100)";
21 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
38 vemmc_reg: regulator-0 {
[all …]
/openbmc/linux/drivers/regulator/
H A Dbd71828-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // bd71828-regulator.c ROHM BD71828GW-DS1 regulator driver
10 #include <linux/mfd/rohm-bd71828.h>
26 const struct rohm_dvs_config dvs; member
33 * DVS Buck voltages can be changed by register values or via GPIO.
102 return rohm_regulator_set_dvs_levels(&data->dvs, np, desc, cfg->regmap); in buck_set_hw_dvs_levels()
112 struct regmap *regmap = cfg->regmap; in ldo6_parse_dt()
113 static const char * const props[] = { "rohm,dvs-run-voltage", in ldo6_parse_dt()
114 "rohm,dvs-idle-voltage", in ldo6_parse_dt()
115 "rohm,dvs-suspend-voltage", in ldo6_parse_dt()
[all …]
H A Dbd718x7-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 // bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver
9 #include <linux/mfd/rohm-bd718x7.h>
50 * controlled by software - or by PMIC internal HW state machine. Whether
51 * regulator should be under SW or HW control can be defined from device-tree.
88 * BUCK1RAMPRATE[1:0] BUCK1 DVS ramp rate setting
97 * We assume PMIC is in RUN state because SW running and able to query the
102 * Note for next hacker - these PMICs have a register where the HW state can be
103 * read. If assuming RUN appears to be false in your use-case - you can
122 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); in bd71837_get_buck34_enable_hwctrl()
[all …]
H A Dmax8997-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // max8997.c - Regulator driver for the Maxim 8997/8966
20 #include <linux/mfd/max8997-private.h>
51 int set3 = (max8997->buck125_gpioindex) & 0x1; in max8997_set_gpio()
52 int set2 = ((max8997->buck125_gpioindex) >> 1) & 0x1; in max8997_set_gpio()
53 int set1 = ((max8997->buck125_gpioindex) >> 2) & 0x1; in max8997_set_gpio()
55 gpio_set_value(max8997->buck125_gpios[0], set1); in max8997_set_gpio()
56 gpio_set_value(max8997->buck125_gpios[1], set2); in max8997_set_gpio()
57 gpio_set_value(max8997->buck125_gpios[2], set3); in max8997_set_gpio()
66 /* Voltage maps in uV */
[all …]

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