| /openbmc/u-boot/board/freescale/ls2080aqds/ |
| H A D | README | 166 DPMAC4 -> PHY4-P0
169 DPMAC7 -> PHY4-P1
174 DPMAC12 -> PHY4-P0
177 DPMAC15 -> PHY4-P1
212 DPMAC13 -> PHY4-P0
213 DPMAC14 -> PHY4-P1
214 DPMAC15 -> PHY4-P2
215 DPMAC16 -> PHY4-P3
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| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-stp-xway.c | 90 u8 phy4; /* 3 bits can be driven by phy4 */ member
211 chip->phy4 << XWAY_STP_PHY4_SHIFT, in xway_stp_hw_init()
216 chip->reserved = (chip->phy4 << 11) | (chip->phy3 << 8) | (chip->phy2 << 5) in xway_stp_hw_init()
291 if (!of_property_read_u32(pdev->dev.of_node, "lantiq,phy4", &phy)) in xway_stp_probe()
292 chip->phy4 = phy & XWAY_STP_PHY_MASK; in xway_stp_probe()
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| /openbmc/linux/arch/mips/boot/dts/mscc/ |
| H A D | ocelot_pcb120.dts | 63 phy4: ethernet-phy@3 { label
104 phy-handle = <&phy4>;
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| /openbmc/linux/arch/arm/boot/dts/intel/ixp/ |
| H A D | intel-ixp42x-adi-coyote.dts | 93 phy4: ethernet-phy@4 { label
109 phy-handle = <&phy4>;
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| H A D | intel-ixp42x-ixdpg425.dts | 108 phy4: ethernet-phy@4 { label
124 phy-handle = <&phy4>;
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| H A D | intel-ixp42x-linksys-wrv54g.dts | 148 phy-handle = <&phy4>;
155 phy4: ethernet-phy@4 { label
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| H A D | intel-ixp42x-freecom-fsg-3.dts | 200 phy4: ethernet-phy@4 { label
216 phy-handle = <&phy4>;
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| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 117 phy4: ethernet-phy@5 { label
170 phy-handle = <&phy4>;
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| /openbmc/u-boot/arch/mips/dts/ |
| H A D | luton_pcb090.dts | 79 phy-handle = <&phy4>;
|
| H A D | luton_pcb091.dts | 85 phy-handle = <&phy4>;
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | armada-8040-mcbin.dts | 185 phy4 {
301 phy4 {
|
| H A D | armada-8040-db.dts | 140 phy4 {
239 phy4 {
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| H A D | armada-8040-clearfog-gt-8k.dts | 174 phy4 {
288 phy4 {
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| /openbmc/linux/drivers/net/dsa/qca/ |
| H A D | ar9331.c | 21 * | MAC5-|--+-RMII--M-----|-PHY4-|-o P4
28 * configuration it can be PHY4 (default) or PHY0. Only GMAC0 or MAC5 can be
31 * CFG_SW_PHY_SWAP - swap connections of PHY0 and PHY4. If this bit is not set
32 * PHY4 is connected to GMAC0/MAC5 bundle and PHY0 is connected to MAC1. If this
33 * bit is set, PHY4 is connected to MAC1 and PHY0 is connected to GMAC0/MAC5
36 * CFG_SW_PHY_ADDR_SWAP - swap addresses of PHY0 and PHY4
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| /openbmc/linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | realtek.yaml | 188 phy-handle = <&phy4>;
226 phy4: ethernet-phy@4 {
|
| H A D | mediatek,mt7530.yaml | 550 # Example 5: MT7621: mux MT7530's phy4 to SoC's gmac1
574 /* MT7530's phy4 */
616 /* Commented out, phy4 is connected to gmac1.
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | stx_gp3_8560.dts | 163 phy4: ethernet-phy@4 { label
188 phy-handle = <&phy4>;
|
| H A D | mpc8313erdb.dts | 212 phy4: ethernet-phy@4 { label
237 phy-handle = < &phy4 >;
|
| H A D | mpc836x_rdk.dts | 288 phy-handle = <&phy4>;
345 phy4: ethernet-phy@4 { label
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| /openbmc/linux/drivers/scsi/mvsas/ |
| H A D | mv_94xx.h | 96 MVS_P4_VSR_ADDR = 0x250, /* phy4 VSR address */
97 MVS_P4_VSR_DATA = 0x254, /* phy4 VSR data */
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | p1021mds.dts | 162 phy4: ethernet-phy@4 { label
184 phy-handle = <&phy4>;
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | cavium-pip.txt | 76 phy-handle = <&phy4>;
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| /openbmc/linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini-dlink-dir-685.dts | 234 phy-handle = <&phy4>;
275 phy4: phy@4 { label
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| /openbmc/u-boot/include/net/pfe_eth/pfe/cbus/ |
| H A D | tmu_csr.h | 104 /* [31:0] PHY4 in queue address (must be initialized with one of the
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| /openbmc/linux/Documentation/devicetree/bindings/scsi/ |
| H A D | hisilicon-sas.txt | 81 <299 4>,<303 4>,<304 4>,/* phy4 */
|