1116edf6eSQuentin Schulz// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2116edf6eSQuentin Schulz/* Copyright (c) 2017 Microsemi Corporation */ 3116edf6eSQuentin Schulz 4116edf6eSQuentin Schulz/dts-v1/; 5116edf6eSQuentin Schulz 615324652SQuentin Schulz#include <dt-bindings/gpio/gpio.h> 7116edf6eSQuentin Schulz#include <dt-bindings/interrupt-controller/irq.h> 8116edf6eSQuentin Schulz#include <dt-bindings/phy/phy-ocelot-serdes.h> 9116edf6eSQuentin Schulz#include "ocelot.dtsi" 10116edf6eSQuentin Schulz 11116edf6eSQuentin Schulz/ { 12116edf6eSQuentin Schulz compatible = "mscc,ocelot-pcb120", "mscc,ocelot"; 13116edf6eSQuentin Schulz 14116edf6eSQuentin Schulz chosen { 15116edf6eSQuentin Schulz stdout-path = "serial0:115200n8"; 16116edf6eSQuentin Schulz }; 17116edf6eSQuentin Schulz 18116edf6eSQuentin Schulz memory@0 { 19116edf6eSQuentin Schulz device_type = "memory"; 20116edf6eSQuentin Schulz reg = <0x0 0x0e000000>; 21116edf6eSQuentin Schulz }; 22116edf6eSQuentin Schulz}; 23116edf6eSQuentin Schulz 24116edf6eSQuentin Schulz&gpio { 25*ee5930c9SMichael Walle phy_int_pins: phy-int-pins { 26116edf6eSQuentin Schulz pins = "GPIO_4"; 27116edf6eSQuentin Schulz function = "gpio"; 28116edf6eSQuentin Schulz }; 2915324652SQuentin Schulz 30*ee5930c9SMichael Walle phy_load_save_pins: phy-load-save-pins { 3115324652SQuentin Schulz pins = "GPIO_10"; 3215324652SQuentin Schulz function = "ptp2"; 3315324652SQuentin Schulz }; 34116edf6eSQuentin Schulz}; 35116edf6eSQuentin Schulz 36116edf6eSQuentin Schulz&mdio0 { 37116edf6eSQuentin Schulz status = "okay"; 38116edf6eSQuentin Schulz}; 39116edf6eSQuentin Schulz 40116edf6eSQuentin Schulz&mdio1 { 41116edf6eSQuentin Schulz status = "okay"; 42116edf6eSQuentin Schulz pinctrl-names = "default"; 43*ee5930c9SMichael Walle pinctrl-0 = <&miim1_pins>, <&phy_int_pins>, <&phy_load_save_pins>; 44116edf6eSQuentin Schulz 45116edf6eSQuentin Schulz phy7: ethernet-phy@0 { 46116edf6eSQuentin Schulz reg = <0>; 47116edf6eSQuentin Schulz interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 48116edf6eSQuentin Schulz interrupt-parent = <&gpio>; 4915324652SQuentin Schulz load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; 50116edf6eSQuentin Schulz }; 51116edf6eSQuentin Schulz phy6: ethernet-phy@1 { 52116edf6eSQuentin Schulz reg = <1>; 53116edf6eSQuentin Schulz interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 54116edf6eSQuentin Schulz interrupt-parent = <&gpio>; 5515324652SQuentin Schulz load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; 56116edf6eSQuentin Schulz }; 57116edf6eSQuentin Schulz phy5: ethernet-phy@2 { 58116edf6eSQuentin Schulz reg = <2>; 59116edf6eSQuentin Schulz interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 60116edf6eSQuentin Schulz interrupt-parent = <&gpio>; 6115324652SQuentin Schulz load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; 62116edf6eSQuentin Schulz }; 63116edf6eSQuentin Schulz phy4: ethernet-phy@3 { 64116edf6eSQuentin Schulz reg = <3>; 65116edf6eSQuentin Schulz interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 66116edf6eSQuentin Schulz interrupt-parent = <&gpio>; 6715324652SQuentin Schulz load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; 68116edf6eSQuentin Schulz }; 69116edf6eSQuentin Schulz}; 70116edf6eSQuentin Schulz 71116edf6eSQuentin Schulz&port0 { 720181f6f1SVladimir Oltean status = "okay"; 73116edf6eSQuentin Schulz phy-handle = <&phy0>; 74eba54cbbSVladimir Oltean phy-mode = "internal"; 75116edf6eSQuentin Schulz}; 76116edf6eSQuentin Schulz 77116edf6eSQuentin Schulz&port1 { 780181f6f1SVladimir Oltean status = "okay"; 79116edf6eSQuentin Schulz phy-handle = <&phy1>; 80eba54cbbSVladimir Oltean phy-mode = "internal"; 81116edf6eSQuentin Schulz}; 82116edf6eSQuentin Schulz 83116edf6eSQuentin Schulz&port2 { 840181f6f1SVladimir Oltean status = "okay"; 85116edf6eSQuentin Schulz phy-handle = <&phy2>; 86eba54cbbSVladimir Oltean phy-mode = "internal"; 87116edf6eSQuentin Schulz}; 88116edf6eSQuentin Schulz 89116edf6eSQuentin Schulz&port3 { 900181f6f1SVladimir Oltean status = "okay"; 91116edf6eSQuentin Schulz phy-handle = <&phy3>; 92eba54cbbSVladimir Oltean phy-mode = "internal"; 93116edf6eSQuentin Schulz}; 94116edf6eSQuentin Schulz 95116edf6eSQuentin Schulz&port4 { 960181f6f1SVladimir Oltean status = "okay"; 97116edf6eSQuentin Schulz phy-handle = <&phy7>; 98116edf6eSQuentin Schulz phy-mode = "sgmii"; 99116edf6eSQuentin Schulz phys = <&serdes 4 SERDES1G(2)>; 100116edf6eSQuentin Schulz}; 101116edf6eSQuentin Schulz 102116edf6eSQuentin Schulz&port5 { 1030181f6f1SVladimir Oltean status = "okay"; 104116edf6eSQuentin Schulz phy-handle = <&phy4>; 105116edf6eSQuentin Schulz phy-mode = "sgmii"; 106116edf6eSQuentin Schulz phys = <&serdes 5 SERDES1G(5)>; 107116edf6eSQuentin Schulz}; 108116edf6eSQuentin Schulz 109116edf6eSQuentin Schulz&port6 { 1100181f6f1SVladimir Oltean status = "okay"; 111116edf6eSQuentin Schulz phy-handle = <&phy6>; 112116edf6eSQuentin Schulz phy-mode = "sgmii"; 113116edf6eSQuentin Schulz phys = <&serdes 6 SERDES1G(3)>; 114116edf6eSQuentin Schulz}; 115116edf6eSQuentin Schulz 116116edf6eSQuentin Schulz&port9 { 1170181f6f1SVladimir Oltean status = "okay"; 118116edf6eSQuentin Schulz phy-handle = <&phy5>; 119116edf6eSQuentin Schulz phy-mode = "sgmii"; 120116edf6eSQuentin Schulz phys = <&serdes 9 SERDES1G(4)>; 121116edf6eSQuentin Schulz}; 122116edf6eSQuentin Schulz 123116edf6eSQuentin Schulz&uart0 { 124116edf6eSQuentin Schulz status = "okay"; 125116edf6eSQuentin Schulz}; 126116edf6eSQuentin Schulz 127116edf6eSQuentin Schulz&uart2 { 128116edf6eSQuentin Schulz status = "okay"; 129116edf6eSQuentin Schulz}; 130