/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - enum: 16 - amd,pensando-elba-sd4hc 17 - microchip,mpfs-sd4hc 18 - socionext,uniphier-sd4hc 19 - const: cdns,sd4hc [all …]
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H A D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: TI AM654 MMC Controller 11 - Ulf Hansson <ulf.hansson@linaro.org> 14 - $ref: sdhci-common.yaml# 19 - enum: 20 - ti,am62-sdhci [all …]
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/openbmc/u-boot/drivers/mmc/ |
H A D | sdhci-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0+ 14 #include <mmc.h> 17 /* HRS - Host Register Set (specific to Cadence) */ 18 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */ 37 /* SRS - Slot Register Set (SDHCI-compatible) */ 40 /* PHY */ 55 * The tuned val register is 6 bit-wide, but not the whole of the range is 56 * available. The range 0-42 seems to be available (then 43 wraps around to 0) 63 struct mmc mmc; member 73 { "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, }, [all …]
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/openbmc/linux/drivers/mmc/host/ |
H A D | sdhci-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <linux/mmc/host.h> 12 #include <linux/mmc/mmc.h> 17 #include "sdhci-pltfm.h" 19 /* HRS - Host Register Set (specific to Cadence) */ 20 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */ 39 /* SRS - Slot Register Set (SDHCI-compatible) */ 42 /* PHY */ 57 * The tuned val register is 6 bit-wide, but not the whole of the range is 58 * available. The range 0-42 seems to be available (then 43 wraps around to 0) [all …]
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/openbmc/u-boot/board/kosagi/novena/ |
H A D | novena_spl.c | 1 // SPDX-License-Identifier: GPL-2.0+ 12 #include <asm/arch/mx6-ddr.h> 13 #include <asm/arch/mx6-pins.h> 16 #include <asm/mach-imx/boot_mode.h> 17 #include <asm/mach-imx/iomux-v3.h> 18 #include <asm/mach-imx/mxc_i2c.h> 21 #include <mmc.h> 25 #include <asm/arch/mx6-ddr.h> 111 /* pin 42 PHY nRST */ 128 /* Assert Ethernet PHY nRST */ in novena_spl_setup_iomux_enet() [all …]
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/openbmc/linux/arch/riscv/boot/dts/starfive/ |
H A D | jh7110-starfive-visionfive-2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include "jh7110-pinfunc.h" 10 #include <dt-bindings/gpio/gpio.h> 26 stdout-path = "serial0:115200n8"; 30 timebase-frequency = <4000000>; 38 gpio-restart { 39 compatible = "gpio-restart"; 46 clock-frequency = <74250000>; 50 clock-frequency = <125000000>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | uniphier-ld11.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 14 compatible = "socionext,uniphier-ld11"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <0>; 23 cpu-map { [all …]
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H A D | meson-gxm-khadas-vim2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/thermal/thermal.h> 13 #include "meson-gxm.dtsi" 16 compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; 26 stdout-path = "serial0:115200n8"; 34 adc-keys { 35 compatible = "adc-keys"; 36 io-channels = <&saradc 0>; [all …]
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H A D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 14 compatible = "socionext,uniphier-pxs3"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <0>; 23 cpu-map { [all …]
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H A D | uniphier-ld20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/thermal/thermal.h> 15 compatible = "socionext,uniphier-ld20"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 interrupt-parent = <&gic>; 21 #address-cells = <2>; [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-firefly-reload-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/input.h> 16 ext_gmac: external-gmac-clock { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 19 clock-frequency = <125000000>; 20 clock-output-names = "ext_gmac"; 24 vcc_flash: flash-regulator { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc_flash"; [all …]
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H A D | rk3288-popmetal.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com> 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 11 model = "PopMetal-RK3288"; 12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288"; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 clock-frequency = <125000000>; 22 clock-output-names = "ext_gmac"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/socionext/ |
H A D | uniphier-ld11.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 compatible = "socionext,uniphier-ld11"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <0>; [all …]
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H A D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-pxs3"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 20 #address-cells = <2>; [all …]
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H A D | uniphier-ld20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-ld20"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-axg-jethome-jethub-j1xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 10 /dts-v1/; 12 #include "meson-axg.dtsi" 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/thermal/thermal.h> 24 stdout-path = "serial0:115200n8"; 27 reserved-memory { 33 emmc_pwrseq: emmc-pwrseq { 34 compatible = "mmc-pwrseq-emmc"; 35 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; [all …]
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H A D | meson-gx-libretech-pc.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 /* Libretech Amlogic GX PC form factor - AKA: Tartiflette */ 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/sound/meson-aiu.h> 14 adc-keys { 15 compatible = "adc-keys"; 16 io-channels = <&saradc 0>; 17 io-channel-names = "buttons"; 18 keyup-threshold-microvolt = <1800000>; [all …]
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H A D | meson-gxm-khadas-vim2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxm.dtsi" 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/meson-aiu.h> 15 compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; 24 stdout-path = "serial0:115200n8"; 32 adc-keys { 33 compatible = "adc-keys"; 34 io-channels = <&saradc 0>; [all …]
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H A D | meson-g12b-bananapi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/meson-g12a-gpio.h> 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 21 stdout-path = "serial0:115200n8"; 29 adc-keys { 30 compatible = "adc-keys"; 31 io-channels = <&saradc 2>; 32 io-channel-names = "buttons"; [all …]
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H A D | meson-khadas-vim3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/meson-g12a-gpio.h> 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 22 stdout-path = "serial0:115200n8"; 30 adc-keys { 31 compatible = "adc-keys"; 32 io-channels = <&saradc 2>; 33 io-channel-names = "buttons"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm670-google-sargo.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree, 4 * xiaomi-lavender device tree, and oneplus-common device tree. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 19 /delete-node/ &mpss_region; 20 /delete-node/ &venus_mem; [all …]
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/openbmc/u-boot/board/toradex/colibri_imx6/ |
H A D | colibri_imx6.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. 5 * Copyright (C) 2014-2016, Toradex AG 13 #include <asm/arch/imx-regs.h> 15 #include <asm/arch/mx6-pins.h> 16 #include <asm/arch/mx6-ddr.h> 21 #include <asm/mach-imx/iomux-v3.h> 22 #include <asm/mach-imx/mxc_i2c.h> 23 #include <asm/mach-imx/sata.h> 24 #include <asm/mach-imx/boot_mode.h> [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3328-rock-pi-e.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org> 5 * Based on ./rk3328-rock64.dts, which is 10 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/rockchip.h> 21 compatible = "radxa,rockpi-e", "rockchip,rk3328"; 29 stdout-path = "serial2:1500000n8"; [all …]
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/openbmc/u-boot/board/toradex/apalis_imx6/ |
H A D | apalis_imx6.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. 5 * Copyright (C) 2014-2016, Toradex AG 15 #include <asm/arch/imx-regs.h> 18 #include <asm/arch/mx6-pins.h> 19 #include <asm/arch/mx6-ddr.h> 23 #include <asm/mach-imx/iomux-v3.h> 24 #include <asm/mach-imx/mxc_i2c.h> 25 #include <asm/mach-imx/sata.h> 26 #include <asm/mach-imx/boot_mode.h> [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5250-snow-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/samsung-i2s.h> 30 stdout-path = "serial3:115200n8"; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-names = "default"; [all …]
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