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Searched +full:phy +full:- +full:input +full:- +full:delay +full:- +full:mmc +full:- +full:ddr (Results 1 – 16 of 16) sorted by relevance

/openbmc/u-boot/drivers/mmc/
H A Dsdhci-cadence.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <mmc.h>
17 /* HRS - Host Register Set (specific to Cadence) */
18 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */
37 /* SRS - Slot Register Set (SDHCI-compatible) */
40 /* PHY */
55 * The tuned val register is 6 bit-wide, but not the whole of the range is
56 * available. The range 0-42 seems to be available (then 43 wraps around to 0)
63 struct mmc mmc; member
73 { "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, },
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/openbmc/u-boot/board/kosagi/novena/
H A Dnovena_spl.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/mx6-ddr.h>
13 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/iomux-v3.h>
18 #include <asm/mach-imx/mxc_i2c.h>
21 #include <mmc.h>
25 #include <asm/arch/mx6-ddr.h>
111 /* pin 42 PHY nRST */
128 /* Assert Ethernet PHY nRST */ in novena_spl_setup_iomux_enet()
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/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxm-khadas-vim2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "meson-gxm.dtsi"
16 compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm";
26 stdout-path = "serial0:115200n8";
34 adc-keys {
35 compatible = "adc-keys";
36 io-channels = <&saradc 0>;
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H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
14 compatible = "socionext,uniphier-ld11";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
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H A Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
14 compatible = "socionext,uniphier-pxs3";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
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H A Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
15 compatible = "socionext,uniphier-ld20";
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&gic>;
21 #address-cells = <2>;
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H A Dmeson-axg-s400.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-axg.dtsi"
9 #include <dt-bindings/input/input.h>
12 compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
16 compatible = "adc-keys";
17 io-channels = <&saradc 0>;
18 io-channel-names = "buttons";
19 keyup-threshold-microvolt = <1800000>;
21 button-next {
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/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dcolibri_imx6.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
5 * Copyright (C) 2014-2016, Toradex AG
13 #include <asm/arch/imx-regs.h>
15 #include <asm/arch/mx6-pins.h>
16 #include <asm/arch/mx6-ddr.h>
21 #include <asm/mach-imx/iomux-v3.h>
22 #include <asm/mach-imx/mxc_i2c.h>
23 #include <asm/mach-imx/sata.h>
24 #include <asm/mach-imx/boot_mode.h>
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/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dapalis_imx6.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
5 * Copyright (C) 2014-2016, Toradex AG
15 #include <asm/arch/imx-regs.h>
18 #include <asm/arch/mx6-pins.h>
19 #include <asm/arch/mx6-ddr.h>
23 #include <asm/mach-imx/iomux-v3.h>
24 #include <asm/mach-imx/mxc_i2c.h>
25 #include <asm/mach-imx/sata.h>
26 #include <asm/mach-imx/boot_mode.h>
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2500/
H A Dplatform.S9 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
38 * | 4.[P1] Set X-DMA into VGA memory domain
39 * V2 |2015.04.24 : 1.[P1] Add disabling all DRAM requests during PHY init
41 * V3 |2015.05.13 : 1.[P1] Modify DDR4 PHY Vref training algorithm
45 * | 2.[P2] Add DDR read margin report
46 * V6 |2015.08.13 : 1.[P3] Disable MMC password before exit
49 * | 2.[P1] Add reset MMC controller to solve init DRAM again during VGA ON
55 * |2015.12.10 : 1.[P1] Add USB PHY initial code
60 * V10|2016.04.21 : 1.[P1] Add USB PHY initial code - port B, to prevent wrong state on USB pins
62 * V12|2016.06.24 : 1.[P1] Modify LPC Reset input source when eSPI mode enabled
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/openbmc/u-boot/
H A DREADME1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000 - 2013
9 This directory contains the source code for U-Boot, a boot loader for
15 The development of U-Boot is closely related to Linux: some parts of
37 scattered throughout the U-Boot source identifying the people or
41 actual U-Boot source tree; however, it can be created dynamically
51 U-Boot, you should send a message to the U-Boot mailing list at
52 <u-boot@lists.denx.de>. There is also an archive of previous traffic
53 on the mailing list - please search the archive before asking FAQ's.
54 Please see http://lists.denx.de/pipermail/u-boot and
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/openbmc/u-boot/board/congatec/cgtqmx6eval/
H A Dcgtqmx6eval.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
6 * Leo Sartre, <lsartre@adeneo-embedded.com>
12 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/sata.h>
18 #include <asm/mach-imx/boot_mode.h>
19 #include <asm/mach-imx/mxc_i2c.h>
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/openbmc/qemu/pc-bios/
HDu-boot.e500 ... --------------------- ...
/openbmc/u-boot/board/freescale/mx6sabresd/
H A Dmx6sabresd.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/imx-regs.h>
11 #include <asm/arch/mx6-pins.h>
12 #include <asm/mach-imx/spi.h>
15 #include <asm/mach-imx/mxc_i2c.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/boot_mode.h>
18 #include <asm/mach-imx/video.h>
19 #include <mmc.h>
28 #include <input.h>
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/openbmc/
Dopengrok1.0.log1 2025-12-22 03:01:03.570-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-12-22 03:01:03.645-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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Dopengrok2.0.log1 2025-12-21 03:01:04.892-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-12-21 03:01:04.950-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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