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/openbmc/linux/drivers/clk/
H A Dclk-xgene.c445 struct xgene_clk *pclk = to_xgene_clk(hw); in xgene_clk_enable() local
449 if (pclk->lock) in xgene_clk_enable()
450 spin_lock_irqsave(pclk->lock, flags); in xgene_clk_enable()
452 if (pclk->param.csr_reg) { in xgene_clk_enable()
455 data = xgene_clk_read(pclk->param.csr_reg + in xgene_clk_enable()
456 pclk->param.reg_clk_offset); in xgene_clk_enable()
457 data |= pclk->param.reg_clk_mask; in xgene_clk_enable()
458 xgene_clk_write(data, pclk->param.csr_reg + in xgene_clk_enable()
459 pclk->param.reg_clk_offset); in xgene_clk_enable()
462 pclk->param.reg_clk_offset, pclk->param.reg_clk_mask, in xgene_clk_enable()
[all …]
H A Dclk-stm32mp1.c1379 #define PCLK(_id, _name, _parent, _flags, _mgate)\ macro
1883 PCLK(TIM2, "tim2", "pclk1", CLK_IGNORE_UNUSED, G_TIM2),
1884 PCLK(TIM3, "tim3", "pclk1", CLK_IGNORE_UNUSED, G_TIM3),
1885 PCLK(TIM4, "tim4", "pclk1", CLK_IGNORE_UNUSED, G_TIM4),
1886 PCLK(TIM5, "tim5", "pclk1", CLK_IGNORE_UNUSED, G_TIM5),
1887 PCLK(TIM6, "tim6", "pclk1", CLK_IGNORE_UNUSED, G_TIM6),
1888 PCLK(TIM7, "tim7", "pclk1", CLK_IGNORE_UNUSED, G_TIM7),
1889 PCLK(TIM12, "tim12", "pclk1", CLK_IGNORE_UNUSED, G_TIM12),
1890 PCLK(TIM13, "tim13", "pclk1", CLK_IGNORE_UNUSED, G_TIM13),
1891 PCLK(TIM14, "tim14", "pclk1", CLK_IGNORE_UNUSED, G_TIM14),
[all …]
H A Dclk-conf.c18 struct clk *clk, *pclk; in __set_clk_parents() local
40 pclk = of_clk_get_from_provider(&clkspec); in __set_clk_parents()
42 if (IS_ERR(pclk)) { in __set_clk_parents()
43 if (PTR_ERR(pclk) != -EPROBE_DEFER) in __set_clk_parents()
46 return PTR_ERR(pclk); in __set_clk_parents()
68 rc = clk_set_parent(clk, pclk); in __set_clk_parents()
71 __clk_get_name(clk), __clk_get_name(pclk), rc); in __set_clk_parents()
73 clk_put(pclk); in __set_clk_parents()
77 clk_put(pclk); in __set_clk_parents()
/openbmc/linux/drivers/clk/x86/
H A Dclk-pmc-atom.c165 struct clk_plt *pclk; in plt_clk_register() local
169 pclk = devm_kzalloc(&pdev->dev, sizeof(*pclk), GFP_KERNEL); in plt_clk_register()
170 if (!pclk) in plt_clk_register()
179 pclk->hw.init = &init; in plt_clk_register()
180 pclk->reg = pmc_data->base + PMC_CLK_CTL_OFFSET + id * PMC_CLK_CTL_SIZE; in plt_clk_register()
181 spin_lock_init(&pclk->lock); in plt_clk_register()
188 if (pmc_data->critical && plt_clk_is_enabled(&pclk->hw)) in plt_clk_register()
191 ret = devm_clk_hw_register(&pdev->dev, &pclk->hw); in plt_clk_register()
193 pclk = ERR_PTR(ret); in plt_clk_register()
197 pclk->lookup = clkdev_hw_create(&pclk->hw, init.name, NULL); in plt_clk_register()
[all …]
/openbmc/linux/drivers/clocksource/
H A Dtimer-microchip-pit64b.c53 * @pclk: PIT64B's peripheral clock
59 struct clk *pclk; member
140 clk_disable_unprepare(timer->pclk); in mchp_pit64b_suspend()
145 clk_prepare_enable(timer->pclk); in mchp_pit64b_resume()
261 * PIT64B timer may be fed by gclk or pclk. When gclk is used its rate has to
262 * be at least 3 times lower that pclk's rate. pclk rate is fixed, gclk rate
263 * could be changed via clock APIs. The chosen clock (pclk or gclk) could be
268 * requested rate. If PCLK/GCLK < 3 (condition requested by PIT64B hardware)
269 * then the function falls back on using PCLK as clock source for PIT64B timer
280 * | |-->pclk -->|-->| | +---------+ +-----+ |
[all …]
H A Dtimer-rockchip.c37 struct clk *pclk; member
131 struct clk *pclk; in rk_timer_probe() local
146 pclk = of_clk_get_by_name(np, "pclk"); in rk_timer_probe()
147 if (IS_ERR(pclk)) { in rk_timer_probe()
148 ret = PTR_ERR(pclk); in rk_timer_probe()
149 pr_err("Failed to get pclk for '%s'\n", TIMER_NAME); in rk_timer_probe()
153 ret = clk_prepare_enable(pclk); in rk_timer_probe()
155 pr_err("Failed to enable pclk for '%s'\n", TIMER_NAME); in rk_timer_probe()
158 timer->pclk = pclk; in rk_timer_probe()
191 clk_disable_unprepare(pclk); in rk_timer_probe()
[all …]
H A Ddw_apb_timer_of.c21 struct clk *pclk; in timer_get_base_and_rate() local
44 pclk = of_clk_get_by_name(np, "pclk"); in timer_get_base_and_rate()
45 if (!IS_ERR(pclk)) in timer_get_base_and_rate()
46 if (clk_prepare_enable(pclk)) in timer_get_base_and_rate()
47 pr_warn("pclk for %pOFn is present, but could not be activated\n", in timer_get_base_and_rate()
77 if (!IS_ERR(pclk)) { in timer_get_base_and_rate()
78 clk_disable_unprepare(pclk); in timer_get_base_and_rate()
79 clk_put(pclk); in timer_get_base_and_rate()
/openbmc/linux/drivers/clk/samsung/
H A Dclk-s3c64xx.c164 DIV(PCLK, "pclk", "hclkx2", CLK_DIV0, 12, 4),
221 GATE_ON(PCLK_SKEY, "pclk_skey", "pclk", PCLK_GATE, 24),
222 GATE_ON(PCLK_CHIPID, "pclk_chipid", "pclk", PCLK_GATE, 23),
223 GATE_BUS(PCLK_SPI1, "pclk_spi1", "pclk", PCLK_GATE, 22),
224 GATE_BUS(PCLK_SPI0, "pclk_spi0", "pclk", PCLK_GATE, 21),
225 GATE_BUS(PCLK_HSIRX, "pclk_hsirx", "pclk", PCLK_GATE, 20),
226 GATE_BUS(PCLK_HSITX, "pclk_hsitx", "pclk", PCLK_GATE, 19),
227 GATE_ON(PCLK_GPIO, "pclk_gpio", "pclk", PCLK_GATE, 18),
228 GATE_BUS(PCLK_IIC0, "pclk_iic0", "pclk", PCLK_GATE, 17),
229 GATE_BUS(PCLK_IIS1, "pclk_iis1", "pclk", PCLK_GATE, 16),
[all …]
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dversatile-ab.dts161 pclk: pclk@24M { label
236 clocks = <&pclk>;
244 clocks = <&xtal24mhz>, <&pclk>;
252 clocks = <&xtal24mhz>, <&pclk>;
260 clocks = <&xtal24mhz>, <&pclk>;
267 clocks = <&pclk>;
274 clocks = <&pclk>;
282 clocks = <&osc1>, <&pclk>;
321 clocks = <&pclk>;
329 clocks = <&pclk>;
[all …]
H A Darm-realview-eb.dtsi111 pclk: pclk@0 { label
329 clocks = <&pclk>;
342 clocks = <&mclk>, <&pclk>;
352 clocks = <&kmiclk>, <&pclk>;
359 clocks = <&kmiclk>, <&pclk>;
366 clocks = <&pclk>;
373 clocks = <&uartclk>, <&pclk>;
380 clocks = <&uartclk>, <&pclk>;
387 clocks = <&uartclk>, <&pclk>;
394 clocks = <&uartclk>, <&pclk>;
[all …]
H A Darm-realview-pbx.dtsi126 pclk: pclk@0 { label
371 clocks = <&uartclk>, <&pclk>;
378 clocks = <&uartclk>, <&pclk>;
385 clocks = <&uartclk>, <&pclk>;
392 clocks = <&sspclk>, <&pclk>;
399 clocks = <&wdogclk>, <&pclk>;
407 clocks = <&wdogclk>, <&pclk>;
417 <&pclk>;
428 <&pclk>;
441 clocks = <&pclk>;
[all …]
H A Darm-realview-pb1176.dts113 pclk: pclk@0 { label
371 clocks = <&timclk>, <&timclk>, <&pclk>;
381 clocks = <&timclk>, <&timclk>, <&pclk>;
390 clocks = <&pclk>;
403 clocks = <&pclk>;
412 clocks = <&sspclk>, <&pclk>;
421 clocks = <&uartclk>, <&pclk>;
430 clocks = <&uartclk>, <&pclk>;
439 clocks = <&uartclk>, <&pclk>;
448 clocks = <&uartclk>, <&pclk>;
[all …]
H A Darm-realview-pb11mp.dts227 pclk: pclk@0 { label
476 clocks = <&pclk>;
491 clocks = <&mclk>, <&pclk>;
503 clocks = <&kmiclk>, <&pclk>;
512 clocks = <&kmiclk>, <&pclk>;
521 clocks = <&uartclk>, <&pclk>;
530 clocks = <&uartclk>, <&pclk>;
539 clocks = <&uartclk>, <&pclk>;
548 clocks = <&uartclk>, <&pclk>;
557 clocks = <&sspclk>, <&pclk>;
[all …]
/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hi3620.c34 static const char *const uart0_mux_p[] __initconst = { "osc26m", "pclk", };
35 static const char *const uart1_mux_p[] __initconst = { "osc26m", "pclk", };
36 static const char *const uart2_mux_p[] __initconst = { "osc26m", "pclk", };
37 static const char *const uart3_mux_p[] __initconst = { "osc26m", "pclk", };
38 static const char *const uart4_mux_p[] __initconst = { "osc26m", "pclk", };
68 { HI3620_PCLK, "pclk", NULL, 0, 26000000, },
137 { HI3620_RTCCLK, "rtcclk", "pclk", CLK_SET_RATE_PARENT, 0x20, 5, 0, },
138 { HI3620_KPC_CLK, "kpc_clk", "pclk", CLK_SET_RATE_PARENT, 0x20, 6, 0, },
139 { HI3620_GPIOCLK0, "gpioclk0", "pclk", CLK_SET_RATE_PARENT, 0x20, 8, 0, },
140 { HI3620_GPIOCLK1, "gpioclk1", "pclk", CLK_SET_RATE_PARENT, 0x20, 9, 0, },
[all …]
/openbmc/linux/drivers/iio/dac/
H A Dstm32-dac-core.c22 * @pclk: peripheral clock common for all DACs
27 struct clk *pclk; member
64 ret = clk_prepare_enable(priv->pclk); in stm32_dac_core_hw_start()
66 dev_err(dev, "pclk enable failed: %d\n", ret); in stm32_dac_core_hw_start()
83 clk_disable_unprepare(priv->pclk); in stm32_dac_core_hw_stop()
112 regmap = devm_regmap_init_mmio_clk(dev, "pclk", mmio, in stm32_dac_probe()
118 priv->pclk = devm_clk_get(dev, "pclk"); in stm32_dac_probe()
119 if (IS_ERR(priv->pclk)) in stm32_dac_probe()
120 return dev_err_probe(dev, PTR_ERR(priv->pclk), "pclk get failed\n"); in stm32_dac_probe()
156 priv->common.hfsel = (clk_get_rate(priv->pclk) > 80000000UL); in stm32_dac_probe()
/openbmc/linux/arch/arm/boot/dts/calxeda/
H A Decx-common.dtsi50 clocks = <&pclk>;
60 clocks = <&pclk>;
71 clocks = <&pclk>;
82 clocks = <&pclk>;
93 clocks = <&pclk>;
102 clocks = <&pclk>;
110 clocks = <&pclk>;
118 clocks = <&pclk>, <&pclk>;
187 pclk: pclk { label
199 clocks = <&pclk>;
/openbmc/linux/drivers/rtc/
H A Drtc-ftrtc010.c34 struct clk *pclk; member
123 rtc->pclk = devm_clk_get(dev, "PCLK"); in ftrtc010_rtc_probe()
124 if (IS_ERR(rtc->pclk)) { in ftrtc010_rtc_probe()
125 dev_err(dev, "could not get PCLK\n"); in ftrtc010_rtc_probe()
127 ret = clk_prepare_enable(rtc->pclk); in ftrtc010_rtc_probe()
129 dev_err(dev, "failed to enable PCLK\n"); in ftrtc010_rtc_probe()
190 clk_disable_unprepare(rtc->pclk); in ftrtc010_rtc_probe()
200 if (!IS_ERR(rtc->pclk)) in ftrtc010_rtc_remove()
201 clk_disable_unprepare(rtc->pclk); in ftrtc010_rtc_remove()
/openbmc/linux/drivers/pwm/
H A Dpwm-rockchip.c35 struct clk *pclk; member
71 ret = clk_enable(pc->pclk); in rockchip_pwm_get_state()
98 clk_disable(pc->pclk); in rockchip_pwm_get_state()
195 ret = clk_enable(pc->pclk); in rockchip_pwm_apply()
223 clk_disable(pc->pclk); in rockchip_pwm_apply()
329 pc->pclk = devm_clk_get(&pdev->dev, "pclk"); in rockchip_pwm_probe()
331 pc->pclk = pc->clk; in rockchip_pwm_probe()
333 if (IS_ERR(pc->pclk)) in rockchip_pwm_probe()
334 return dev_err_probe(&pdev->dev, PTR_ERR(pc->pclk), "Can't get APB clk\n"); in rockchip_pwm_probe()
340 ret = clk_prepare_enable(pc->pclk); in rockchip_pwm_probe()
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-stn8815.dtsi40 clocks = <&timclk>, <&pclk>;
49 clocks = <&timclk>, <&pclk>;
64 clocks = <&pclk>;
78 clocks = <&pclk>;
92 clocks = <&pclk>;
107 clocks = <&pclk>;
232 /* The PCLK domain uses HCLK right off */
233 pclk: pclk@0 { label
332 clocks = <&pclk>;
338 clocks = <&pclk>;
[all …]
/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson6.dtsi52 clock-names = "xtal", "pclk";
57 clock-names = "xtal", "pclk", "baud";
62 clock-names = "xtal", "pclk", "baud";
67 clock-names = "xtal", "pclk", "baud";
72 clock-names = "xtal", "pclk", "baud";
/openbmc/linux/arch/riscv/boot/dts/canaan/
H A Dk210.dtsi260 clock-names = "ssi_clk", "pclk";
297 clock-names = "ref", "pclk";
307 clock-names = "ref", "pclk";
317 clock-names = "ref", "pclk";
326 clock-names = "ref", "pclk";
337 clock-names = "timer", "pclk";
347 clock-names = "timer", "pclk";
357 clock-names = "timer", "pclk";
367 clock-names = "timer", "pclk";
377 clock-names = "timer", "pclk";
[all …]
/openbmc/linux/drivers/soc/canaan/
H A Dk210-sysctl.c17 struct clk *pclk; in k210_sysctl_probe() local
23 pclk = devm_clk_get(dev, NULL); in k210_sysctl_probe()
24 if (IS_ERR(pclk)) in k210_sysctl_probe()
25 return dev_err_probe(dev, PTR_ERR(pclk), in k210_sysctl_probe()
28 ret = clk_prepare_enable(pclk); in k210_sysctl_probe()
/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_common.c52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument
75 if (pclk == 27027000 || pclk == 74250000) in hdmi_compute_acr()
78 if (pclk == 27027000) in hdmi_compute_acr()
85 if (pclk == 27027000) in hdmi_compute_acr()
146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
/openbmc/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_common.c52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument
75 if (pclk == 27027000 || pclk == 74250000) in hdmi_compute_acr()
78 if (pclk == 27027000) in hdmi_compute_acr()
85 if (pclk == 27027000) in hdmi_compute_acr()
146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
/openbmc/linux/drivers/net/ethernet/cadence/
H A Dmacb_pci.c62 plat_data.pclk = clk_register_fixed_rate(&pdev->dev, "pclk", NULL, 0, in macb_probe()
64 if (IS_ERR(plat_data.pclk)) { in macb_probe()
65 err = PTR_ERR(plat_data.pclk); in macb_probe()
103 clk_unregister(plat_data.pclk); in macb_probe()
114 clk_unregister(plat_data->pclk); in macb_remove()

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