Lines Matching full:pclk
53 * @pclk: PIT64B's peripheral clock
59 struct clk *pclk; member
140 clk_disable_unprepare(timer->pclk); in mchp_pit64b_suspend()
145 clk_prepare_enable(timer->pclk); in mchp_pit64b_resume()
261 * PIT64B timer may be fed by gclk or pclk. When gclk is used its rate has to
262 * be at least 3 times lower that pclk's rate. pclk rate is fixed, gclk rate
263 * could be changed via clock APIs. The chosen clock (pclk or gclk) could be
268 * requested rate. If PCLK/GCLK < 3 (condition requested by PIT64B hardware)
269 * then the function falls back on using PCLK as clock source for PIT64B timer
280 * | |-->pclk -->|-->| | +---------+ +-----+ |
287 * - gclk rate <= pclk rate/3
289 * - pclk rate is fixed (cannot be requested from PMC)
298 pclk_rate = clk_get_rate(timer->pclk); in mchp_pit64b_init_mode()
307 goto pclk; in mchp_pit64b_init_mode()
310 goto pclk; in mchp_pit64b_init_mode()
322 pclk: in mchp_pit64b_init_mode()
323 /* Check if requested rate could be obtained using PCLK. */ in mchp_pit64b_init_mode()
328 /* Use PCLK. */ in mchp_pit64b_init_mode()
340 timer->mode & MCHP_PIT64B_MR_SGCLK ? "gclk" : "pclk", best_pres, in mchp_pit64b_init_mode()
363 cs->timer.pclk = timer->pclk; in mchp_pit64b_init_clksrc()
407 ce->timer.pclk = timer->pclk; in mchp_pit64b_init_clkevt()
442 timer.pclk = of_clk_get_by_name(node, "pclk"); in mchp_pit64b_dt_init_timer()
443 if (IS_ERR(timer.pclk)) in mchp_pit64b_dt_init_timer()
444 return PTR_ERR(timer.pclk); in mchp_pit64b_dt_init_timer()
470 clk_rate = clk_get_rate(timer.pclk); in mchp_pit64b_dt_init_timer()