| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 13 ---------
14 The LS1043A integrated multicore processor combines four ARM Cortex-A53
15 processor cores with datapath acceleration optimized for L2/3 packet
20 - Four 64-bit ARM Cortex-A53 CPUs
21 - 1 MB unified L2 Cache
22 - One 32-bit DDR3L/DDR4 SDRAM memory controllers with ECC and interleaving
24 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
26 - Packet parsing, classification, and distribution (FMan)
27 - Queue management for scheduling, packet sequencing, and congestion
29 - Hardware buffer management for buffer allocation and de-allocation (BMan)
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| /openbmc/u-boot/drivers/misc/ |
| H A D | gdsys_ioep.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
11 * struct io_generic_packet - header structure for GDSYS IOEP packets
12 * @target_address: Target protocol address of the packet.
13 * @source_address: Source protocol address of the packet.
14 * @packet_type: Packet type.
16 * @packet_length: Length of the packet's payload bytes.
27 * struct gdsys_ioep_regs - Registers of a IOEP device
47 * gdsys_ioep_set() - Convenience macro to write registers of a IOEP device
56 * gdsys_ioep_get() - Convenience macro to read registers of a IOEP device
65 * enum rx_tx_status_values - Enum to describe the fields of the rx_tx_status
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| /openbmc/linux/drivers/tty/hvc/ |
| H A D | hvsi.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * and the service processor on IBM pSeries servers. On these servers, there
9 * console available either. However, the service processor has two standard
10 * serial ports, so this over-complicated protocol allows the OS to control
15 * control a modem attached to the service processor's serial port. Note that
53 * we pass data via two 8-byte registers, so we would like our char arrays
68 /* inbuf is for packet reassembly. leave a little room for leftovers. */
75 atomic_t seqno; /* HVSI packet sequence number */
101 return hp->flags & HVSI_CONSOLE; in is_console()
107 return (hp->state == HVSI_OPEN) in is_open()
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| /openbmc/linux/drivers/firmware/ |
| H A D | ti_sci.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
9 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
53 /* PSI-L requests */
73 /* Processor Control requests */
82 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses
103 * struct ti_sci_msg_resp_version - Response for a message
125 * struct ti_sci_msg_req_reboot - Reboot the SoC
136 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device
143 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source.
147 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device.
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| /openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
| H A D | qcom,glink-edge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,glink-edge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm G-Link Edge communication channel nodes
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 Qualcomm G-Link subnode represents communication edge, channels and devices
14 related to the remote processor.
20 - qcom,glink-channels
22 Qualcomm APR (Asynchronous Packet Router)
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| H A D | qcom,smd-edge.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,smd-edge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 Qualcomm SMD subnode represents a remote subsystem or a remote processor of
14 some sort - or in SMD language an "edge". The name of the edges are not
24 const: smd-edge
29 - qcom,smd-channels
31 Qualcomm APR/GPR (Asynchronous/Generic Packet Router)
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| /openbmc/linux/arch/alpha/kernel/ |
| H A D | err_ev7.c | 1 // SPDX-License-Identifier: GPL-2.0
33 if (el_ptr->class != EL_CLASS__HEADER || in ev7_collect_logout_frame_subpackets()
34 el_ptr->type != EL_TYPE__HEADER__LOGOUT_FRAME) in ev7_collect_logout_frame_subpackets()
41 ((unsigned long)el_ptr + el_ptr->length); in ev7_collect_logout_frame_subpackets()
46 if (el_ptr->class != EL_CLASS__PAL || in ev7_collect_logout_frame_subpackets()
47 el_ptr->type != EL_TYPE__PAL__LOGOUT_FRAME) in ev7_collect_logout_frame_subpackets()
50 lf_subpackets->logout = (struct ev7_pal_logout_subpacket *) in ev7_collect_logout_frame_subpackets()
51 el_ptr->by_type.raw.data_start; in ev7_collect_logout_frame_subpackets()
57 ((unsigned long)el_ptr + el_ptr->length); in ev7_collect_logout_frame_subpackets()
59 subpacket && i < lf_subpackets->logout->subpacket_count; in ev7_collect_logout_frame_subpackets()
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | hvsi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
11 #define VSV_SET_MODEM_CTL 1 /* to service processor only */
12 #define VSV_MODEM_CTL_UPDATE 2 /* from service processor only */
67 unsigned int inbuf_pktlen; /* packet length from cursor */
68 atomic_t seqno; /* packet sequence number */
|
| /openbmc/linux/tools/perf/util/intel-pt-decoder/ |
| H A D | intel-pt-pkt-decoder.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * intel_pt_pkt_decoder.h: Intel Processor Trace support
4 * Copyright (c) 2013-2014, Intel Corporation.
15 #define INTEL_PT_NEED_MORE_BYTES -1
16 #define INTEL_PT_BAD_PACKET -2
71 * Decoding of BIP packets conflicts with single-byte TNT packets. Since BIP
73 * context must be recorded and passed to the packet decoder.
77 INTEL_PT_BLK_4_CTX, /* 4-byte BIP packets */
78 INTEL_PT_BLK_8_CTX, /* 8-byte BIP packets */
84 struct intel_pt_pkt *packet,
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| /openbmc/u-boot/doc/ |
| H A D | README.blackfin | 1 Notes for the Blackfin architecture port of Das U-Boot
8 Blackfin Processors embody a new breed of 16/32-bit embedded processor, ideally
9 suited for products where a convergence of capabilities are necessary -
10 multi-format audio, video, voice and image processing; multi-mode baseband and
11 packet processing; control processing; and real-time security. The Blackfin's
16 The Blackfin processor is wholly developed by Analog Devices Inc.
26 In particular, bug reports, feature requests, help etc... for Das U-Boot are
27 handled in the Das U-Boot sub project:
28 http://blackfin.uclinux.org/gf/project/u-boot
38 the Blackfin processor. You can obtain such a cross-compiler here:
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| /openbmc/linux/Documentation/networking/dsa/ |
| H A D | bcm_sf2.rst | 8 - xDSL gateways such as BCM63138
9 - streaming/multimedia Set Top Box such as BCM7445
10 - Cable Modem/residential gateways such as BCM7145/BCM3390
13 ports, offering a range of built-in and customizable interfaces:
15 - single integrated Gigabit PHY
16 - quad integrated Gigabit PHY
17 - quad external Gigabit PHY w/ MDIO multiplexer
18 - integrated MoCA PHY
19 - several external MII/RevMII/GMII/RGMII interfaces
22 fail-over not to lose packets during a MoCA role re-election, as well as out of
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| /openbmc/qemu/target/hexagon/ |
| H A D | README | 2 processor(DSP). We also support Hexagon Vector eXtensions (HVX). HVX
8 … https://developer.qualcomm.com/downloads/qualcomm-hexagon-v73-programmers-reference-manual-rev-aa
10 …https://developer.qualcomm.com/downloads/qualcomm-hexagon-v73-hvx-programmers-reference-manual-rev…
13 …-hexagon-automatic-translation-of-the-isa-manual-pseudcode-to-tiny-code-instructions-of-a-vliw-arc…
17 The qemu-hexagon implementation is a combination of qemu and the Hexagon
19 Hexagon-specific code are
22 This has all the instruction and packet semantics
30 qemu/target/hexagon/idef-parser
31 Parser that, given the high-level definitions of an instruction,
34 qemu/linux-user/hexagon
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| /openbmc/linux/drivers/net/phy/mscc/ |
| H A D | mscc_ptp.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Driver for Microsemi VSC85xx PHYs - timestamping and PHC support
23 /* Two PHYs share the same 1588 processor and it's to be entirely configured
24 * through the base PHY of this processor.
26 /* phydev->bus->mdio_lock should be locked when using this function */
29 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_write()
31 WARN_ON_ONCE(!mutex_is_locked(&phydev->mdio.bus->mdio_lock)); in phy_ts_base_write()
32 return __mdiobus_write(phydev->mdio.bus, priv->ts_base_addr, regnum, in phy_ts_base_write()
36 /* phydev->bus->mdio_lock should be locked when using this function */
39 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_read()
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| /openbmc/linux/Documentation/networking/device_drivers/ethernet/netronome/ |
| H A D | nfp.rst | 1 .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 Network Flow Processor (NFP) Kernel Drivers
14 - `Overview`_
15 - `Acquiring Firmware`_
16 - `Devlink Info`_
17 - `Configure Device`_
18 - `Statistics`_
23 This driver supports Netronome and Corigine's line of Network Flow Processor
25 are also incorporated in the companies' family of Agilio SmartNICs. The SR-IOV
35 Firmware files on the host filesystem contain card type (`AMDA-*` string), media
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| /openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/ |
| H A D | AccelerationFunction.v1_0_5.json | 4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
9 …ction that a processor implements. This can include functions such as audio processing, compressi…
10 …processor implements in a Redfish implementation. This can include functions such as audio proces…
12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
27 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/context"
30 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/etag"
33 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/id"
36 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/type"
98 …perties that this object contains shall conform to the Redfish Specification-described requirement…
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| /openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
| H A D | qcom,apr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm APR/GPR (Asynchronous/Generic Packet Router)
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
14 communication between Application processor and QDSP. APR/GPR is mainly
20 - qcom,apr
21 - qcom,apr-v2
22 - qcom,gpr
24 power-domains:
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| /openbmc/linux/net/rxrpc/ |
| H A D | conn_event.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* connection-level event handling
17 #include "ar-internal.h"
28 if (conn->state != RXRPC_CONN_ABORTED) { in rxrpc_set_conn_aborted()
29 spin_lock(&conn->state_lock); in rxrpc_set_conn_aborted()
30 if (conn->state != RXRPC_CONN_ABORTED) { in rxrpc_set_conn_aborted()
31 conn->abort_code = abort_code; in rxrpc_set_conn_aborted()
32 conn->error = err; in rxrpc_set_conn_aborted()
33 conn->completion = compl; in rxrpc_set_conn_aborted()
35 smp_store_release(&conn->state, RXRPC_CONN_ABORTED); in rxrpc_set_conn_aborted()
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_86xx.h | 19 /* Local-Access Registers and MCM Registers(0x0000-0x2000) */
21 uint ccsrbar; /* 0x0 - Control Configuration Status Registers Base Address Register */
23 uint altcbar; /* 0x8 - Alternate Configuration Base Address Register */
25 uint altcar; /* 0x10 - Alternate Configuration Attribute Register */
27 uint bptr; /* 0x20 - Boot Page Translation Register */
29 uint lawbar0; /* 0xc08 - Local Access Window 0 Base Address Register */
31 uint lawar0; /* 0xc10 - Local Access Window 0 Attributes Register */
33 uint lawbar1; /* 0xc28 - Local Access Window 1 Base Address Register */
35 uint lawar1; /* 0xc30 - Local Access Window 1 Attributes Register */
37 uint lawbar2; /* 0xc48 - Local Access Window 2 Base Address Register */
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| /openbmc/linux/drivers/media/pci/saa7164/ |
| H A D | saa7164-types.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
188 /* the buffer is the dummy buffer - TODO??? */
248 * bLength - The size of this descriptor in bytes.
249 * bDescriptorType - CS_INTERFACE.
250 * bDescriptorSubtype - VS_FORMAT_MPEG2TS descriptor subtype.
251 * bFormatIndex - A non-zero constant that uniquely identifies the
253 * bDataOffset - Offset to TSP packet within MPEG-2 TS transport
255 * bPacketLength - Length of TSP packet, in bytes (typically 188).
256 * bStrideLength - Length of MPEG-2 TS transport stride.
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| /openbmc/linux/drivers/watchdog/ |
| H A D | ziirave_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
57 /* Received and ready for next Download packet. */
108 rev->major = ret; in ziirave_wdt_revision()
114 rev->minor = ret; in ziirave_wdt_revision()
121 struct i2c_client *client = to_i2c_client(wdd->parent); in ziirave_wdt_set_state()
138 struct i2c_client *client = to_i2c_client(wdd->parent); in ziirave_wdt_ping()
147 struct i2c_client *client = to_i2c_client(wdd->parent); in ziirave_wdt_set_timeout()
152 wdd->timeout = timeout; in ziirave_wdt_set_timeout()
159 struct i2c_client *client = to_i2c_client(wdd->parent); in ziirave_wdt_get_timeleft()
171 struct i2c_client *client = to_i2c_client(wdd->parent); in ziirave_firm_read_ack()
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| /openbmc/linux/drivers/staging/media/atomisp/include/linux/ |
| H A D | atomisp_platform.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
21 #include <asm/intel-family.h>
22 #include <asm/processor.h>
25 #include <media/v4l2-subdev.h>
71 /* CSI2-MIPI specific format: Generic short packet data. It is used to
75 ATOMISP_INPUT_FORMAT_GENERIC_SHORT1, /* Generic Short Packet Code 1 */
76 ATOMISP_INPUT_FORMAT_GENERIC_SHORT2, /* Generic Short Packet Code 2 */
77 ATOMISP_INPUT_FORMAT_GENERIC_SHORT3, /* Generic Short Packet Code 3 */
78 ATOMISP_INPUT_FORMAT_GENERIC_SHORT4, /* Generic Short Packet Code 4 */
79 ATOMISP_INPUT_FORMAT_GENERIC_SHORT5, /* Generic Short Packet Code 5 */
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| /openbmc/u-boot/board/freescale/t1040qds/ |
| H A D | README | 2 --------
7 ------------------
8 The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
9 processor cores with high-performance data path acceleration architecture
14 - Four e5500 cores, each with a private 256 KB L2 cache
15 - 256 KB shared L3 CoreNet platform cache (CPC)
16 - Interconnect CoreNet platform
17 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
19 - Data Path Acceleration Architecture (DPAA) incorporating acceleration
21 - Packet parsing, classification, and distribution
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| /openbmc/u-boot/drivers/net/ |
| H A D | ep93xx_eth.c | 1 // SPDX-License-Identifier: GPL-2.0+
9 * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
28 #define GET_PRIV(eth_dev) ((struct ep93xx_priv *)(eth_dev)->priv)
29 #define GET_REGS(eth_dev) (GET_PRIV(eth_dev)->regs)
47 printf(" rx_dq.base %p\n", priv->rx_dq.base); in dump_dev()
48 printf(" rx_dq.current %p\n", priv->rx_dq.current); in dump_dev()
49 printf(" rx_dq.end %p\n", priv->rx_dq.end); in dump_dev()
50 printf(" rx_sq.base %p\n", priv->rx_sq.base); in dump_dev()
51 printf(" rx_sq.current %p\n", priv->rx_sq.current); in dump_dev()
52 printf(" rx_sq.end %p\n", priv->rx_sq.end); in dump_dev()
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| /openbmc/linux/drivers/gpu/drm/ |
| H A D | drm_mipi_dsi.c | 4 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
60 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
72 if (err != -ENODEV) in mipi_dsi_uevent()
76 dsi->name); in mipi_dsi_uevent()
93 .name = "mipi-dsi",
100 * of_find_mipi_dsi_device_by_node() - find the MIPI DSI device matching a
121 of_node_put(dev->of_node); in mipi_dsi_dev_release()
135 return ERR_PTR(-ENOMEM); in mipi_dsi_device_alloc()
137 dsi->host = host; in mipi_dsi_device_alloc()
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| /openbmc/linux/Documentation/networking/ |
| H A D | scaling.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 multi-processor systems.
17 - RSS: Receive Side Scaling
18 - RPS: Receive Packet Steering
19 - RFS: Receive Flow Steering
20 - Accelerated Receive Flow Steering
21 - XPS: Transmit Packet Steering
28 (multi-queue). On reception, a NIC can send different packets to different
30 applying a filter to each packet that assigns it to one of a small number
33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and
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