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/openbmc/u-boot/board/nvidia/p2571/
H A Dpinmux-config-p2571.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py p2571".
64 PINCFG(PEX_L0_RST_N_PA0, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL),
65 PINCFG(PEX_L0_CLKREQ_N_PA1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
66 PINCFG(PEX_WAKE_N_PA2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
67 PINCFG(PEX_L1_RST_N_PA3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
68 PINCFG(PEX_L1_CLKREQ_N_PA4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
[all …]
/openbmc/u-boot/board/nvidia/p2371-0000/
H A Dpinmux-config-p2371-0000.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py p2371-0000".
89 PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
90 PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
91 PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
92 PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
93 PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
[all …]
/openbmc/u-boot/board/nvidia/e2220-1170/
H A Dpinmux-config-e2220-1170.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py e2220-1170".
98 PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),
99 PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, UP, NORMAL, INPUT, DISABLE, NORMAL),
100 PINCFG(PEX_WAKE_N_PA2, PE, UP, NORMAL, INPUT, DISABLE, NORMAL),
101 PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, NORMAL),
102 PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, UP, NORMAL, INPUT, DISABLE, NORMAL),
[all …]
/openbmc/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm750-pincfg-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 pin8_input: pin8-input {
8 bias-disable;
9 input-enable;
11 pin9_output_high: pin9-output-high {
13 bias-disable;
14 output-high;
16 pin10_input: pin10-input {
18 bias-disable;
19 input-enable;
[all …]
H A Dnuvoton-npcm750-runbmc-olympus-pincfg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0ol_pins: gpio0ol-pins {
8 bias-disable;
9 output-low;
11 gpio1ol_pins: gpio1ol-pins {
13 bias-disable;
14 output-low;
16 gpio2ol_pins: gpio2ol-pins {
18 bias-disable;
19 output-low;
[all …]
H A Dnuvoton-npcm730-kudo.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
41 stdout-path = &serial3;
48 iio-hwmon {
49 compatible = "iio-hwmon";
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
55 compatible = "nuvoton,npcm750-jtag-master";
56 #address-cells = <1>;
[all …]
/openbmc/u-boot/board/nvidia/p2371-2180/
H A Dpinmux-config-p2371-2180.h1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
9 * To generate this file, use the tegra-pinmux-scripts tool available from
10 * https://github.com/NVIDIA/tegra-pinmux-scripts
11 * Run "board-to-uboot.py p2371-2180".
100 PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
101 PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
102 PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
103 PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
104 PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
[all …]
/openbmc/u-boot/board/toradex/apalis_t30/
H A Dpinmux-config-apalis_t30.h1 /* SPDX-License-Identifier: GPL-2.0 */
79 LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
80 LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
81 LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
82 LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
83 LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
84 LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
85 LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
86 LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
87 LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
[all …]
/openbmc/u-boot/board/nvidia/cardhu/
H A Dpinmux-config-cardhu.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
77 LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
78 LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
79 LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
80 LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
81 LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
82 LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
83 LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
84 LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
[all …]
/openbmc/u-boot/board/toradex/colibri_t30/
H A Dpinmux-config-colibri_t30.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2013-2014, Stefan Agner
77 LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
78 LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
79 LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
80 LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
81 LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
82 LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
83 LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
84 LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
[all …]
/openbmc/u-boot/board/avionic-design/common/
H A Dpinmux-config-tamonten-ng.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Avionic Design GmbH <www.avionic-design.de>
82 LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
83 LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
84 LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
85 LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
86 LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
87 LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
88 LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
89 LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson
5 #include <dt-bindings/pinctrl/nomadik.h>
21 ste,output = <OUTPUT_HIGH>;
25 ste,output = <OUTPUT_LOW>;
45 ste,output = <OUTPUT_LOW>;
50 ste,output = <OUTPUT_HIGH>;
55 ste,sleep-wakeup = <SLPM_WAKEUP_DISABLE>;
56 ste,sleep-pull-disable = <SLPM_PDIS_DISABLED>;
61 ste,sleep-wakeup = <SLPM_WAKEUP_ENABLE>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
H A Dste,abx500.txt4 - compatible: "stericsson,ab8500-gpio", "stericsson,ab8540-gpio",
5 "stericsson,ab8505-gpio", "stericsson,ab9540-gpio",
7 Please refer to pinctrl-bindings.txt in this directory for details of the
12 and pin configuration bindings, see pinctrl-bindings.txt
17 pinctrl-names = "default";
18 …pinctrl-0 = <&sysclkreq2_default_mode>, <&sysclkreq3_default_mode>, <&gpio3_default_mode>, <&syscl…
28 bias-disable;
40 output-low;
52 output-low;
64 bias-disable;
[all …]
H A Dsprd,pinctrl.txt9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 select 3.0v, then the pin can output 3.0v. "system control" is used
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
[all …]
H A Dste,nomadik.txt4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
18 parameters, such as input, output, pull up, pull down...
23 (see pinctrl-bindings.txt):
26 - function: A string containing the name of the function to mux to the
28 - groups : An array of strings. Each string contains the name of a pin
30 set-up.
[all …]
H A Dsprd,sc9860-pinctrl.txt7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-at91.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Parallel I/O Controller (PIO) - System peripherals registers.
13 #define PIO_PDR 0x04 /* Disable Register */
15 #define PIO_OER 0x10 /* Output Enable Register */
16 #define PIO_ODR 0x14 /* Output Disable Register */
17 #define PIO_OSR 0x18 /* Output Status Register */
19 #define PIO_IFDR 0x24 /* Glitch Input Filter Disable */
21 #define PIO_SODR 0x30 /* Set Output Data Register */
22 #define PIO_CODR 0x34 /* Clear Output Data Register */
23 #define PIO_ODSR 0x38 /* Output Data Status Register */
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91-kizbox3-hs.dts1 // SPDX-License-Identifier: GPL-2.0
3 * at91-kizbox3-hs.dts - Device Tree file for Overkiz KIZBOX3-HS board
11 /dts-v1/;
12 #include "at91-kizbox3_common.dtsi"
15 model = "Overkiz KIZBOX3-HS";
16 compatible = "overkiz,kizbox3-hs", "atmel,sama5d2", "atmel,sama5";
18 led-controller-1 {
21 led-1 {
25 led-2 {
29 led-3 {
[all …]
/openbmc/qemu/.gitlab-ci.d/custom-runners/
H A Dubuntu-22.04-aarch64.yml1 # All ubuntu-22.04 jobs should run successfully in an environment
2 # setup by the scripts/ci/setup/ubuntu/build-environment.yml task
5 ubuntu-22.04-aarch64-all-linux-static:
10 - ubuntu_22.04
11 - aarch64
13 - if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
14 - if: "$AARCH64_RUNNER_AVAILABLE"
16 - mkdir build
17 - cd build
18 # Disable -static-pie due to build error with system libc:
[all …]
H A Dubuntu-22.04-s390x.yml1 # All ubuntu-22.04 jobs should run successfully in an environment
2 # setup by the scripts/ci/setup/ubuntu/build-environment.yml task
5 ubuntu-22.04-s390x-all-linux:
10 - ubuntu_22.04
11 - s390x
13 - if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
14 - if: "$S390X_RUNNER_AVAILABLE"
16 - mkdir build
17 - cd build
18 - ../configure --enable-debug --disable-system --disable-tools --disable-docs
[all …]
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pio.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h]
9 * Parallel I/O Controller (PIO) - System peripherals registers.
40 u32 pdr; /* 0x04 PIO Disable Register */
43 u32 oer; /* 0x10 Output Enable Register */
44 u32 odr; /* 0x14 Output Disable Registerr */
45 u32 osr; /* 0x18 Output Status Register */
48 u32 ifdr; /* 0x24 Input Filter Disable Register */
51 u32 sodr; /* 0x30 Set Output Data Register */
52 u32 codr; /* 0x34 Clear Output Data Register */
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/modules/hdcp/
H A Dhdcp.c31 struct mod_hdcp_trace *trace = &hdcp->connection.trace; in push_error_status()
33 if (trace->error_count < MAX_NUM_OF_ERROR_TRACE) { in push_error_status()
34 trace->errors[trace->error_count].status = status; in push_error_status()
35 trace->errors[trace->error_count].state_id = hdcp->state.id; in push_error_status()
36 trace->error_count++; in push_error_status()
41 hdcp->connection.hdcp1_retry_count++; in push_error_status()
42 if (hdcp->connection.hdcp1_retry_count == MAX_NUM_OF_ATTEMPTS) in push_error_status()
43 hdcp->connection.link.adjust.hdcp1.disable = 1; in push_error_status()
45 hdcp->connection.hdcp2_retry_count++; in push_error_status()
46 if (hdcp->connection.hdcp2_retry_count == MAX_NUM_OF_ATTEMPTS) in push_error_status()
[all …]
/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * Bit 15-10: RW Reserved. Default 1 starting from G12A
33 * Bit 31 RW free_clk_en: 0=Enable clock gating for power saving; 1= Disable
39 * Bit 7 RW hdcp22_skpclk_en: starting from G12A, 1=enable; 0=disable
40 * Bit 6 RW hdcp22_esmclk_en: starting from G12A, 1=enable; 0=disable
41 * Bit 5 RW hdcp22_tmdsclk_en: starting from G12A, 1=enable; 0=disable
42 * Bit 4 RW cec_clk_en: 1=enable cec_clk; 0=disable. Default 0. Reserved for G12A
43 * Bit 3 RW i2s_clk_en: 1=enable i2s_clk; 0=disable. Default 0.
44 * Bit 2 RW spdif_clk_en: 1=enable spdif_clk; 0=disable. Default 0.
45 * Bit 1 RW tmds_clk_en: 1=enable tmds_clk; 0=disable. Default 0.
[all …]
/openbmc/u-boot/drivers/video/meson/
H A Dmeson_dw_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0 */
35 * Bit 4 RW cec_clk_en: 1=enable cec_clk; 0=disable. Default 0.
36 * Bit 3 RW i2s_clk_en: 1=enable i2s_clk; 0=disable. Default 0.
37 * Bit 2 RW spdif_clk_en: 1=enable spdif_clk; 0=disable. Default 0.
38 * Bit 1 RW tmds_clk_en: 1=enable tmds_clk; 0=disable. Default 0.
39 * Bit 0 RW pixel_clk_en: 1=enable pixel_clk; 0=disable. Default 0.
51 * 1=Enable interrupt source; 0=Disable interrupt source. Default 0.
83 /* Bit 14:12 RW tmds_sel: 3'b000=Output zero; 3'b001=Output normal TMDS data;
84 * 3'b010=Output PRBS data; 3'b100=Output shift pattern. Default 0.
87 * Bit 8 RW shift_pttn_en: 1= Enable shift pattern generator; 0=Disable.
[all …]

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