/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | msm8996-v3.0.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 qcom,msm-id = <246 0x30000>; 22 gpu_opp_table_3_0: opp-table-gpu30 { 23 compatible = "operating-points-v2"; 25 opp-624000000 { 26 opp-hz = /bits/ 64 <624000000>; 27 opp-level = <7>; 30 opp-560000000 { 31 opp-hz = /bits/ 64 <560000000>; 32 opp-level = <6>; [all …]
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H A D | sa8540p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 /delete-node/ &cpu0_opp_table; 10 /delete-node/ &cpu4_opp_table; 13 cpu0_opp_table: opp-table-cpu0 { 14 compatible = "operating-points-v2"; 15 opp-shared; 17 opp-300000000 { 18 opp-hz = /bits/ 64 <300000000>; 19 opp-peak-kBps = <(300000 * 32)>; 21 opp-403200000 { [all …]
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H A D | sdm670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,osm-l3.h> 14 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 #include <dt-bindings/phy/phy-qcom-qusb2.h> 17 #include <dt-bindings/power/qcom-rpmpd.h> [all …]
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H A D | sm6350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/clock/qcom,sm6350-camcc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> [all …]
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H A D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 15 #include <dt-bindings/dma/qcom-gpi.h> 16 #include <dt-bindings/firmware/qcom,scm.h> [all …]
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H A D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/interconnect/qcom,msm8996.h> 11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> [all …]
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H A D | sc7280.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/clock/qcom,camcc-sc7280.h> 8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h> 11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> 12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sc7280.h> [all …]
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap34xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/media/omap3-isp.h> 16 /* OMAP343x/OMAP35xx variants OPP1-6 */ 17 operating-points-v2 = <&cpu0_opp_table>; 19 clock-latency = <300000>; /* From legacy driver */ 20 #cooling-cells = <2>; 24 cpu0_opp_table: opp-table { 25 compatible = "operating-points-v2-ti-cpu"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/opp/ |
H A D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic OPP (Operating Performance Points) 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2 22 - | 24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states [all …]
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H A D | opp-v2-kryo-cpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Technologies, Inc. NVMEM OPP 10 - Ilia Lin <ilia.lin@kernel.org> 13 - $ref: opp-v2-base.yaml# 17 the CPU frequencies subset and voltage value of each OPP varies based on 22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide 23 the OPP framework with required information (existing HW bitmap). [all …]
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H A D | opp-v2-qcom-level.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm OPP 10 - Niklas Cassel <nks@flawful.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2-qcom-level 20 '^opp-?[0-9]+$': 25 opp-level: true [all …]
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H A D | opp-v2-base.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic OPP (Operating Performance Points) Common Properties 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 Devices work at voltage-current-frequency combinations and some implementations 25 pattern: '^opp-table(-[a-z0-9]+)?$' 27 opp-shared: 29 Indicates that device nodes using this OPP Table Node's phandle switch [all …]
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/openbmc/linux/Documentation/devicetree/bindings/gpu/ |
H A D | arm,mali-bifrost.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 14 pattern: '^gpu@[a-f0-9]+$' 18 - items: 19 - enum: 20 - amlogic,meson-g12a-mali 21 - mediatek,mt8183-mali [all …]
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/openbmc/u-boot/arch/arm/mach-omap2/omap5/ |
H A D | Kconfig | 6 DRA7xx is an OMAP based SOC with Dual Core A-15s. 13 bool "CompuLab CL-SOM-AM57x" 17 bool "CompuLab CM-T54" 62 expected to specify a pre-computed time using the above option. 63 This value can be computed using a summation of the below 3 67 3: Voltage ramp time, which can be derived using the PMIC slew rate 71 menu "Voltage Domain OPP selections" 77 Select the Operating Performance Point(OPP) for the MPU voltage 81 bool "OPP NOM" 83 This config option enables Normal OPP for MPU. This is the safest [all …]
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/openbmc/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/clock/tegra234-clock.h> 4 #include <dt-bindings/gpio/tegra234-gpio.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/mailbox/tegra186-hsp.h> 7 #include <dt-bindings/memory/tegra234-mc.h> 8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 9 #include <dt-bindings/power/tegra234-powergate.h> 10 #include <dt-bindings/reset/tegra234-reset.h> 11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h> [all …]
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/openbmc/linux/Documentation/translations/zh_CN/power/ |
H A D | opp.rst | 1 .. SPDX-License-Identifier: GPL-2.0 2 .. include:: ../disclaimer-zh_CN.rst 4 :Original: Documentation/power/opp.rst 11 操作性能值(OPP)库 14 (C) 2009-2010 Nishanth Menon <nm@ti.com>, 德州仪器公司 20 3. OPP搜索函数 28 1.1 何为操作性能值(OPP)? 29 ------------------------------ 41 {300MHz,最低电压为1V}, {800MHz,最低电压为1.2V}, {1GHz,最低电压为1.3V} 46 - {300000000, 1000000} [all …]
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/openbmc/linux/arch/arm64/boot/dts/apple/ |
H A D | t8112.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/apple-aic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/pinctrl/apple.h> 14 #include <dt-bindings/spmi/spmi.h> 17 compatible = "apple,t8112", "apple,arm-platform"; 19 #address-cells = <2>; 20 #size-cells = <2>; 23 #address-cells = <2>; [all …]
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H A D | t8103.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/apple-aic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/pinctrl/apple.h> 16 compatible = "apple,t8103", "apple,arm-platform"; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <2>; 23 #size-cells = <0>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | qcom,rpmpd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 19 - qcom,mdm9607-rpmpd 20 - qcom,msm8226-rpmpd 21 - qcom,msm8909-rpmpd 22 - qcom,msm8916-rpmpd 23 - qcom,msm8939-rpmpd 24 - qcom,msm8953-rpmpd [all …]
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,msm8998-bwmon.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 17 - Measuring the bandwidth between CPUs and Last Level Cache Controller - 19 - Measuring the bandwidth between Last Level Cache Controller and memory 20 (DDR) - called LLCC BWMON. 25 - const: qcom,msm8998-bwmon # BWMON v4 26 - items: [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos4x12.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 19 #include "exynos4-cpu-thermal.dtsi" 27 fimc-lite0 = &fimc_lite_0; 28 fimc-lite1 = &fimc_lite_1; 31 bus_acp: bus-acp { 32 compatible = "samsung,exynos-bus"; 34 clock-names = "bus"; 35 operating-points-v2 = <&bus_acp_opp_table>; 38 bus_acp_opp_table: opp-table { 39 compatible = "operating-points-v2"; [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx7d.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 7 #include <dt-bindings/reset/imx7-reset.h> 18 clock-frequency = <996000000>; 19 operating-points-v2 = <&cpu0_opp_table>; 20 #cooling-cells = <2>; 21 nvmem-cells = <&fuse_grade>; 22 nvmem-cell-names = "speed_grade"; 26 compatible = "arm,cortex-a7"; 29 clock-frequency = <996000000>; 30 operating-points-v2 = <&cpu0_opp_table>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | qcom-cpufreq-nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ilia Lin <ilia.lin@kernel.org> 17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level 18 according to the required OPPs defined in the CPU OPP tables. 20 For old implementation efuses are parsed to select the correct opp table and 28 - qcom,apq8064 29 - qcom,apq8096 [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_opp.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 34 (opp110->regs->reg) 38 opp110->opp_shift->field_name, opp110->opp_mask->field_name 41 opp110->base.ctx 102 * 3) HW remove 12bit FMT support for DCE11 power saving reason. 115 if (params->pixel_encoding == PIXEL_ENCODING_YCBCR422) { in set_truncation() 117 if (params->flags.TRUNCATE_DEPTH == 1) in set_truncation() 122 else if (params->flags.TRUNCATE_DEPTH == 2) in set_truncation() 130 /* on other format-to do */ in set_truncation() 131 if (params->flags.TRUNCATE_ENABLED == 0) in set_truncation() [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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