/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | brcm,cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mfd/brcm,cru.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom CRU 10 - Rafał Miłecki <rafal@milecki.pl> 13 Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware 20 - enum: 21 - brcm,ns-cru 22 - const: simple-mfd [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 19 stdout-path = "serial2:115200n8"; 28 * - Rails that only connect to the EC (or devices that the EC talks to) 30 * - Rails _are_ included if the rails go to the AP even if the AP 39 * - The EC controls the enable and the EC always enables a rail as 41 * - The rails are actually connected to each other by a jumper and 46 ppvar_sys: ppvar-sys { [all …]
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H A D | rk3399-pinephone-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 * https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf 12 /dts-v1/; 13 #include <dt-bindings/input/gpio-keys.h> 14 #include <dt-bindings/input/linux-event-codes.h> 16 #include "rk3399-opp.dtsi" 20 compatible = "pine64,pinephone-pro", "rockchip,rk3399"; 21 chassis-type = "handset"; 30 stdout-path = "serial2:115200n8"; 33 adc-keys { [all …]
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H A D | rk3399-gru-scarlet.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-scarlet board device tree source 8 #include "rk3399-gru.dtsi" 11 chassis-type = "tablet"; 16 pp1250_s3: pp1250-s3 { 17 compatible = "regulator-fixed"; 18 regulator-name = "pp1250_s3"; 21 regulator-always-on; 22 regulator-boot-on; 23 regulator-min-microvolt = <1250000>; [all …]
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H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3328-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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H A D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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H A D | px30.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/px30-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/px30-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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H A D | rk3326-odroid-go.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/pinctrl/rockchip.h> 21 stdout-path = "serial2:115200n8"; 25 compatible = "pwm-backlight"; 26 power-supply = <&vcc_bl>; 30 builtin_gamepad: gpio-keys { [all …]
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H A D | rk3399-nanopi4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * RK3399-based FriendlyElec boards device tree source 14 /dts-v1/; 15 #include <dt-bindings/input/linux-event-codes.h> 17 #include "rk3399-opp.dtsi" 27 stdout-path = "serial2:1500000n8"; 30 clkin_gmac: external-gmac-clock { 31 compatible = "fixed-clock"; 32 clock-frequency = <125000000>; 33 clock-output-names = "clkin_gmac"; [all …]
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H A D | rk3399-rock-pi-4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/pwm/pwm.h> 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; [all …]
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H A D | rk3399-firefly.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include <dt-bindings/usb/pd.h> 12 #include "rk3399-opp.dtsi" 15 model = "Firefly-RK3399 Board"; 16 compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; 25 stdout-path = "serial2:1500000n8"; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 18 stdout-path = &uart2; 22 u-boot,dm-pre-reloc; 23 u-boot,boot0 = &spi_flash; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&fw_wp_ap>; 30 write-protect-gpio = <&gpio7 6 GPIO_ACTIVE_LOW>; 35 compatible = "pwm-backlight"; [all …]
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H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 33 #address-cells = <2>; [all …]
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H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 14 u-boot,dm-pre-reloc; 15 stdout-path = "serial2:115200n8"; 16 u-boot,spl-boot-order = &spi_flash; 20 u-boot,spl-payload-offset = <0x40000>; 29 * - Rails that only connect to the EC (or devices that the EC talks to) 31 * - Rails _are_ included if the rails go to the AP even if the AP [all …]
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H A D | rk3399-firefly.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 7 #include <dt-bindings/pwm/pwm.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 10 #include "rk3399-sdram-ddr3-1600.dtsi" 13 model = "Firefly-RK3399 Board"; 14 compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; 17 stdout-path = &uart2; 18 u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; 22 compatible = "pwm-backlight"; [all …]
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H A D | rk3328-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 11 compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; 14 stdout-path = &uart2; 17 gmac_clkin: external-gmac-clock { 18 compatible = "fixed-clock"; 19 clock-frequency = <125000000>; 20 clock-output-names = "gmac_clkin"; 21 #clock-cells = <0>; 24 vcc3v3_sdmmc: sdmmc-pwren { [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 18 stdout-path = "serial2:115200n8"; 31 power_button: power-button { 32 compatible = "gpio-keys"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pwr_key_l>; 36 key-power { 40 debounce-interval = <100>; [all …]
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H A D | rk322x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3228-cru.h> 8 #include <dt-bindings/thermal/thermal.h> 9 #include <dt-bindings/power/rk3228-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/i2c/ |
H A D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - $ref: /schemas/i2c/i2c-controller.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 23 - const: rockchip,rv1108-i2c 24 - const: rockchip,rk3066-i2c 25 - const: rockchip,rk3188-i2c 26 - const: rockchip,rk3228-i2c [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-rockchip.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - $ref: spi-controller.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 23 - const: rockchip,rk3036-spi 24 - const: rockchip,rk3066-spi 25 - const: rockchip,rk3228-spi 26 - const: rockchip,rv1108-spi [all …]
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Brian Norris <briannorris@chromium.org> 15 - rockchip,rk3399-dmc 17 devfreq-events: 21 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt. 26 clock-names: 28 - const: dmc_clk [all …]
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/openbmc/u-boot/drivers/ram/rockchip/ |
H A D | dmc-rk3368.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/memory/rk3368-dmc.h> 10 #include <dt-structs.h> 25 struct rk3368_cru *cru; member 123 ((n <= 8) ? ((n - 4) << 9) : (((n >> 1) & 0x7) << 9)) 125 ((((n - 4) & 0x7) << 4) | (((n - 4) & 0x8) >> 2)) 133 (((n - 5) & 0x7) << 3) 141 rk_setreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL); in ddr_set_noc_spr_err_stall() 143 rk_clrreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL); in ddr_set_noc_spr_err_stall() 149 rk_setreg(&grf->ddrc0_con0, MSCH0_MAINDDR3_DDR3); in ddr_set_ddr3_mode() [all …]
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/openbmc/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm-ns.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de> 6 #include <dt-bindings/clock/bcm-nsp.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <1>; [all …]
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